radv: Create single RADV_DEBUG env var.
Also changed RADV_SHOW_QUEUES to a no compute queue option. That would make more sense later when the compute queue is established, but the transfer queue still experimental. v2: Don't include the trace flag. Signed-off-by: Bas Nieuwenhuizen <basni@google.com> Reviewed-by: Dave Airlie <airlied@redhat.com>
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8cb60c7dd3
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@ -218,6 +218,18 @@ static const VkAllocationCallbacks default_alloc = {
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.pfnFree = default_free_func,
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};
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static const struct debug_control radv_debug_options[] = {
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{"fastclears", RADV_DEBUG_FAST_CLEARS},
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{"nodcc", RADV_DEBUG_NO_DCC},
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{"shaders", RADV_DEBUG_DUMP_SHADERS},
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{"nocache", RADV_DEBUG_NO_CACHE},
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{"shaderstats", RADV_DEBUG_DUMP_SHADER_STATS},
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{"nohiz", RADV_DEBUG_NO_HIZ},
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{"nocompute", RADV_DEBUG_NO_COMPUTE_QUEUE},
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{"unsafemath", RADV_DEBUG_UNSAFE_MATH},
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{NULL, 0}
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};
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VkResult radv_CreateInstance(
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const VkInstanceCreateInfo* pCreateInfo,
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const VkAllocationCallbacks* pAllocator,
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@ -276,6 +288,9 @@ VkResult radv_CreateInstance(
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VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false));
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instance->debug_flags = parse_debug_string(getenv("RADV_DEBUG"),
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radv_debug_options);
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*pInstance = radv_instance_to_handle(instance);
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return VK_SUCCESS;
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@ -555,12 +570,11 @@ void radv_GetPhysicalDeviceQueueFamilyProperties(
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{
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RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice);
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int num_queue_families = 1;
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bool all_queues = env_var_as_boolean("RADV_SHOW_QUEUES", true);
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int idx;
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if (all_queues && pdevice->rad_info.chip_class >= CIK) {
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if (pdevice->rad_info.compute_rings > 0)
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if (pdevice->rad_info.compute_rings > 0 &&
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pdevice->rad_info.chip_class >= CIK &&
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!(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE))
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num_queue_families++;
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}
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if (pQueueFamilyProperties == NULL) {
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*pCount = num_queue_families;
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@ -583,12 +597,9 @@ void radv_GetPhysicalDeviceQueueFamilyProperties(
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idx++;
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}
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if (!all_queues) {
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*pCount = idx;
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return;
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}
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if (pdevice->rad_info.compute_rings > 0 && pdevice->rad_info.chip_class >= CIK) {
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if (pdevice->rad_info.compute_rings > 0 &&
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pdevice->rad_info.chip_class >= CIK &&
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!(pdevice->instance->debug_flags & RADV_DEBUG_NO_COMPUTE_QUEUE)) {
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if (*pCount > idx) {
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pQueueFamilyProperties[idx] = (VkQueueFamilyProperties) {
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.queueFlags = VK_QUEUE_COMPUTE_BIT | VK_QUEUE_TRANSFER_BIT,
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@ -699,7 +710,8 @@ VkResult radv_CreateDevice(
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device->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
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device->instance = physical_device->instance;
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device->shader_stats_dump = false;
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device->debug_flags = device->instance->debug_flags;
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device->ws = physical_device->ws;
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if (pAllocator)
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@ -735,12 +747,6 @@ VkResult radv_CreateDevice(
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device->ws->ctx_destroy(device->hw_ctx);
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goto fail;
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}
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device->allow_fast_clears = env_var_as_boolean("RADV_FAST_CLEARS", false);
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device->allow_dcc = !env_var_as_boolean("RADV_DCC_DISABLE", false);
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device->shader_stats_dump = env_var_as_boolean("RADV_SHADER_STATS", false);
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if (device->allow_fast_clears && device->allow_dcc)
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radv_finishme("DCC fast clears have not been tested\n");
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radv_device_init_msaa(device);
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@ -1652,7 +1658,8 @@ radv_initialise_color_surface(struct radv_device *device,
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if (iview->image->fmask.size)
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cb->cb_color_info |= S_028C70_COMPRESSION(1);
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if (iview->image->cmask.size && device->allow_fast_clears)
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if (iview->image->cmask.size &&
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(device->debug_flags & RADV_DEBUG_FAST_CLEARS))
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cb->cb_color_info |= S_028C70_FAST_CLEAR(1);
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if (iview->image->surface.dcc_size && level_info->dcc_enabled)
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@ -113,7 +113,7 @@ radv_init_surface(struct radv_device *device,
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(pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) ||
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(pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) ||
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device->instance->physicalDevice.rad_info.chip_class < VI ||
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create_info->scanout || !device->allow_dcc ||
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create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC) ||
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!radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable))
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surface->flags |= RADEON_SURF_DISABLE_DCC;
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if (create_info->scanout)
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@ -649,7 +649,7 @@ static void
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radv_image_alloc_htile(struct radv_device *device,
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struct radv_image *image)
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{
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if (env_var_as_boolean("RADV_HIZ_DISABLE", false))
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if (device->debug_flags & RADV_DEBUG_NO_HIZ)
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return;
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image->htile.size = radv_image_get_htile_size(device, image);
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@ -802,7 +802,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
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if (!iview->image->cmask.size && !iview->image->surface.dcc_size)
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return false;
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if (!cmd_buffer->device->allow_fast_clears)
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if (!(cmd_buffer->device->debug_flags & RADV_DEBUG_FAST_CLEARS))
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return false;
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if (!radv_layout_can_fast_clear(iview->image, image_layout, radv_image_queue_family_mask(iview->image, cmd_buffer->queue_family_index)))
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@ -418,7 +418,7 @@ static struct radv_shader_variant *radv_shader_variant_create(struct radv_device
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struct ac_shader_binary binary;
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options.unsafe_math = env_var_as_boolean("RADV_UNSAFE_MATH", false);
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options.unsafe_math = !!(device->debug_flags & RADV_DEBUG_UNSAFE_MATH);
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options.family = chip_family;
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options.chip_class = device->instance->physicalDevice.rad_info.chip_class;
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tm = ac_create_target_machine(chip_family);
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@ -451,14 +451,14 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
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gl_shader_stage stage,
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const VkSpecializationInfo *spec_info,
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struct radv_pipeline_layout *layout,
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const union ac_shader_variant_key *key,
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bool dump)
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const union ac_shader_variant_key *key)
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{
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unsigned char sha1[20];
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struct radv_shader_variant *variant;
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nir_shader *nir;
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void *code = NULL;
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unsigned code_size = 0;
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bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
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if (module->nir)
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_mesa_sha1_compute(module->nir->info->name,
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@ -1310,7 +1310,6 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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{
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struct radv_shader_module fs_m = {0};
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bool dump = getenv("RADV_DUMP_SHADERS");
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if (alloc == NULL)
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alloc = &device->alloc;
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@ -1337,7 +1336,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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pStages[MESA_SHADER_VERTEX]->pName,
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MESA_SHADER_VERTEX,
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pStages[MESA_SHADER_VERTEX]->pSpecializationInfo,
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pipeline->layout, &key, dump);
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pipeline->layout, &key);
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pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_VERTEX);
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}
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@ -1362,7 +1361,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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stage ? stage->pName : "main",
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MESA_SHADER_FRAGMENT,
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stage ? stage->pSpecializationInfo : NULL,
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pipeline->layout, &key, dump);
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pipeline->layout, &key);
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pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_FRAGMENT);
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}
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@ -1414,7 +1413,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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pipeline->binding_stride[desc->binding] = desc->stride;
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}
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if (device->shader_stats_dump) {
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if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
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radv_dump_pipeline_stats(device, pipeline);
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}
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@ -1490,7 +1489,6 @@ static VkResult radv_compute_pipeline_create(
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RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
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RADV_FROM_HANDLE(radv_shader_module, module, pCreateInfo->stage.module);
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struct radv_pipeline *pipeline;
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bool dump = getenv("RADV_DUMP_SHADERS");
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pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
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VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
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pCreateInfo->stage.pName,
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MESA_SHADER_COMPUTE,
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pCreateInfo->stage.pSpecializationInfo,
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pipeline->layout, NULL, dump);
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pipeline->layout, NULL);
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*pPipeline = radv_pipeline_to_handle(pipeline);
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if (device->shader_stats_dump) {
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if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) {
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radv_dump_pipeline_stats(device, pipeline);
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}
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return VK_SUCCESS;
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@ -57,7 +57,7 @@ radv_pipeline_cache_init(struct radv_pipeline_cache *cache,
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/* We don't consider allocation failure fatal, we just start with a 0-sized
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* cache. */
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if (cache->hash_table == NULL ||
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!env_var_as_boolean("RADV_ENABLE_PIPELINE_CACHE", true))
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(device->debug_flags & RADV_DEBUG_NO_CACHE))
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cache->table_size = 0;
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else
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memset(cache->hash_table, 0, byte_size);
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@ -100,6 +100,18 @@ enum radv_mem_type {
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RADV_MEM_TYPE_COUNT
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};
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enum {
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RADV_DEBUG_FAST_CLEARS = 0x1,
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RADV_DEBUG_NO_DCC = 0x2,
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RADV_DEBUG_DUMP_SHADERS = 0x4,
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RADV_DEBUG_NO_CACHE = 0x8,
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RADV_DEBUG_DUMP_SHADER_STATS = 0x10,
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RADV_DEBUG_NO_HIZ = 0x20,
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RADV_DEBUG_NO_COMPUTE_QUEUE = 0x40,
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RADV_DEBUG_UNSAFE_MATH = 0x80,
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};
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#define radv_noreturn __attribute__((__noreturn__))
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#define radv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
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@ -278,6 +290,8 @@ struct radv_instance {
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uint32_t apiVersion;
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int physicalDeviceCount;
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struct radv_physical_device physicalDevice;
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uint64_t debug_flags;
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};
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VkResult radv_init_wsi(struct radv_physical_device *physical_device);
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@ -469,9 +483,7 @@ struct radv_device {
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int queue_count[RADV_MAX_QUEUE_FAMILIES];
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struct radeon_winsys_cs *empty_cs[RADV_MAX_QUEUE_FAMILIES];
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bool allow_fast_clears;
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bool allow_dcc;
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bool shader_stats_dump;
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uint64_t debug_flags;
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/* MSAA sample locations.
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* The first index is the sample index.
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