vc4: Pack the unorm-packing bits into a src MUL instruction when possible.
Now that we do non-SSA QIR instructions, we can take a NIR SSA src that's only used by the unorm packing and just stuff the pack bits into it. total instructions in shared programs: 98136 -> 97974 (-0.17%) instructions in affected programs: 4149 -> 3987 (-3.90%)
This commit is contained in:
Eric Anholt
parent
572a48366d
commit
8b36d107fd
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@ -229,18 +229,20 @@ qir_opt_algebraic(struct vc4_compile *c)
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break;
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case QOP_FMUL:
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if (replace_x_0_with_0(c, inst, 0) ||
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replace_x_0_with_0(c, inst, 1) ||
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fmul_replace_one(c, inst, 0) ||
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fmul_replace_one(c, inst, 1)) {
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if (!inst->dst.pack &&
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(replace_x_0_with_0(c, inst, 0) ||
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replace_x_0_with_0(c, inst, 1) ||
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fmul_replace_one(c, inst, 0) ||
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fmul_replace_one(c, inst, 1))) {
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progress = true;
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break;
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}
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break;
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case QOP_MUL24:
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if (replace_x_0_with_0(c, inst, 0) ||
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replace_x_0_with_0(c, inst, 1)) {
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if (!inst->dst.pack &&
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(replace_x_0_with_0(c, inst, 0) ||
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replace_x_0_with_0(c, inst, 1))) {
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progress = true;
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break;
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}
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@ -818,6 +818,72 @@ declare_uniform_range(struct vc4_compile *c, uint32_t start, uint32_t size)
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c->ubo_ranges[array_id].used = false;
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}
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static bool
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ntq_src_is_only_ssa_def_user(nir_src *src)
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{
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if (!src->is_ssa)
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return false;
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if (!list_empty(&src->ssa->if_uses))
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return false;
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return (src->ssa->uses.next == &src->use_link &&
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src->ssa->uses.next->next == &src->ssa->uses);
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}
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/**
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* In general, emits a nir_pack_unorm_4x8 as a series of MOVs with the pack
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* bit set.
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*
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* However, as an optimization, it tries to find the instructions generating
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* the sources to be packed and just emit the pack flag there, if possible.
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*/
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static void
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ntq_emit_pack_unorm_4x8(struct vc4_compile *c, nir_alu_instr *instr)
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{
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struct qreg result = qir_get_temp(c);
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struct nir_alu_instr *vec4 = NULL;
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/* If packing from a vec4 op (as expected), identify it so that we can
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* peek back at what generated its sources.
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*/
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if (instr->src[0].src.is_ssa &&
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instr->src[0].src.ssa->parent_instr->type == nir_instr_type_alu &&
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nir_instr_as_alu(instr->src[0].src.ssa->parent_instr)->op ==
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nir_op_vec4) {
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vec4 = nir_instr_as_alu(instr->src[0].src.ssa->parent_instr);
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}
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for (int i = 0; i < 4; i++) {
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int swiz = instr->src[0].swizzle[i];
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struct qreg src;
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if (vec4) {
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src = ntq_get_src(c, vec4->src[swiz].src,
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vec4->src[swiz].swizzle[0]);
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} else {
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src = ntq_get_src(c, instr->src[0].src, swiz);
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}
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if (vec4 &&
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ntq_src_is_only_ssa_def_user(&vec4->src[swiz].src) &&
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src.file == QFILE_TEMP &&
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c->defs[src.index] &&
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qir_is_mul(c->defs[src.index]) &&
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!c->defs[src.index]->dst.pack) {
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struct qinst *rewrite = c->defs[src.index];
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c->defs[src.index] = NULL;
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rewrite->dst = result;
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rewrite->dst.pack = QPU_PACK_MUL_8A + i;
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continue;
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}
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qir_PACK_8_F(c, result, src, i);
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}
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struct qreg *dest = ntq_get_dest(c, &instr->dest.dest);
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*dest = result;
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}
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static void
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ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr)
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{
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@ -839,16 +905,7 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr)
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}
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if (instr->op == nir_op_pack_unorm_4x8) {
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struct qreg result = qir_get_temp(c);
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for (int i = 0; i < 4; i++) {
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qir_PACK_8_F(c, result,
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ntq_get_src(c, instr->src[0].src,
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instr->src[0].swizzle[i]),
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i);
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}
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struct qreg *dest = ntq_get_dest(c, &instr->dest.dest);
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*dest = result;
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ntq_emit_pack_unorm_4x8(c, instr);
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return;
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}
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@ -286,6 +286,29 @@ qir_dump_inst(struct vc4_compile *c, struct qinst *inst)
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inst->sf ? ".sf" : "");
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qir_print_reg(c, inst->dst, true);
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if (inst->dst.pack) {
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if (qir_is_mul(inst)) {
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switch (inst->dst.pack) {
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case QPU_PACK_MUL_8888:
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fprintf(stderr, ".8888");
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break;
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case QPU_PACK_MUL_8A:
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fprintf(stderr, ".8a");
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break;
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case QPU_PACK_MUL_8B:
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fprintf(stderr, ".8b");
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break;
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case QPU_PACK_MUL_8C:
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fprintf(stderr, ".8c");
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break;
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case QPU_PACK_MUL_8D:
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fprintf(stderr, ".8d");
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break;
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}
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} else {
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unreachable("packs only set up for MULs so far.\n");
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}
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}
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for (int i = 0; i < qir_get_op_nsrc(inst->op); i++) {
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fprintf(stderr, ", ");
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qir_print_reg(c, inst->src[i], false);
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@ -58,6 +58,7 @@ enum qfile {
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struct qreg {
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enum qfile file;
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uint32_t index;
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int pack;
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};
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enum qop {
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@ -507,6 +507,11 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c)
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queue(c, qpu_m_alu2(translate[qinst->op].op,
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dst,
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src[0], src[1]));
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if (qinst->dst.pack) {
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*last_inst(c) |= QPU_PM;
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*last_inst(c) |= QPU_SET_FIELD(qinst->dst.pack,
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QPU_PACK);
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}
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} else {
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queue(c, qpu_a_alu2(translate[qinst->op].op,
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dst,
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