pan/va: Test instruction selection lowerings
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15223>
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@ -165,6 +165,7 @@ if with_tests
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'test/test-scheduler-predicates.cpp',
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'valhall/test/test-add-imm.cpp',
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'valhall/test/test-validate-fau.cpp',
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'valhall/test/test-lower-isel.cpp',
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),
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c_args : [c_msvc_compat_args, no_override_init_args],
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gnu_symbol_visibility : 'hidden',
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@ -0,0 +1,108 @@
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/*
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* Copyright (C) 2021 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "va_compiler.h"
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#include "bi_test.h"
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#include "bi_builder.h"
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#include <gtest/gtest.h>
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static inline void
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case_cb(bi_context *ctx)
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{
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bi_foreach_instr_global(ctx, I) {
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va_lower_isel(I);
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}
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}
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#define CASE(instr, expected) INSTRUCTION_CASE(instr, expected, case_cb)
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#define NEGCASE(instr) CASE(instr, instr)
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class LowerIsel : public testing::Test {
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protected:
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LowerIsel() {
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mem_ctx = ralloc_context(NULL);
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reg = bi_register(1);
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}
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~LowerIsel() {
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ralloc_free(mem_ctx);
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}
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void *mem_ctx;
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bi_index reg;
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};
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TEST_F(LowerIsel, 8BitSwizzles) {
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for (unsigned i = 0; i < 4; ++i) {
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CASE(bi_swz_v4i8_to(b, reg, bi_byte(reg, i)),
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bi_iadd_v4u8_to(b, reg, bi_byte(reg, i), bi_zero(), false));
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}
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}
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TEST_F(LowerIsel, 16BitSwizzles) {
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for (unsigned i = 0; i < 2; ++i) {
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for (unsigned j = 0; j < 2; ++j) {
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CASE(bi_swz_v2i16_to(b, reg, bi_swz_16(reg, i, j)),
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bi_iadd_v2u16_to(b, reg, bi_swz_16(reg, i, j), bi_zero(), false));
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}
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}
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}
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TEST_F(LowerIsel, DiscardImplicitR60) {
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CASE(bi_discard_f32(b, reg, reg, BI_CMPF_EQ), {
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bi_instr *I = bi_discard_f32(b, reg, reg, BI_CMPF_EQ);
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I->dest[0] = bi_register(60);
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});
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}
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TEST_F(LowerIsel, JumpsLoweredToBranches) {
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bi_block block = { };
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CASE({
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bi_instr *I = bi_jump(b, bi_imm_u32(0xDEADBEEF));
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I->branch_target = █
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}, {
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bi_instr *I = bi_branchz_i16(b, bi_zero(), bi_imm_u32(0xDEADBEEF), BI_CMPF_EQ);
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I->branch_target = █
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});
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}
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TEST_F(LowerIsel, IndirectJumpsLoweredToBranches) {
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CASE(bi_jump(b, bi_register(17)),
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bi_branchzi(b, bi_zero(), bi_register(17), BI_CMPF_EQ));
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}
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TEST_F(LowerIsel, IntegerCSEL) {
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CASE(bi_csel_i32(b, reg, reg, reg, reg, BI_CMPF_EQ),
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bi_csel_u32(b, reg, reg, reg, reg, BI_CMPF_EQ));
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CASE(bi_csel_v2i16(b, reg, reg, reg, reg, BI_CMPF_EQ),
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bi_csel_v2u16(b, reg, reg, reg, reg, BI_CMPF_EQ));
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}
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TEST_F(LowerIsel, Smoke) {
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NEGCASE(bi_fadd_f32_to(b, reg, reg, reg, BI_ROUND_RTP));
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NEGCASE(bi_csel_s32_to(b, reg, reg, reg, reg, reg, BI_CMPF_LT));
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NEGCASE(bi_csel_u32_to(b, reg, reg, reg, reg, reg, BI_CMPF_LT));
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}
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