From 8995599c805ee1707549273ff1f4f28d17833ed6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= <daniel@schuermann.dev>
Date: Mon, 6 Sep 2021 14:47:21 +0200
Subject: [PATCH] aco/ra: try more aggressive to assign phi defs the same
 register

Totals from 4158 (2.77% of 150170) affected shaders: (GFX10.3)
VGPRs: 312008 -> 312000 (-0.00%)
CodeSize: 42902064 -> 42892200 (-0.02%); split: -0.06%, +0.04%
Instrs: 8086443 -> 8084532 (-0.02%); split: -0.07%, +0.05%
Latency: 138551153 -> 138215222 (-0.24%); split: -0.28%, +0.03%
InvThroughput: 39676773 -> 39570850 (-0.27%); split: -0.29%, +0.02%
SClause: 306299 -> 306284 (-0.00%); split: -0.01%, +0.00%
Copies: 552481 -> 553353 (+0.16%); split: -0.75%, +0.91%
Branches: 284381 -> 282409 (-0.69%); split: -0.74%, +0.04%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12836>
---
 src/amd/compiler/aco_register_allocation.cpp | 39 ++++++++++++++------
 1 file changed, 27 insertions(+), 12 deletions(-)

diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index b2b27bf6a04..7ce48fff7ff 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1915,6 +1915,32 @@ void
 get_regs_for_phis(ra_ctx& ctx, Block& block, RegisterFile& register_file,
                   std::vector<aco_ptr<Instruction>>& instructions, IDSet& live_in)
 {
+   /* assign phis with matching registers to that register */
+   for (aco_ptr<Instruction>& phi : block.instructions) {
+      if (!is_phi(phi))
+         break;
+      Definition& definition = phi->definitions[0];
+      if (definition.isKill() || definition.isFixed())
+         continue;
+
+      if (!phi->operands[0].isTemp())
+         continue;
+
+      PhysReg reg = phi->operands[0].physReg();
+      auto OpsSame = [=](const Operand& op) -> bool
+      { return op.isTemp() && (!op.isFixed() || op.physReg() == reg); };
+      bool all_same = std::all_of(phi->operands.cbegin() + 1, phi->operands.cend(), OpsSame);
+      if (!all_same)
+         continue;
+
+      if (!get_reg_specified(ctx, register_file, definition.regClass(), phi, reg))
+         continue;
+
+      definition.setFixed(reg);
+      register_file.fill(definition);
+      ctx.assignments[definition.tempId()].set(definition);
+   }
+
    /* look up the affinities */
    for (aco_ptr<Instruction>& phi : block.instructions) {
       if (!is_phi(phi))
@@ -1928,15 +1954,6 @@ get_regs_for_phis(ra_ctx& ctx, Block& block, RegisterFile& register_file,
          assignment& affinity = ctx.assignments[ctx.assignments[definition.tempId()].affinity];
          assert(affinity.rc == definition.regClass());
          PhysReg reg = affinity.reg;
-         if (reg == scc) {
-            /* only use scc if all operands are already placed there */
-            bool use_scc = std::all_of(phi->operands.begin(), phi->operands.end(),
-                                       [](const Operand& op) {
-                                          return op.isTemp() && op.isFixed() && op.physReg() == scc;
-                                       });
-            if (!use_scc)
-               continue;
-         }
 
          /* only assign if register is still free */
          if (!register_file.test(reg, definition.bytes())) {
@@ -1964,10 +1981,8 @@ get_regs_for_phis(ra_ctx& ctx, Block& block, RegisterFile& register_file,
             const Operand& op = phi->operands[i];
             if (!op.isTemp() || !op.isFixed())
                continue;
+
             PhysReg reg = op.physReg();
-            /* we tried this already on the previous loop */
-            if (reg == scc)
-               continue;
             if (get_reg_specified(ctx, register_file, definition.regClass(), phi, reg)) {
                definition.setFixed(reg);
                break;