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i965/generator/tex: Handle an immediate sampler with an indirect texture 

In this case we were dying when we tried to do SHL addr sampler imm(8)
because that puts an immediate in src0 of a two source instruction. This
fixes 2704 of the new separate sampler Vulkan CTS tests on Sky Lake.

Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Jason Ekstrand 2016-12-22 15:26:12 -08:00
parent 9e35426731
commit 88b5acfa09
2 changed files with 12 additions and 4 deletions
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8
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View File

@ -916,8 +916,12 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
if (brw_regs_equal(&surface_reg, &sampler_reg)) {
brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
} else {
brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
brw_OR(p, addr, addr, surface_reg);
if (sampler_reg.file == BRW_IMMEDIATE_VALUE) {
brw_OR(p, addr, surface_reg, brw_imm_ud(sampler_reg.ud << 8));
} else {
brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
brw_OR(p, addr, addr, surface_reg);
}
}
if (base_binding_table_index)
brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));

8
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
View File

@ -298,8 +298,12 @@ generate_tex(struct brw_codegen *p,
if (brw_regs_equal(&surface_reg, &sampler_reg)) {
brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
} else {
brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
brw_OR(p, addr, addr, surface_reg);
if (sampler_reg.file == BRW_IMMEDIATE_VALUE) {
brw_OR(p, addr, surface_reg, brw_imm_ud(sampler_reg.ud << 8));
} else {
brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
brw_OR(p, addr, addr, surface_reg);
}
}
if (base_binding_table_index)
brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));