i965/fs: use the new helper function to create double immediates
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -789,7 +789,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
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* a register and compare with that.
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*/
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fs_reg tmp = vgrf(glsl_type::double_type);
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bld.MOV(tmp, brw_imm_df(0.0));
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bld.MOV(tmp, setup_imm_df(bld, 0.0));
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/* A direct DF CMP using the flag register (null dst) won't work in
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* SIMD16 because the CMP will be split in two by lower_simd_width,
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@ -1128,7 +1128,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
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case nir_op_d2b: {
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/* two-argument instructions can't take 64-bit immediates */
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fs_reg zero = vgrf(glsl_type::double_type);
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bld.MOV(zero, brw_imm_df(0.0));
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bld.MOV(zero, setup_imm_df(bld, 0.0));
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/* A SIMD16 execution needs to be split in two instructions, so use
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* a vgrf instead of the flag register as dst so instruction splitting
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* works
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@ -1440,7 +1440,8 @@ fs_visitor::nir_emit_load_const(const fs_builder &bld,
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case 64:
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for (unsigned i = 0; i < instr->def.num_components; i++)
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bld.MOV(offset(reg, bld, i), brw_imm_df(instr->value.f64[i]));
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bld.MOV(offset(reg, bld, i),
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setup_imm_df(bld, instr->value.f64[i]));
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break;
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default:
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