i965: store DRM fd on intel_screen
v2: Fix storing of drm fd (Ajax) Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: <mesa-stable@lists.freedesktop.org> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1373 Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4086>
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@ -484,7 +484,7 @@ brw_init_perf_query_info(struct gl_context *ctx)
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if (perf_cfg)
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return perf_cfg->n_queries;
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if (!oa_metrics_kernel_support(brw->screen->driScrnPriv->fd, devinfo))
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if (!oa_metrics_kernel_support(brw->screen->fd, devinfo))
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return 0;
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perf_cfg = gen_perf_new(ctx);
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@ -505,8 +505,8 @@ brw_init_perf_query_info(struct gl_context *ctx)
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perf_cfg->vtbl.bo_busy = (bo_busy_t)brw_bo_busy;
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gen_perf_init_context(perf_ctx, perf_cfg, brw, brw->bufmgr, devinfo,
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brw->hw_ctx, brw->screen->driScrnPriv->fd);
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gen_perf_init_metrics(perf_cfg, devinfo, brw->screen->driScrnPriv->fd);
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brw->hw_ctx, brw->screen->fd);
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gen_perf_init_metrics(perf_cfg, devinfo, brw->screen->fd);
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return perf_cfg->n_queries;
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}
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@ -35,7 +35,6 @@ GLenum
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brw_get_graphics_reset_status(struct gl_context *ctx)
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{
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struct brw_context *brw = brw_context(ctx);
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__DRIscreen *dri_screen = brw->screen->driScrnPriv;
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struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx };
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/* If hardware contexts are not being used (or
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@ -51,7 +50,7 @@ brw_get_graphics_reset_status(struct gl_context *ctx)
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if (brw->reset_count != 0)
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return GL_NO_ERROR;
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if (drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
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if (drmIoctl(brw->screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
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return GL_NO_ERROR;
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/* A reset was observed while a batch from this context was executing.
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@ -77,10 +76,9 @@ brw_get_graphics_reset_status(struct gl_context *ctx)
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void
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brw_check_for_reset(struct brw_context *brw)
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{
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__DRIscreen *dri_screen = brw->screen->driScrnPriv;
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struct drm_i915_reset_stats stats = { .ctx_id = brw->hw_ctx };
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if (drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
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if (drmIoctl(brw->screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats) != 0)
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return;
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if (stats.batch_active > 0 || stats.batch_pending > 0)
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@ -675,8 +675,7 @@ throttle(struct brw_context *brw)
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}
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if (brw->need_flush_throttle) {
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__DRIscreen *dri_screen = brw->screen->driScrnPriv;
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drmCommandNone(dri_screen->fd, DRM_I915_GEM_THROTTLE);
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drmCommandNone(brw->screen->fd, DRM_I915_GEM_THROTTLE);
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brw->need_flush_throttle = false;
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}
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}
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@ -741,7 +740,6 @@ execbuffer(int fd,
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static int
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submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
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{
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__DRIscreen *dri_screen = brw->screen->driScrnPriv;
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struct intel_batchbuffer *batch = &brw->batch;
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int ret = 0;
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@ -808,7 +806,7 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
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batch->exec_bos[index] = tmp_bo;
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}
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ret = execbuffer(dri_screen->fd, batch, brw->hw_ctx,
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ret = execbuffer(brw->screen->fd, batch, brw->hw_ctx,
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4 * USED_BATCH(*batch),
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in_fence_fd, out_fence_fd, flags);
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@ -1675,7 +1675,7 @@ intel_get_param(struct intel_screen *screen, int param, int *value)
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gp.param = param;
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gp.value = value;
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if (drmIoctl(screen->driScrnPriv->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) {
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if (drmIoctl(screen->fd, DRM_IOCTL_I915_GETPARAM, &gp) == -1) {
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ret = -errno;
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if (ret != -EINVAL)
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_mesa_warning(NULL, "drm_i915_getparam: %d", ret);
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@ -1910,8 +1910,6 @@ err_out:
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static bool
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intel_init_bufmgr(struct intel_screen *screen)
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{
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__DRIscreen *dri_screen = screen->driScrnPriv;
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if (getenv("INTEL_NO_HW") != NULL)
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screen->no_hw = true;
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@ -1925,7 +1923,7 @@ intel_init_bufmgr(struct intel_screen *screen)
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break;
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}
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screen->bufmgr = brw_bufmgr_init(&screen->devinfo, dri_screen->fd, bo_reuse);
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screen->bufmgr = brw_bufmgr_init(&screen->devinfo, screen->fd, bo_reuse);
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if (screen->bufmgr == NULL) {
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fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
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__func__, __LINE__);
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@ -2097,8 +2095,7 @@ intel_detect_pipelined_register(struct intel_screen *screen,
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/* Don't bother with error checking - if the execbuf fails, the
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* value won't be written and we'll just report that there's no access.
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*/
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__DRIscreen *dri_screen = screen->driScrnPriv;
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drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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drmIoctl(screen->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf);
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/* Check whether the value got written. */
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void *results_map = brw_bo_map(NULL, results, MAP_READ);
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@ -2564,6 +2561,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
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return NULL;
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}
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screen->fd = dri_screen->fd;
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if (!intel_init_bufmgr(screen))
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return NULL;
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@ -2609,7 +2607,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
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screen->max_gtt_map_object_size = gtt_size / 4;
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}
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screen->aperture_threshold = get_aperture_size(dri_screen->fd) * 3 / 4;
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screen->aperture_threshold = get_aperture_size(screen->fd) * 3 / 4;
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screen->hw_has_swizzling = intel_detect_swizzling(screen);
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screen->hw_has_timestamp = intel_detect_timestamp(screen);
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@ -2798,7 +2796,7 @@ __DRIconfig **intelInitScreen2(__DRIscreen *dri_screen)
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struct drm_i915_reset_stats stats;
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memset(&stats, 0, sizeof(stats));
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const int ret = drmIoctl(dri_screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
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const int ret = drmIoctl(screen->fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
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screen->has_context_reset_notification =
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(ret != -1 || errno != EINVAL);
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@ -56,6 +56,9 @@ struct intel_screen
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/** Bytes of aperture usage beyond which execbuf is likely to fail. */
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uint64_t aperture_threshold;
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/** DRM fd associated with this screen. Not owned by this object. Do not close. */
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int fd;
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bool no_hw;
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bool hw_has_swizzling;
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bool has_exec_fence; /**< I915_PARAM_HAS_EXEC_FENCE */
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