From 85cbff5b60c79731a583104a0c2b32ee149b8c8c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 15 Apr 2010 23:15:41 +0200 Subject: [PATCH] r300g: mask out the mirrored bit correctly in the registers It was previously done wrong + now it shouldn't render garbage, so that the NPOT fallback can get in. --- src/gallium/drivers/r300/r300_state_derived.c | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index a36cff98c38..46c192eae14 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -514,22 +514,22 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300) * This prevents incorrect rendering. */ texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK; - /* Set repeat or mirrored-repeat to clamp-to-edge. */ - /* Wrap S. */ - if ((texstate->filter0 & R300_TX_WRAP_S_MASK) == - R300_TX_WRAP_S(R300_TX_REPEAT) || - (texstate->filter0 & R300_TX_WRAP_S_MASK) == - R300_TX_WRAP_S(R300_TX_MIRRORED)) { - texstate->filter0 &= ~R300_TX_WRAP_S_MASK; - texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE); + /* Mask out the mirrored flag. */ + if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) { + texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED); + } + if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) { + texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED); } - /* Wrap T. */ + /* Change repeat to clamp-to-edge. + * (the repeat bit has a value of 0, no masking needed). */ + if ((texstate->filter0 & R300_TX_WRAP_S_MASK) == + R300_TX_WRAP_S(R300_TX_REPEAT)) { + texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE); + } if ((texstate->filter0 & R300_TX_WRAP_T_MASK) == - R300_TX_WRAP_T(R300_TX_REPEAT) || - (texstate->filter0 & R300_TX_WRAP_T_MASK) == - R300_TX_WRAP_T(R300_TX_MIRRORED)) { - texstate->filter0 &= ~R300_TX_WRAP_T_MASK; + R300_TX_WRAP_T(R300_TX_REPEAT)) { texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); } } else {