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radv: Remove syncobj reset mechanism. 

Now done with the vulkan runtime.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13974>
This commit is contained in:
Bas Nieuwenhuizen 2021-11-28 21:02:30 +01:00 committed by Marge Bot
parent 91fe0b5629
commit 84ec547f69
3 changed files with 9 additions and 141 deletions
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139
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
View File

@ -85,7 +85,6 @@ struct radv_amdgpu_cs {
struct radv_winsys_sem_counts {
uint32_t syncobj_count;
uint32_t syncobj_reset_count; /* for wait only, whether to reset the syncobj */
uint32_t timeline_syncobj_count;
uint32_t *syncobj;
uint64_t *points;
@ -1248,13 +1247,6 @@ radv_amdgpu_cs_submit_zero(struct radv_amdgpu_ctx *ctx, enum ring_type ring_type
ctx->queue_syncobj_wait[hw_ip][queue_idx] = true;
}
if (sem_info->wait.syncobj_reset_count) {
ret = amdgpu_cs_syncobj_reset(ctx->ws->dev, sem_info->wait.syncobj,
sem_info->wait.syncobj_reset_count);
if (ret < 0)
return VK_ERROR_DEVICE_LOST;
}
for (unsigned i = 0; i < sem_info->signal.syncobj_count; ++i) {
ret = amdgpu_cs_syncobj_transfer(ctx->ws->dev, sem_info->signal.syncobj[i], 0, queue_syncobj,
0, 0);
@ -1526,11 +1518,9 @@ radv_amdgpu_ctx_wait_idle(struct radeon_winsys_ctx *rwctx, enum ring_type ring_t
}
static void *
radv_amdgpu_cs_alloc_syncobj_chunk(struct radv_winsys_sem_counts *counts,
const uint32_t *syncobj_override, uint32_t queue_syncobj,
radv_amdgpu_cs_alloc_syncobj_chunk(struct radv_winsys_sem_counts *counts, uint32_t queue_syncobj,
struct drm_amdgpu_cs_chunk *chunk, int chunk_id)
{
const uint32_t *src = syncobj_override ? syncobj_override : counts->syncobj;
unsigned count = counts->syncobj_count + (queue_syncobj ? 1 : 0);
struct drm_amdgpu_cs_chunk_sem *syncobj =
malloc(sizeof(struct drm_amdgpu_cs_chunk_sem) * count);
@ -1539,7 +1529,7 @@ radv_amdgpu_cs_alloc_syncobj_chunk(struct radv_winsys_sem_counts *counts,
for (unsigned i = 0; i < counts->syncobj_count; i++) {
struct drm_amdgpu_cs_chunk_sem *sem = &syncobj[i];
sem->handle = src[i];
sem->handle = counts->syncobj[i];
}
if (queue_syncobj)
@ -1553,11 +1543,9 @@ radv_amdgpu_cs_alloc_syncobj_chunk(struct radv_winsys_sem_counts *counts,
static void *
radv_amdgpu_cs_alloc_timeline_syncobj_chunk(struct radv_winsys_sem_counts *counts,
const uint32_t *syncobj_override,
uint32_t queue_syncobj,
struct drm_amdgpu_cs_chunk *chunk, int chunk_id)
{
const uint32_t *src = syncobj_override ? syncobj_override : counts->syncobj;
uint32_t count =
counts->syncobj_count + counts->timeline_syncobj_count + (queue_syncobj ? 1 : 0);
struct drm_amdgpu_cs_chunk_syncobj *syncobj =
@ -1567,7 +1555,7 @@ radv_amdgpu_cs_alloc_timeline_syncobj_chunk(struct radv_winsys_sem_counts *count
for (unsigned i = 0; i < counts->syncobj_count; i++) {
struct drm_amdgpu_cs_chunk_syncobj *sem = &syncobj[i];
sem->handle = src[i];
sem->handle = counts->syncobj[i];
sem->flags = 0;
sem->point = 0;
}
@ -1591,103 +1579,6 @@ radv_amdgpu_cs_alloc_timeline_syncobj_chunk(struct radv_winsys_sem_counts *count
return syncobj;
}
static int
radv_amdgpu_cache_alloc_syncobjs(struct radv_amdgpu_winsys *ws, unsigned count, uint32_t *dst)
{
pthread_mutex_lock(&ws->syncobj_lock);
if (count > ws->syncobj_capacity) {
if (ws->syncobj_capacity > UINT32_MAX / 2)
goto fail;
unsigned new_capacity = MAX2(count, ws->syncobj_capacity * 2);
uint32_t *n = realloc(ws->syncobj, new_capacity * sizeof(*ws->syncobj));
if (!n)
goto fail;
ws->syncobj_capacity = new_capacity;
ws->syncobj = n;
}
while (ws->syncobj_count < count) {
int r = amdgpu_cs_create_syncobj(ws->dev, ws->syncobj + ws->syncobj_count);
if (r)
goto fail;
++ws->syncobj_count;
}
for (unsigned i = 0; i < count; ++i)
dst[i] = ws->syncobj[--ws->syncobj_count];
pthread_mutex_unlock(&ws->syncobj_lock);
return 0;
fail:
pthread_mutex_unlock(&ws->syncobj_lock);
return -ENOMEM;
}
static void
radv_amdgpu_cache_free_syncobjs(struct radv_amdgpu_winsys *ws, unsigned count, uint32_t *src)
{
pthread_mutex_lock(&ws->syncobj_lock);
uint32_t cache_count = MIN2(count, UINT32_MAX - ws->syncobj_count);
if (cache_count + ws->syncobj_count > ws->syncobj_capacity) {
unsigned new_capacity = MAX2(ws->syncobj_count + cache_count, ws->syncobj_capacity * 2);
uint32_t *n = realloc(ws->syncobj, new_capacity * sizeof(*ws->syncobj));
if (n) {
ws->syncobj_capacity = new_capacity;
ws->syncobj = n;
}
}
for (unsigned i = 0; i < count; ++i) {
if (ws->syncobj_count < ws->syncobj_capacity)
ws->syncobj[ws->syncobj_count++] = src[i];
else
amdgpu_cs_destroy_syncobj(ws->dev, src[i]);
}
pthread_mutex_unlock(&ws->syncobj_lock);
}
static int
radv_amdgpu_cs_prepare_syncobjs(struct radv_amdgpu_winsys *ws,
struct radv_winsys_sem_counts *counts, uint32_t **out_syncobjs)
{
int r = 0;
if (!ws->info.has_timeline_syncobj || !counts->syncobj_count) {
*out_syncobjs = NULL;
return 0;
}
*out_syncobjs = malloc(counts->syncobj_count * sizeof(**out_syncobjs));
if (!*out_syncobjs)
return -ENOMEM;
r = radv_amdgpu_cache_alloc_syncobjs(ws, counts->syncobj_count, *out_syncobjs);
if (r)
return r;
for (unsigned i = 0; i < counts->syncobj_count; ++i) {
r = amdgpu_cs_syncobj_transfer(ws->dev, (*out_syncobjs)[i], 0, counts->syncobj[i], 0,
DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT);
if (r)
goto fail;
}
r = amdgpu_cs_syncobj_reset(ws->dev, counts->syncobj, counts->syncobj_reset_count);
if (r)
goto fail;
return 0;
fail:
radv_amdgpu_cache_free_syncobjs(ws, counts->syncobj_count, *out_syncobjs);
free(*out_syncobjs);
*out_syncobjs = NULL;
return r;
}
static VkResult
radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request *request,
struct radv_winsys_sem_info *sem_info)
@ -1700,7 +1591,6 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
bool use_bo_list_create = ctx->ws->info.drm_minor < 27;
struct drm_amdgpu_bo_list_in bo_list_in;
void *wait_syncobj = NULL, *signal_syncobj = NULL;
uint32_t *in_syncobjs = NULL;
int i;
uint32_t bo_list = 0;
VkResult result = VK_SUCCESS;
@ -1754,20 +1644,14 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
if (sem_info->cs_emit_wait && (sem_info->wait.timeline_syncobj_count ||
sem_info->wait.syncobj_count || *queue_syncobj_wait)) {
uint32_t queue_wait_syncobj = *queue_syncobj_wait ? queue_syncobj : 0;
r = radv_amdgpu_cs_prepare_syncobjs(ctx->ws, &sem_info->wait, &in_syncobjs);
if (r)
goto error_out;
if (ctx->ws->info.has_timeline_syncobj) {
wait_syncobj = radv_amdgpu_cs_alloc_timeline_syncobj_chunk(
&sem_info->wait, in_syncobjs, queue_wait_syncobj, &chunks[num_chunks],
&sem_info->wait, queue_syncobj, &chunks[num_chunks],
AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_WAIT);
} else {
wait_syncobj =
radv_amdgpu_cs_alloc_syncobj_chunk(&sem_info->wait, in_syncobjs, queue_wait_syncobj,
&chunks[num_chunks], AMDGPU_CHUNK_ID_SYNCOBJ_IN);
wait_syncobj = radv_amdgpu_cs_alloc_syncobj_chunk(
&sem_info->wait, queue_syncobj, &chunks[num_chunks], AMDGPU_CHUNK_ID_SYNCOBJ_IN);
}
if (!wait_syncobj) {
result = VK_ERROR_OUT_OF_HOST_MEMORY;
@ -1782,12 +1666,11 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
if (sem_info->cs_emit_signal) {
if (ctx->ws->info.has_timeline_syncobj) {
signal_syncobj = radv_amdgpu_cs_alloc_timeline_syncobj_chunk(
&sem_info->signal, NULL, queue_syncobj, &chunks[num_chunks],
&sem_info->signal, queue_syncobj, &chunks[num_chunks],
AMDGPU_CHUNK_ID_SYNCOBJ_TIMELINE_SIGNAL);
} else {
signal_syncobj =
radv_amdgpu_cs_alloc_syncobj_chunk(&sem_info->signal, NULL, queue_syncobj,
&chunks[num_chunks], AMDGPU_CHUNK_ID_SYNCOBJ_OUT);
signal_syncobj = radv_amdgpu_cs_alloc_syncobj_chunk(
&sem_info->signal, queue_syncobj, &chunks[num_chunks], AMDGPU_CHUNK_ID_SYNCOBJ_OUT);
}
if (!signal_syncobj) {
result = VK_ERROR_OUT_OF_HOST_MEMORY;
@ -1848,10 +1731,6 @@ radv_amdgpu_cs_submit(struct radv_amdgpu_ctx *ctx, struct radv_amdgpu_cs_request
amdgpu_bo_list_destroy_raw(ctx->ws->dev, bo_list);
error_out:
if (in_syncobjs) {
radv_amdgpu_cache_free_syncobjs(ctx->ws, sem_info->wait.syncobj_count, in_syncobjs);
free(in_syncobjs);
}
free(chunks);
free(chunk_data);
free(wait_syncobj);

6
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c
View File

@ -164,17 +164,12 @@ radv_amdgpu_winsys_destroy(struct radeon_winsys *rws)
if (!destroy)
return;
for (unsigned i = 0; i < ws->syncobj_count; ++i)
amdgpu_cs_destroy_syncobj(ws->dev, ws->syncobj[i]);
free(ws->syncobj);
u_rwlock_destroy(&ws->global_bo_list.lock);
free(ws->global_bo_list.bos);
if (ws->reserve_vmid)
amdgpu_vm_unreserve_vmid(ws->dev, 0);
pthread_mutex_destroy(&ws->syncobj_lock);
u_rwlock_destroy(&ws->log_bo_list_lock);
ac_addrlib_destroy(ws->addrlib);
amdgpu_device_deinitialize(ws->dev);
@ -266,7 +261,6 @@ radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags,
u_rwlock_init(&ws->global_bo_list.lock);
list_inithead(&ws->log_bo_list);
u_rwlock_init(&ws->log_bo_list_lock);
pthread_mutex_init(&ws->syncobj_lock, NULL);
ws->base.query_info = radv_amdgpu_winsys_query_info;
ws->base.query_value = radv_amdgpu_winsys_query_value;
ws->base.read_registers = radv_amdgpu_winsys_read_registers;

5
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h
View File

@ -65,11 +65,6 @@ struct radv_amdgpu_winsys {
struct u_rwlock lock;
} global_bo_list;
/* syncobj cache */
pthread_mutex_t syncobj_lock;
uint32_t *syncobj;
uint32_t syncobj_count, syncobj_capacity;
/* BO log */
struct u_rwlock log_bo_list_lock;
struct list_head log_bo_list;