ac/surface: use a less strict condition in is_dcc_supported_by_L2
While Mesa chooses to always use independent_128B_blocks, other drivers can make different choices. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
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@ -1453,23 +1453,24 @@ ASSERTED static bool is_dcc_supported_by_L2(const struct radeon_info *info,
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surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
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surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
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}
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}
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bool valid_64b = surf->u.gfx9.color.dcc.independent_64B_blocks &&
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surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B;
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bool valid_128b = surf->u.gfx9.color.dcc.independent_128B_blocks &&
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surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_128B;
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if (info->family == CHIP_NAVI12 || info->family == CHIP_NAVI14) {
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if (info->family == CHIP_NAVI12 || info->family == CHIP_NAVI14) {
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/* Either 64B or 128B can be used, but not both.
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/* Either 64B or 128B can be used, but not both.
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* If 64B is used, DCC image stores are unsupported.
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* If 64B is used, DCC image stores are unsupported.
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*/
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*/
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return surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
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return surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
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(!surf->u.gfx9.color.dcc.independent_64B_blocks ||
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(valid_64b || valid_128b);
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surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B) &&
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(!surf->u.gfx9.color.dcc.independent_128B_blocks ||
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surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B);
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}
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}
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/* 128B is recommended, but 64B can be set too if needed for 4K by DCN.
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/* Valid settings are the same as NAVI14 + (64B && 128B && max_compressed_block_size == 64B) */
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* Since there is no reason to ever disable 128B, require it.
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return (surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
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* If 64B is used, DCC image stores are unsupported.
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(valid_64b || valid_128b)) ||
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*/
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(surf->u.gfx9.color.dcc.independent_64B_blocks &&
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return surf->u.gfx9.color.dcc.independent_128B_blocks &&
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surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
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surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
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}
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}
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static bool gfx10_DCN_requires_independent_64B_blocks(const struct radeon_info *info,
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static bool gfx10_DCN_requires_independent_64B_blocks(const struct radeon_info *info,
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