nir_to_tgsi: Add support for HW atomics.
Found missing when taking virgl on the nir-to-tgsi path. Needs an SSBO fix as well to pass all of the atomic_counters tests. Reviewed-by: Adam Jackson <ajax@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11937>
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@ -423,6 +423,10 @@ ntt_setup_uniforms(struct ntt_compile *c)
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var->data.image.format,
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!(var->data.access & ACCESS_NON_WRITEABLE),
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false);
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} else if (glsl_contains_atomic(var->type)) {
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uint32_t offset = var->data.offset / 4;
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uint32_t size = glsl_atomic_size(var->type) / 4;
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ureg_DECL_hw_atomic(c->ureg, offset, offset + size - 1, var->data.binding, 0);
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} else {
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unsigned size;
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if (packed) {
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@ -1284,7 +1288,8 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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{
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bool is_store = (instr->intrinsic == nir_intrinsic_store_ssbo ||
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instr->intrinsic == nir_intrinsic_store_shared);
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bool is_load = (instr->intrinsic == nir_intrinsic_load_ssbo ||
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bool is_load = (instr->intrinsic == nir_intrinsic_atomic_counter_read ||
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instr->intrinsic == nir_intrinsic_load_ssbo ||
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instr->intrinsic == nir_intrinsic_load_shared);
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unsigned opcode;
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struct ureg_src src[4];
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@ -1302,6 +1307,14 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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memory = ureg_src_register(TGSI_FILE_MEMORY, 0);
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nir_src = 0;
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break;
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case nir_var_uniform: { /* HW atomic buffers */
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uint32_t offset = nir_src_as_uint(instr->src[0]);
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memory = ureg_src_dimension(ureg_src_register(TGSI_FILE_HW_ATOMIC, offset / 4),
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nir_intrinsic_base(instr));
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nir_src = 0;
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break;
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}
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default:
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unreachable("unknown memory type");
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}
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@ -1313,13 +1326,26 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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src[num_src++] = memory;
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if (instr->intrinsic != nir_intrinsic_get_ssbo_size) {
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src[num_src++] = ntt_get_src(c, instr->src[nir_src++]); /* offset */
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if (!is_load)
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src[num_src++] = ntt_get_src(c, instr->src[nir_src++]); /* value */
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switch (instr->intrinsic) {
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case nir_intrinsic_atomic_counter_inc:
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src[num_src++] = ureg_imm1i(c->ureg, 1);
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break;
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case nir_intrinsic_atomic_counter_post_dec:
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src[num_src++] = ureg_imm1i(c->ureg, -1);
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break;
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default:
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if (!is_load)
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src[num_src++] = ntt_get_src(c, instr->src[nir_src++]); /* value */
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break;
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}
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}
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}
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switch (instr->intrinsic) {
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case nir_intrinsic_atomic_counter_add:
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case nir_intrinsic_atomic_counter_inc:
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case nir_intrinsic_atomic_counter_post_dec:
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case nir_intrinsic_ssbo_atomic_add:
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case nir_intrinsic_shared_atomic_add:
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opcode = TGSI_OPCODE_ATOMUADD;
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@ -1328,10 +1354,12 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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case nir_intrinsic_shared_atomic_fadd:
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opcode = TGSI_OPCODE_ATOMFADD;
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break;
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case nir_intrinsic_atomic_counter_min:
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case nir_intrinsic_ssbo_atomic_imin:
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case nir_intrinsic_shared_atomic_imin:
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opcode = TGSI_OPCODE_ATOMIMIN;
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break;
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case nir_intrinsic_atomic_counter_max:
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case nir_intrinsic_ssbo_atomic_imax:
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case nir_intrinsic_shared_atomic_imax:
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opcode = TGSI_OPCODE_ATOMIMAX;
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@ -1344,27 +1372,33 @@ ntt_emit_mem(struct ntt_compile *c, nir_intrinsic_instr *instr,
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case nir_intrinsic_shared_atomic_umax:
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opcode = TGSI_OPCODE_ATOMUMAX;
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break;
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case nir_intrinsic_atomic_counter_and:
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case nir_intrinsic_ssbo_atomic_and:
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case nir_intrinsic_shared_atomic_and:
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opcode = TGSI_OPCODE_ATOMAND;
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break;
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case nir_intrinsic_atomic_counter_or:
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case nir_intrinsic_ssbo_atomic_or:
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case nir_intrinsic_shared_atomic_or:
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opcode = TGSI_OPCODE_ATOMOR;
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break;
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case nir_intrinsic_atomic_counter_xor:
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case nir_intrinsic_ssbo_atomic_xor:
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case nir_intrinsic_shared_atomic_xor:
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opcode = TGSI_OPCODE_ATOMXOR;
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break;
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case nir_intrinsic_atomic_counter_exchange:
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case nir_intrinsic_ssbo_atomic_exchange:
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case nir_intrinsic_shared_atomic_exchange:
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opcode = TGSI_OPCODE_ATOMXCHG;
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break;
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case nir_intrinsic_atomic_counter_comp_swap:
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case nir_intrinsic_ssbo_atomic_comp_swap:
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case nir_intrinsic_shared_atomic_comp_swap:
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opcode = TGSI_OPCODE_ATOMCAS;
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src[num_src++] = ntt_get_src(c, instr->src[nir_src++]);
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break;
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case nir_intrinsic_atomic_counter_read:
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case nir_intrinsic_load_ssbo:
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case nir_intrinsic_load_shared:
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opcode = TGSI_OPCODE_LOAD;
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@ -1778,6 +1812,23 @@ ntt_emit_intrinsic(struct ntt_compile *c, nir_intrinsic_instr *instr)
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ntt_emit_mem(c, instr, nir_var_mem_shared);
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break;
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case nir_intrinsic_atomic_counter_read:
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case nir_intrinsic_atomic_counter_add:
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case nir_intrinsic_atomic_counter_inc:
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case nir_intrinsic_atomic_counter_post_dec:
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case nir_intrinsic_atomic_counter_min:
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case nir_intrinsic_atomic_counter_max:
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case nir_intrinsic_atomic_counter_and:
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case nir_intrinsic_atomic_counter_or:
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case nir_intrinsic_atomic_counter_xor:
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case nir_intrinsic_atomic_counter_exchange:
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case nir_intrinsic_atomic_counter_comp_swap:
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ntt_emit_mem(c, instr, nir_var_uniform);
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break;
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case nir_intrinsic_atomic_counter_pre_dec:
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unreachable("Should be lowered by ntt_lower_atomic_pre_dec()");
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break;
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case nir_intrinsic_image_load:
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case nir_intrinsic_image_store:
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case nir_intrinsic_image_size:
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@ -2780,6 +2831,32 @@ ntt_fix_nir_options(struct pipe_screen *screen, struct nir_shader *s)
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}
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}
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static bool
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ntt_lower_atomic_pre_dec_filter(const nir_instr *instr, const void *_data)
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{
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return (instr->type == nir_instr_type_intrinsic &&
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nir_instr_as_intrinsic(instr)->intrinsic == nir_intrinsic_atomic_counter_pre_dec);
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}
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static nir_ssa_def *
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ntt_lower_atomic_pre_dec_lower(nir_builder *b, nir_instr *instr, void *_data)
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{
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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nir_ssa_def *old_result = &intr->dest.ssa;
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intr->intrinsic = nir_intrinsic_atomic_counter_post_dec;
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return nir_iadd_imm(b, old_result, -1);
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}
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static bool
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ntt_lower_atomic_pre_dec(nir_shader *s)
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{
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return nir_shader_lower_instructions(s,
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ntt_lower_atomic_pre_dec_filter,
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ntt_lower_atomic_pre_dec_lower, NULL);
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}
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/* Lowers texture projectors if we can't do them as TGSI_OPCODE_TXP. */
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static void
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nir_to_tgsi_lower_txp(nir_shader *s)
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@ -2848,6 +2925,9 @@ nir_to_tgsi(struct nir_shader *s,
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nir_to_tgsi_lower_txp(s);
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NIR_PASS_V(s, nir_to_tgsi_lower_tex);
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if (s->info.num_abos)
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NIR_PASS_V(s, ntt_lower_atomic_pre_dec);
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if (!original_options->lower_uniforms_to_ubo) {
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NIR_PASS_V(s, nir_lower_uniforms_to_ubo,
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screen->get_param(screen, PIPE_CAP_PACKED_UNIFORMS),
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