radv/aco,aco: allow SMEM SSBO loads on GFX6/7
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5207>
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@ -5145,7 +5145,7 @@ void load_buffer(isel_context *ctx, unsigned num_components, unsigned component_
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{
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Builder bld(ctx->program, ctx->block);
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bool use_smem = dst.type() != RegType::vgpr && (ctx->options->chip_class >= GFX8 || readonly) && allow_smem;
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bool use_smem = dst.type() != RegType::vgpr && (!glc || ctx->options->chip_class >= GFX8) && allow_smem;
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if (use_smem)
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offset = bld.as_uniform(offset);
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@ -348,7 +348,7 @@ void fill_desc_set_info(isel_context *ctx, nir_function_impl *impl)
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bool glc = access & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE);
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_ssbo: {
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if (nir_dest_is_divergent(intrin->dest) || ctx->program->chip_class < GFX8)
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if (nir_dest_is_divergent(intrin->dest) && (!glc || ctx->program->chip_class >= GFX8))
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flags |= glc ? has_glc_vmem_load : has_nonglc_vmem_load;
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res = intrin->src[0].ssa;
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break;
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@ -2953,8 +2953,7 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
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flush_bits |= RADV_CMD_FLAG_INV_VCACHE;
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/* Unlike LLVM, ACO uses SMEM for SSBOs and we have to
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* invalidate the scalar cache. */
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if (cmd_buffer->device->physical_device->use_aco &&
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cmd_buffer->device->physical_device->rad_info.chip_class >= GFX8)
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if (cmd_buffer->device->physical_device->use_aco)
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flush_bits |= RADV_CMD_FLAG_INV_SCACHE;
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if (!image_is_coherent)
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