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radv: remove radv_image_iview::bo 

This saves one 64-bit pointer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10218>
This commit is contained in:
Samuel Pitoiset 2021-04-13 18:55:16 +02:00 committed by Marge Bot
parent 9da4590df8
commit 8198aeac8d
5 changed files with 11 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/amd/vulkan/radv_cmd_buffer.c
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@ -2322,7 +2322,7 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
VkImageLayout layout = subpass->color_attachments[i].layout; VkImageLayout layout = subpass->color_attachments[i].layout;
bool in_render_loop = subpass->color_attachments[i].in_render_loop; bool in_render_loop = subpass->color_attachments[i].in_render_loop;
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, iview->bo); radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, iview->image->bo);
assert(iview->aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT | VK_IMAGE_ASPECT_PLANE_0_BIT | assert(iview->aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT | VK_IMAGE_ASPECT_PLANE_0_BIT |
VK_IMAGE_ASPECT_PLANE_1_BIT | VK_IMAGE_ASPECT_PLANE_2_BIT)); VK_IMAGE_ASPECT_PLANE_1_BIT | VK_IMAGE_ASPECT_PLANE_2_BIT));
@ -2338,7 +2338,7 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
bool in_render_loop = subpass->depth_stencil_attachment->in_render_loop; bool in_render_loop = subpass->depth_stencil_attachment->in_render_loop;
struct radv_image_view *iview = cmd_buffer->state.attachments[idx].iview; struct radv_image_view *iview = cmd_buffer->state.attachments[idx].iview;
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs,
cmd_buffer->state.attachments[idx].iview->bo); cmd_buffer->state.attachments[idx].iview->image->bo);
radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, iview, layout, radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, iview, layout,
in_render_loop); in_render_loop);

4
src/amd/vulkan/radv_descriptor_set.c
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@ -1062,9 +1062,9 @@ write_image_descriptor(struct radv_device *device, struct radv_cmd_buffer *cmd_b
memcpy(dst, descriptor, size); memcpy(dst, descriptor, size);
if (cmd_buffer) if (cmd_buffer)
radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->bo); radv_cs_add_buffer(device->ws, cmd_buffer->cs, iview->image->bo);
else else
*buffer_list = iview->bo; *buffer_list = iview->image->bo;
} }
static void static void

14
src/amd/vulkan/radv_device.c
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@ -6363,7 +6363,7 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff
/* Intensity is implemented as Red, so treat it that way. */ /* Intensity is implemented as Red, so treat it that way. */
cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == PIPE_SWIZZLE_1); cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == PIPE_SWIZZLE_1);
va = radv_buffer_get_va(iview->bo) + iview->image->offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset;
cb->cb_color_base = va >> 8; cb->cb_color_base = va >> 8;
@ -6425,11 +6425,11 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff
} }
/* CMASK variables */ /* CMASK variables */
va = radv_buffer_get_va(iview->bo) + iview->image->offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset;
va += surf->cmask_offset; va += surf->cmask_offset;
cb->cb_color_cmask = va >> 8; cb->cb_color_cmask = va >> 8;
va = radv_buffer_get_va(iview->bo) + iview->image->offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset;
va += surf->meta_offset; va += surf->meta_offset;
if (radv_dcc_enabled(iview->image, iview->base_mip) && if (radv_dcc_enabled(iview->image, iview->base_mip) &&
@ -6455,7 +6455,7 @@ radv_initialise_color_surface(struct radv_device *device, struct radv_color_buff
} }
if (radv_image_has_fmask(iview->image)) { if (radv_image_has_fmask(iview->image)) {
va = radv_buffer_get_va(iview->bo) + iview->image->offset + surf->fmask_offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset + surf->fmask_offset;
cb->cb_color_fmask = va >> 8; cb->cb_color_fmask = va >> 8;
cb->cb_color_fmask |= surf->fmask_tile_swizzle; cb->cb_color_fmask |= surf->fmask_tile_swizzle;
} else { } else {
@ -6648,7 +6648,7 @@ radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_inf
ds->db_htile_data_base = 0; ds->db_htile_data_base = 0;
ds->db_htile_surface = 0; ds->db_htile_surface = 0;
va = radv_buffer_get_va(iview->bo) + iview->image->offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset;
s_offs = z_offs = va; s_offs = z_offs = va;
if (device->physical_device->rad_info.chip_class >= GFX9) { if (device->physical_device->rad_info.chip_class >= GFX9) {
@ -6692,7 +6692,7 @@ radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_inf
ds->db_stencil_info |= S_02803C_TILE_STENCIL_DISABLE(1); ds->db_stencil_info |= S_02803C_TILE_STENCIL_DISABLE(1);
} }
va = radv_buffer_get_va(iview->bo) + iview->image->offset + surf->meta_offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset + surf->meta_offset;
ds->db_htile_data_base = va >> 8; ds->db_htile_data_base = va >> 8;
ds->db_htile_surface = S_028ABC_FULL_CACHE(1) | S_028ABC_PIPE_ALIGNED(1); ds->db_htile_surface = S_028ABC_FULL_CACHE(1) | S_028ABC_PIPE_ALIGNED(1);
@ -6761,7 +6761,7 @@ radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_inf
ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1); ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
} }
va = radv_buffer_get_va(iview->bo) + iview->image->offset + surf->meta_offset; va = radv_buffer_get_va(iview->image->bo) + iview->image->offset + surf->meta_offset;
ds->db_htile_data_base = va >> 8; ds->db_htile_data_base = va >> 8;
ds->db_htile_surface = S_028ABC_FULL_CACHE(1); ds->db_htile_surface = S_028ABC_FULL_CACHE(1);

1
src/amd/vulkan/radv_image.c
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@ -1796,7 +1796,6 @@ radv_image_view_init(struct radv_image_view *iview, struct radv_device *device,
unreachable("bad VkImageType"); unreachable("bad VkImageType");
} }
iview->image = image; iview->image = image;
iview->bo = image->bo;
iview->type = pCreateInfo->viewType; iview->type = pCreateInfo->viewType;
iview->plane_id = radv_plane_from_aspect(pCreateInfo->subresourceRange.aspectMask); iview->plane_id = radv_plane_from_aspect(pCreateInfo->subresourceRange.aspectMask);
iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask; iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;

1
src/amd/vulkan/radv_private.h
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@ -2116,7 +2116,6 @@ union radv_descriptor {
struct radv_image_view { struct radv_image_view {
struct vk_object_base base; struct vk_object_base base;
struct radv_image *image; /**< VkImageViewCreateInfo::image */ struct radv_image *image; /**< VkImageViewCreateInfo::image */
struct radeon_winsys_bo *bo;
VkImageViewType type; VkImageViewType type;
VkImageAspectFlags aspect_mask; VkImageAspectFlags aspect_mask;