radeonsi: enable PIPE_CAP_FORCE_PERSAMPLE_INTERP
Now st/mesa won't generate 2 variants for this state. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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@ -295,6 +295,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_TEXTURE_QUERY_LOD:
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case PIPE_CAP_TEXTURE_GATHER_SM5:
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case PIPE_CAP_TGSI_TXQS:
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case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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return 1;
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case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
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@ -336,7 +337,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
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case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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return 0;
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case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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