gallium: add caps for sparse texture support

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14223>
This commit is contained in:
Qiang Yu 2021-12-03 16:12:42 +08:00
parent bcaf9704ad
commit 7f48aba641
5 changed files with 22 additions and 0 deletions

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@ -632,6 +632,10 @@ The integer capabilities:
* ``PIPE_CAP_PREFER_BACK_BUFFER_REUSE``: Only applies to DRI_PRIME. If 1, the driver prefers that DRI3 tries to use the same back buffer each frame. If 0, this means DRI3 will at least use 2 back buffers and ping-pong between them to allow the tiled->linear copy to run in parallel.
* ``PIPE_CAP_DRAW_VERTEX_STATE``: Driver supports `pipe_screen::create_vertex_state/vertex_state_destroy` and `pipe_context::draw_vertex_state`. Only used by display lists and designed to serve vbo_save.
* ``PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS``: Driver prefers varyings to be aligned to power of two in a slot. If this cap is enabled, vec4 varying will be placed in .xyzw components of the varying slot, vec3 in .xyz and vec2 in .xy or .zw
* ``PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE``: Maximum 1D/2D/rectangle texture image dimension for a sparse texture.
* ``PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE``: Maximum 3D texture image dimension for a sparse texture.
* ``PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS``: Maximum number of layers in a sparse array texture.
* ``PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS``: TRUE if there are no restrictions on the allocation of mipmaps in sparse textures and FALSE otherwise. See SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS_ARB description in ARB_sparse_texture extension spec.
.. _pipe_capf:

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@ -480,6 +480,12 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
case PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS:
return 0;
case PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS:
case PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS:
return 0;
default:
unreachable("bad PIPE_CAP_*");
}

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@ -405,6 +405,10 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB:
case PIPE_CAP_DRAW_VERTEX_STATE:
case PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS:
case PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS:
case PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS:
return 0;
case PIPE_CAP_VENDOR_ID:

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@ -434,6 +434,10 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_SAMPLER_REDUCTION_MINMAX_ARB:
case PIPE_CAP_DRAW_VERTEX_STATE:
case PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS:
case PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE:
case PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS:
case PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS:
return 0;
case PIPE_CAP_VENDOR_ID:

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@ -1000,6 +1000,10 @@ enum pipe_cap
PIPE_CAP_PREFER_BACK_BUFFER_REUSE,
PIPE_CAP_DRAW_VERTEX_STATE,
PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS,
PIPE_CAP_MAX_SPARSE_TEXTURE_SIZE,
PIPE_CAP_MAX_SPARSE_3D_TEXTURE_SIZE,
PIPE_CAP_MAX_SPARSE_ARRAY_TEXTURE_LAYERS,
PIPE_CAP_SPARSE_TEXTURE_FULL_ARRAY_CUBE_MIPMAPS,
PIPE_CAP_LAST,
/* XXX do not add caps after PIPE_CAP_LAST! */