radeonsi: remove needless cache flushes at the end of CP DMA operations
not needed AFAIK Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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parent
7d49b459b6
commit
7e7710a068
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@ -206,10 +206,6 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
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va += byte_count;
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va += byte_count;
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}
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}
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/* Flush the caches again in case the 3D engine has been prefetching
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* the resource. */
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sctx->b.flags |= flush_flags;
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if (tc_l2_flag)
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if (tc_l2_flag)
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r600_resource(dst)->TC_L2_dirty = true;
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r600_resource(dst)->TC_L2_dirty = true;
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}
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}
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@ -336,10 +332,6 @@ void si_copy_buffer(struct si_context *sctx,
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if (realign_size)
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if (realign_size)
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si_cp_dma_realign_engine(sctx, realign_size);
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si_cp_dma_realign_engine(sctx, realign_size);
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/* Flush the caches again in case the 3D engine has been prefetching
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* the resource. */
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sctx->b.flags |= flush_flags;
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if (tc_l2_flag)
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if (tc_l2_flag)
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r600_resource(dst)->TC_L2_dirty = true;
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r600_resource(dst)->TC_L2_dirty = true;
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}
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}
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