anv/i965: drop libdrm_intel dependency completely
With Ken's work to drop the library dependency on libdrm_intel, we now
only depend on libdrm for the kernel uapi headers it provides. It
seems like we're better off just embeddeding those headers ourselves,
making the lives of people developping news features tightly
integrated with the kernel a tiny bit easier.
This change also makes it a bit more obvious what cflags/libs are
required by the i915 drivers vs i965, by renaming INTEL_CFLAGS/LIBS
into I915_CFLAGS/LIBS.
Headers were generated from drm-tip on the following commit :
commit 6d61e70ccc21606ffb8a0a03bd3aba24f659502b
Merge: 338ffbf7cb5e c0bc126f97fb
Author: Dave Airlie <airlied@redhat.com>
Date: Tue Jun 27 07:24:49 2017 +1000
Backmerge tag 'v4.12-rc7' into drm-next
v2: Use installed files from the kernel (Daniel Vetter)
v3: Use headers from drm-next rather than drm-tip (Dave/Daniel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Lionel Landwerlin
parent
3c50ebce25
commit
7dd20bc3ee
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@ -1835,7 +1835,6 @@ if test -n "$with_dri_drivers"; then
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xi965)
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require_libdrm "i965"
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HAVE_I965_DRI=yes
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PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
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;;
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xnouveau)
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require_libdrm "nouveau"
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@ -1947,7 +1946,6 @@ if test -n "$with_vulkan_drivers"; then
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case "x$driver" in
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xintel)
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require_libdrm "ANV"
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PKG_CHECK_MODULES([INTEL], [libdrm >= $LIBDRM_INTEL_REQUIRED libdrm_intel >= $LIBDRM_INTEL_REQUIRED])
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require_x11_dri3 "ANV"
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HAVE_INTEL_VULKAN=yes
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;;
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@ -0,0 +1,22 @@
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# Copyright 2017 Intel Corporation
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice (including the next
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# paragraph) shall be included in all copies or substantial portions of the
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# Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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# IN THE SOFTWARE.
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EXTRA_DIST += $(DRM_INTEL_FILES)
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@ -117,6 +117,12 @@ COMPILER_FILES = \
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COMPILER_GENERATED_FILES = \
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compiler/brw_nir_trig_workarounds.c
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DRM_INTEL_FILES = \
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drm/drm.h \
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drm/drm_fourcc.h \
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drm/drm_mode.h \
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drm/i915_drm.h
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GENXML_XML_FILES = \
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genxml/gen4.xml \
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genxml/gen45.xml \
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@ -31,8 +31,7 @@ tools_aubinator_SOURCES = \
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tools_aubinator_CFLAGS = \
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$(AM_CFLAGS) \
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$(EXPAT_CFLAGS) \
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$(ZLIB_CFLAGS) \
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$(INTEL_CFLAGS)
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$(ZLIB_CFLAGS)
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tools_aubinator_LDADD = \
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common/libintel_common.la \
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@ -84,6 +84,7 @@ VULKAN_CFLAGS = \
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VULKAN_CPPFLAGS = \
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-I$(top_srcdir)/src/compiler \
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-I$(top_srcdir)/src/intel/compiler \
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-I$(top_srcdir)/src/intel/drm \
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-I$(top_builddir)/src/intel/vulkan \
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-I$(top_srcdir)/src/intel/vulkan \
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-I$(top_srcdir)/src/vulkan/wsi \
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@ -0,0 +1,18 @@
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This directory contains a copy of the installed kernel headers
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required by the anv & i965 drivers to communicate with the kernel.
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Whenever either of those driver needs new definitions for new kernel
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APIs, these files should be updated.
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You can copy files installed after running this from the kernel
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repository, at version the drivers require :
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$ make headers_install INSTALL_HDR_PATH=/path/to/install
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The last update was done at the following kernel commit :
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commit 6d61e70ccc21606ffb8a0a03bd3aba24f659502b
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Merge: 338ffbf7cb5e c0bc126f97fb
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Author: Dave Airlie <airlied@redhat.com>
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Date: Tue Jun 27 07:24:49 2017 +1000
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Backmerge tag 'v4.12-rc7' into drm-next
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@ -0,0 +1,925 @@
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/**
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* \file drm.h
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* Header for the Direct Rendering Manager
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*
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* \author Rickard E. (Rik) Faith <faith@valinux.com>
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*
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* \par Acknowledgments:
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* Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
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*/
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/*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
|
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
|
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
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* and/or sell copies of the Software, and to permit persons to whom the
|
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* Software is furnished to do so, subject to the following conditions:
|
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*
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* The above copyright notice and this permission notice (including the next
|
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* paragraph) shall be included in all copies or substantial portions of the
|
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* Software.
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*
|
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DRM_H_
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#define _DRM_H_
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#if defined(__linux__)
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#include <linux/types.h>
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#include <asm/ioctl.h>
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typedef unsigned int drm_handle_t;
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#else /* One of the BSDs */
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#include <sys/ioccom.h>
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#include <sys/types.h>
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typedef int8_t __s8;
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typedef uint8_t __u8;
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typedef int16_t __s16;
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typedef uint16_t __u16;
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typedef int32_t __s32;
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typedef uint32_t __u32;
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typedef int64_t __s64;
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typedef uint64_t __u64;
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typedef size_t __kernel_size_t;
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typedef unsigned long drm_handle_t;
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#endif
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
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#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
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#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
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#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
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#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */
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#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */
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#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
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#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
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#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
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typedef unsigned int drm_context_t;
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typedef unsigned int drm_drawable_t;
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typedef unsigned int drm_magic_t;
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/**
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* Cliprect.
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*
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* \warning: If you change this structure, make sure you change
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* XF86DRIClipRectRec in the server as well
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*
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* \note KW: Actually it's illegal to change either for
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* backwards-compatibility reasons.
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*/
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struct drm_clip_rect {
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unsigned short x1;
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unsigned short y1;
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unsigned short x2;
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unsigned short y2;
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};
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/**
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* Drawable information.
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*/
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struct drm_drawable_info {
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unsigned int num_rects;
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struct drm_clip_rect *rects;
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};
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/**
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* Texture region,
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*/
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struct drm_tex_region {
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unsigned char next;
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unsigned char prev;
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unsigned char in_use;
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unsigned char padding;
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unsigned int age;
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};
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/**
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* Hardware lock.
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*
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* The lock structure is a simple cache-line aligned integer. To avoid
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* processor bus contention on a multiprocessor system, there should not be any
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* other data stored in the same cache line.
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*/
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struct drm_hw_lock {
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__volatile__ unsigned int lock; /**< lock variable */
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char padding[60]; /**< Pad to cache line */
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};
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/**
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* DRM_IOCTL_VERSION ioctl argument type.
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*
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* \sa drmGetVersion().
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*/
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struct drm_version {
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int version_major; /**< Major version */
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int version_minor; /**< Minor version */
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int version_patchlevel; /**< Patch level */
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__kernel_size_t name_len; /**< Length of name buffer */
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char *name; /**< Name of driver */
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__kernel_size_t date_len; /**< Length of date buffer */
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char *date; /**< User-space buffer to hold date */
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__kernel_size_t desc_len; /**< Length of desc buffer */
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char *desc; /**< User-space buffer to hold desc */
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};
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/**
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* DRM_IOCTL_GET_UNIQUE ioctl argument type.
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*
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* \sa drmGetBusid() and drmSetBusId().
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*/
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struct drm_unique {
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__kernel_size_t unique_len; /**< Length of unique */
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char *unique; /**< Unique name for driver instantiation */
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};
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struct drm_list {
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int count; /**< Length of user-space structures */
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struct drm_version *version;
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};
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struct drm_block {
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int unused;
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};
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/**
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* DRM_IOCTL_CONTROL ioctl argument type.
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*
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* \sa drmCtlInstHandler() and drmCtlUninstHandler().
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*/
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struct drm_control {
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enum {
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DRM_ADD_COMMAND,
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DRM_RM_COMMAND,
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DRM_INST_HANDLER,
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DRM_UNINST_HANDLER
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} func;
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int irq;
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};
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/**
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* Type of memory to map.
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*/
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enum drm_map_type {
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_DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
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_DRM_REGISTERS = 1, /**< no caching, no core dump */
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_DRM_SHM = 2, /**< shared, cached */
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_DRM_AGP = 3, /**< AGP/GART */
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_DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
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_DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
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};
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|
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/**
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* Memory mapping flags.
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*/
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enum drm_map_flags {
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_DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
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_DRM_READ_ONLY = 0x02,
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_DRM_LOCKED = 0x04, /**< shared, cached, locked */
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_DRM_KERNEL = 0x08, /**< kernel requires access */
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_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
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_DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
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_DRM_REMOVABLE = 0x40, /**< Removable mapping */
|
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_DRM_DRIVER = 0x80 /**< Managed by driver */
|
||||
};
|
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|
||||
struct drm_ctx_priv_map {
|
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unsigned int ctx_id; /**< Context requesting private mapping */
|
||||
void *handle; /**< Handle of map */
|
||||
};
|
||||
|
||||
/**
|
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* DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
|
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* argument type.
|
||||
*
|
||||
* \sa drmAddMap().
|
||||
*/
|
||||
struct drm_map {
|
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unsigned long offset; /**< Requested physical address (0 for SAREA)*/
|
||||
unsigned long size; /**< Requested physical size (bytes) */
|
||||
enum drm_map_type type; /**< Type of memory to map */
|
||||
enum drm_map_flags flags; /**< Flags */
|
||||
void *handle; /**< User-space: "Handle" to pass to mmap() */
|
||||
/**< Kernel-space: kernel-virtual address */
|
||||
int mtrr; /**< MTRR slot used */
|
||||
/* Private data */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_GET_CLIENT ioctl argument type.
|
||||
*/
|
||||
struct drm_client {
|
||||
int idx; /**< Which client desired? */
|
||||
int auth; /**< Is client authenticated? */
|
||||
unsigned long pid; /**< Process ID */
|
||||
unsigned long uid; /**< User ID */
|
||||
unsigned long magic; /**< Magic */
|
||||
unsigned long iocs; /**< Ioctl count */
|
||||
};
|
||||
|
||||
enum drm_stat_type {
|
||||
_DRM_STAT_LOCK,
|
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_DRM_STAT_OPENS,
|
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_DRM_STAT_CLOSES,
|
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_DRM_STAT_IOCTLS,
|
||||
_DRM_STAT_LOCKS,
|
||||
_DRM_STAT_UNLOCKS,
|
||||
_DRM_STAT_VALUE, /**< Generic value */
|
||||
_DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
|
||||
_DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
|
||||
|
||||
_DRM_STAT_IRQ, /**< IRQ */
|
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_DRM_STAT_PRIMARY, /**< Primary DMA bytes */
|
||||
_DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
|
||||
_DRM_STAT_DMA, /**< DMA */
|
||||
_DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
|
||||
_DRM_STAT_MISSED /**< Missed DMA opportunity */
|
||||
/* Add to the *END* of the list */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_GET_STATS ioctl argument type.
|
||||
*/
|
||||
struct drm_stats {
|
||||
unsigned long count;
|
||||
struct {
|
||||
unsigned long value;
|
||||
enum drm_stat_type type;
|
||||
} data[15];
|
||||
};
|
||||
|
||||
/**
|
||||
* Hardware locking flags.
|
||||
*/
|
||||
enum drm_lock_flags {
|
||||
_DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
|
||||
_DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
|
||||
_DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
|
||||
_DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
|
||||
/* These *HALT* flags aren't supported yet
|
||||
-- they will be used to support the
|
||||
full-screen DGA-like mode. */
|
||||
_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
|
||||
_DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
|
||||
*
|
||||
* \sa drmGetLock() and drmUnlock().
|
||||
*/
|
||||
struct drm_lock {
|
||||
int context;
|
||||
enum drm_lock_flags flags;
|
||||
};
|
||||
|
||||
/**
|
||||
* DMA flags
|
||||
*
|
||||
* \warning
|
||||
* These values \e must match xf86drm.h.
|
||||
*
|
||||
* \sa drm_dma.
|
||||
*/
|
||||
enum drm_dma_flags {
|
||||
/* Flags for DMA buffer dispatch */
|
||||
_DRM_DMA_BLOCK = 0x01, /**<
|
||||
* Block until buffer dispatched.
|
||||
*
|
||||
* \note The buffer may not yet have
|
||||
* been processed by the hardware --
|
||||
* getting a hardware lock with the
|
||||
* hardware quiescent will ensure
|
||||
* that the buffer has been
|
||||
* processed.
|
||||
*/
|
||||
_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
|
||||
_DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
|
||||
|
||||
/* Flags for DMA buffer request */
|
||||
_DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
|
||||
_DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
|
||||
_DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
|
||||
*
|
||||
* \sa drmAddBufs().
|
||||
*/
|
||||
struct drm_buf_desc {
|
||||
int count; /**< Number of buffers of this size */
|
||||
int size; /**< Size in bytes */
|
||||
int low_mark; /**< Low water mark */
|
||||
int high_mark; /**< High water mark */
|
||||
enum {
|
||||
_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
|
||||
_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
|
||||
_DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */
|
||||
_DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */
|
||||
_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
|
||||
} flags;
|
||||
unsigned long agp_start; /**<
|
||||
* Start address of where the AGP buffers are
|
||||
* in the AGP aperture
|
||||
*/
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_INFO_BUFS ioctl argument type.
|
||||
*/
|
||||
struct drm_buf_info {
|
||||
int count; /**< Entries in list */
|
||||
struct drm_buf_desc *list;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_FREE_BUFS ioctl argument type.
|
||||
*/
|
||||
struct drm_buf_free {
|
||||
int count;
|
||||
int *list;
|
||||
};
|
||||
|
||||
/**
|
||||
* Buffer information
|
||||
*
|
||||
* \sa drm_buf_map.
|
||||
*/
|
||||
struct drm_buf_pub {
|
||||
int idx; /**< Index into the master buffer list */
|
||||
int total; /**< Buffer size */
|
||||
int used; /**< Amount of buffer in use (for DMA) */
|
||||
void *address; /**< Address of buffer */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_MAP_BUFS ioctl argument type.
|
||||
*/
|
||||
struct drm_buf_map {
|
||||
int count; /**< Length of the buffer list */
|
||||
#ifdef __cplusplus
|
||||
void *virt;
|
||||
#else
|
||||
void *virtual; /**< Mmap'd area in user-virtual */
|
||||
#endif
|
||||
struct drm_buf_pub *list; /**< Buffer information */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_DMA ioctl argument type.
|
||||
*
|
||||
* Indices here refer to the offset into the buffer list in drm_buf_get.
|
||||
*
|
||||
* \sa drmDMA().
|
||||
*/
|
||||
struct drm_dma {
|
||||
int context; /**< Context handle */
|
||||
int send_count; /**< Number of buffers to send */
|
||||
int *send_indices; /**< List of handles to buffers */
|
||||
int *send_sizes; /**< Lengths of data to send */
|
||||
enum drm_dma_flags flags; /**< Flags */
|
||||
int request_count; /**< Number of buffers requested */
|
||||
int request_size; /**< Desired size for buffers */
|
||||
int *request_indices; /**< Buffer information */
|
||||
int *request_sizes;
|
||||
int granted_count; /**< Number of buffers granted */
|
||||
};
|
||||
|
||||
enum drm_ctx_flags {
|
||||
_DRM_CONTEXT_PRESERVED = 0x01,
|
||||
_DRM_CONTEXT_2DONLY = 0x02
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_ADD_CTX ioctl argument type.
|
||||
*
|
||||
* \sa drmCreateContext() and drmDestroyContext().
|
||||
*/
|
||||
struct drm_ctx {
|
||||
drm_context_t handle;
|
||||
enum drm_ctx_flags flags;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_RES_CTX ioctl argument type.
|
||||
*/
|
||||
struct drm_ctx_res {
|
||||
int count;
|
||||
struct drm_ctx *contexts;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
|
||||
*/
|
||||
struct drm_draw {
|
||||
drm_drawable_t handle;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_UPDATE_DRAW ioctl argument type.
|
||||
*/
|
||||
typedef enum {
|
||||
DRM_DRAWABLE_CLIPRECTS
|
||||
} drm_drawable_info_type_t;
|
||||
|
||||
struct drm_update_draw {
|
||||
drm_drawable_t handle;
|
||||
unsigned int type;
|
||||
unsigned int num;
|
||||
unsigned long long data;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
|
||||
*/
|
||||
struct drm_auth {
|
||||
drm_magic_t magic;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_IRQ_BUSID ioctl argument type.
|
||||
*
|
||||
* \sa drmGetInterruptFromBusID().
|
||||
*/
|
||||
struct drm_irq_busid {
|
||||
int irq; /**< IRQ number */
|
||||
int busnum; /**< bus number */
|
||||
int devnum; /**< device number */
|
||||
int funcnum; /**< function number */
|
||||
};
|
||||
|
||||
enum drm_vblank_seq_type {
|
||||
_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
|
||||
_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
|
||||
/* bits 1-6 are reserved for high crtcs */
|
||||
_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
|
||||
_DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */
|
||||
_DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */
|
||||
_DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */
|
||||
_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
|
||||
_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
|
||||
};
|
||||
#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
|
||||
|
||||
#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
|
||||
#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
|
||||
_DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
|
||||
|
||||
struct drm_wait_vblank_request {
|
||||
enum drm_vblank_seq_type type;
|
||||
unsigned int sequence;
|
||||
unsigned long signal;
|
||||
};
|
||||
|
||||
struct drm_wait_vblank_reply {
|
||||
enum drm_vblank_seq_type type;
|
||||
unsigned int sequence;
|
||||
long tval_sec;
|
||||
long tval_usec;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_WAIT_VBLANK ioctl argument type.
|
||||
*
|
||||
* \sa drmWaitVBlank().
|
||||
*/
|
||||
union drm_wait_vblank {
|
||||
struct drm_wait_vblank_request request;
|
||||
struct drm_wait_vblank_reply reply;
|
||||
};
|
||||
|
||||
#define _DRM_PRE_MODESET 1
|
||||
#define _DRM_POST_MODESET 2
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_MODESET_CTL ioctl argument type
|
||||
*
|
||||
* \sa drmModesetCtl().
|
||||
*/
|
||||
struct drm_modeset_ctl {
|
||||
__u32 crtc;
|
||||
__u32 cmd;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_AGP_ENABLE ioctl argument type.
|
||||
*
|
||||
* \sa drmAgpEnable().
|
||||
*/
|
||||
struct drm_agp_mode {
|
||||
unsigned long mode; /**< AGP mode */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
|
||||
*
|
||||
* \sa drmAgpAlloc() and drmAgpFree().
|
||||
*/
|
||||
struct drm_agp_buffer {
|
||||
unsigned long size; /**< In bytes -- will round to page boundary */
|
||||
unsigned long handle; /**< Used for binding / unbinding */
|
||||
unsigned long type; /**< Type of memory to allocate */
|
||||
unsigned long physical; /**< Physical used by i810 */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
|
||||
*
|
||||
* \sa drmAgpBind() and drmAgpUnbind().
|
||||
*/
|
||||
struct drm_agp_binding {
|
||||
unsigned long handle; /**< From drm_agp_buffer */
|
||||
unsigned long offset; /**< In bytes -- will round to page boundary */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_AGP_INFO ioctl argument type.
|
||||
*
|
||||
* \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
|
||||
* drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
|
||||
* drmAgpVendorId() and drmAgpDeviceId().
|
||||
*/
|
||||
struct drm_agp_info {
|
||||
int agp_version_major;
|
||||
int agp_version_minor;
|
||||
unsigned long mode;
|
||||
unsigned long aperture_base; /* physical address */
|
||||
unsigned long aperture_size; /* bytes */
|
||||
unsigned long memory_allowed; /* bytes */
|
||||
unsigned long memory_used;
|
||||
|
||||
/* PCI information */
|
||||
unsigned short id_vendor;
|
||||
unsigned short id_device;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_SG_ALLOC ioctl argument type.
|
||||
*/
|
||||
struct drm_scatter_gather {
|
||||
unsigned long size; /**< In bytes -- will round to page boundary */
|
||||
unsigned long handle; /**< Used for mapping / unmapping */
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_IOCTL_SET_VERSION ioctl argument type.
|
||||
*/
|
||||
struct drm_set_version {
|
||||
int drm_di_major;
|
||||
int drm_di_minor;
|
||||
int drm_dd_major;
|
||||
int drm_dd_minor;
|
||||
};
|
||||
|
||||
/** DRM_IOCTL_GEM_CLOSE ioctl argument type */
|
||||
struct drm_gem_close {
|
||||
/** Handle of the object to be closed. */
|
||||
__u32 handle;
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
/** DRM_IOCTL_GEM_FLINK ioctl argument type */
|
||||
struct drm_gem_flink {
|
||||
/** Handle for the object being named */
|
||||
__u32 handle;
|
||||
|
||||
/** Returned global name */
|
||||
__u32 name;
|
||||
};
|
||||
|
||||
/** DRM_IOCTL_GEM_OPEN ioctl argument type */
|
||||
struct drm_gem_open {
|
||||
/** Name of object being opened */
|
||||
__u32 name;
|
||||
|
||||
/** Returned handle for the object */
|
||||
__u32 handle;
|
||||
|
||||
/** Returned size of the object */
|
||||
__u64 size;
|
||||
};
|
||||
|
||||
#define DRM_CAP_DUMB_BUFFER 0x1
|
||||
#define DRM_CAP_VBLANK_HIGH_CRTC 0x2
|
||||
#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3
|
||||
#define DRM_CAP_DUMB_PREFER_SHADOW 0x4
|
||||
#define DRM_CAP_PRIME 0x5
|
||||
#define DRM_PRIME_CAP_IMPORT 0x1
|
||||
#define DRM_PRIME_CAP_EXPORT 0x2
|
||||
#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
|
||||
#define DRM_CAP_ASYNC_PAGE_FLIP 0x7
|
||||
/*
|
||||
* The CURSOR_WIDTH and CURSOR_HEIGHT capabilities return a valid widthxheight
|
||||
* combination for the hardware cursor. The intention is that a hardware
|
||||
* agnostic userspace can query a cursor plane size to use.
|
||||
*
|
||||
* Note that the cross-driver contract is to merely return a valid size;
|
||||
* drivers are free to attach another meaning on top, eg. i915 returns the
|
||||
* maximum plane size.
|
||||
*/
|
||||
#define DRM_CAP_CURSOR_WIDTH 0x8
|
||||
#define DRM_CAP_CURSOR_HEIGHT 0x9
|
||||
#define DRM_CAP_ADDFB2_MODIFIERS 0x10
|
||||
#define DRM_CAP_PAGE_FLIP_TARGET 0x11
|
||||
#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
|
||||
#define DRM_CAP_SYNCOBJ 0x13
|
||||
|
||||
/** DRM_IOCTL_GET_CAP ioctl argument type */
|
||||
struct drm_get_cap {
|
||||
__u64 capability;
|
||||
__u64 value;
|
||||
};
|
||||
|
||||
/**
|
||||
* DRM_CLIENT_CAP_STEREO_3D
|
||||
*
|
||||
* if set to 1, the DRM core will expose the stereo 3D capabilities of the
|
||||
* monitor by advertising the supported 3D layouts in the flags of struct
|
||||
* drm_mode_modeinfo.
|
||||
*/
|
||||
#define DRM_CLIENT_CAP_STEREO_3D 1
|
||||
|
||||
/**
|
||||
* DRM_CLIENT_CAP_UNIVERSAL_PLANES
|
||||
*
|
||||
* If set to 1, the DRM core will expose all planes (overlay, primary, and
|
||||
* cursor) to userspace.
|
||||
*/
|
||||
#define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2
|
||||
|
||||
/**
|
||||
* DRM_CLIENT_CAP_ATOMIC
|
||||
*
|
||||
* If set to 1, the DRM core will expose atomic properties to userspace
|
||||
*/
|
||||
#define DRM_CLIENT_CAP_ATOMIC 3
|
||||
|
||||
/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
|
||||
struct drm_set_client_cap {
|
||||
__u64 capability;
|
||||
__u64 value;
|
||||
};
|
||||
|
||||
#define DRM_RDWR O_RDWR
|
||||
#define DRM_CLOEXEC O_CLOEXEC
|
||||
struct drm_prime_handle {
|
||||
__u32 handle;
|
||||
|
||||
/** Flags.. only applicable for handle->fd */
|
||||
__u32 flags;
|
||||
|
||||
/** Returned dmabuf file descriptor */
|
||||
__s32 fd;
|
||||
};
|
||||
|
||||
struct drm_syncobj_create {
|
||||
__u32 handle;
|
||||
__u32 flags;
|
||||
};
|
||||
|
||||
struct drm_syncobj_destroy {
|
||||
__u32 handle;
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
|
||||
#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
|
||||
struct drm_syncobj_handle {
|
||||
__u32 handle;
|
||||
__u32 flags;
|
||||
|
||||
__s32 fd;
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#include "drm_mode.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DRM_IOCTL_BASE 'd'
|
||||
#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
|
||||
#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
|
||||
#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
|
||||
#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
|
||||
|
||||
#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version)
|
||||
#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique)
|
||||
#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth)
|
||||
#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid)
|
||||
#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map)
|
||||
#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client)
|
||||
#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats)
|
||||
#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version)
|
||||
#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl)
|
||||
#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close)
|
||||
#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink)
|
||||
#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open)
|
||||
#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap)
|
||||
#define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap)
|
||||
|
||||
#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique)
|
||||
#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth)
|
||||
#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block)
|
||||
#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block)
|
||||
#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control)
|
||||
#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map)
|
||||
#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc)
|
||||
#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc)
|
||||
#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info)
|
||||
#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map)
|
||||
#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free)
|
||||
|
||||
#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map)
|
||||
|
||||
#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map)
|
||||
#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map)
|
||||
|
||||
#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e)
|
||||
#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f)
|
||||
|
||||
#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx)
|
||||
#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx)
|
||||
#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx)
|
||||
#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx)
|
||||
#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx)
|
||||
#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx)
|
||||
#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res)
|
||||
#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw)
|
||||
#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw)
|
||||
#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma)
|
||||
#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock)
|
||||
#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock)
|
||||
#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock)
|
||||
|
||||
#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle)
|
||||
#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle)
|
||||
|
||||
#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
|
||||
#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
|
||||
#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode)
|
||||
#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info)
|
||||
#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer)
|
||||
#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer)
|
||||
#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding)
|
||||
#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding)
|
||||
|
||||
#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather)
|
||||
#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather)
|
||||
|
||||
#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
|
||||
|
||||
#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
|
||||
|
||||
#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
|
||||
#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc)
|
||||
#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc)
|
||||
#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor)
|
||||
#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
|
||||
#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
|
||||
#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder)
|
||||
#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
|
||||
#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
|
||||
#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
|
||||
|
||||
#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property)
|
||||
#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
|
||||
#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob)
|
||||
#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
|
||||
#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
|
||||
#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int)
|
||||
#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
|
||||
#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
|
||||
|
||||
#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
|
||||
#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb)
|
||||
#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
|
||||
#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
|
||||
#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
|
||||
#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
|
||||
#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
|
||||
#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
|
||||
#define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
|
||||
#define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2)
|
||||
#define DRM_IOCTL_MODE_ATOMIC DRM_IOWR(0xBC, struct drm_mode_atomic)
|
||||
#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
|
||||
#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
|
||||
|
||||
#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
|
||||
#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
|
||||
#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
|
||||
#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
|
||||
|
||||
/**
|
||||
* Device specific ioctls should only be in their respective headers
|
||||
* The device specific ioctl range is from 0x40 to 0x9f.
|
||||
* Generic IOCTLS restart at 0xA0.
|
||||
*
|
||||
* \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
|
||||
* drmCommandReadWrite().
|
||||
*/
|
||||
#define DRM_COMMAND_BASE 0x40
|
||||
#define DRM_COMMAND_END 0xA0
|
||||
|
||||
/**
|
||||
* Header for events written back to userspace on the drm fd. The
|
||||
* type defines the type of event, the length specifies the total
|
||||
* length of the event (including the header), and user_data is
|
||||
* typically a 64 bit value passed with the ioctl that triggered the
|
||||
* event. A read on the drm fd will always only return complete
|
||||
* events, that is, if for example the read buffer is 100 bytes, and
|
||||
* there are two 64 byte events pending, only one will be returned.
|
||||
*
|
||||
* Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and
|
||||
* up are chipset specific.
|
||||
*/
|
||||
struct drm_event {
|
||||
__u32 type;
|
||||
__u32 length;
|
||||
};
|
||||
|
||||
#define DRM_EVENT_VBLANK 0x01
|
||||
#define DRM_EVENT_FLIP_COMPLETE 0x02
|
||||
|
||||
struct drm_event_vblank {
|
||||
struct drm_event base;
|
||||
__u64 user_data;
|
||||
__u32 tv_sec;
|
||||
__u32 tv_usec;
|
||||
__u32 sequence;
|
||||
__u32 crtc_id; /* 0 on older kernels that do not support this */
|
||||
};
|
||||
|
||||
/* typedef area */
|
||||
typedef struct drm_clip_rect drm_clip_rect_t;
|
||||
typedef struct drm_drawable_info drm_drawable_info_t;
|
||||
typedef struct drm_tex_region drm_tex_region_t;
|
||||
typedef struct drm_hw_lock drm_hw_lock_t;
|
||||
typedef struct drm_version drm_version_t;
|
||||
typedef struct drm_unique drm_unique_t;
|
||||
typedef struct drm_list drm_list_t;
|
||||
typedef struct drm_block drm_block_t;
|
||||
typedef struct drm_control drm_control_t;
|
||||
typedef enum drm_map_type drm_map_type_t;
|
||||
typedef enum drm_map_flags drm_map_flags_t;
|
||||
typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
|
||||
typedef struct drm_map drm_map_t;
|
||||
typedef struct drm_client drm_client_t;
|
||||
typedef enum drm_stat_type drm_stat_type_t;
|
||||
typedef struct drm_stats drm_stats_t;
|
||||
typedef enum drm_lock_flags drm_lock_flags_t;
|
||||
typedef struct drm_lock drm_lock_t;
|
||||
typedef enum drm_dma_flags drm_dma_flags_t;
|
||||
typedef struct drm_buf_desc drm_buf_desc_t;
|
||||
typedef struct drm_buf_info drm_buf_info_t;
|
||||
typedef struct drm_buf_free drm_buf_free_t;
|
||||
typedef struct drm_buf_pub drm_buf_pub_t;
|
||||
typedef struct drm_buf_map drm_buf_map_t;
|
||||
typedef struct drm_dma drm_dma_t;
|
||||
typedef union drm_wait_vblank drm_wait_vblank_t;
|
||||
typedef struct drm_agp_mode drm_agp_mode_t;
|
||||
typedef enum drm_ctx_flags drm_ctx_flags_t;
|
||||
typedef struct drm_ctx drm_ctx_t;
|
||||
typedef struct drm_ctx_res drm_ctx_res_t;
|
||||
typedef struct drm_draw drm_draw_t;
|
||||
typedef struct drm_update_draw drm_update_draw_t;
|
||||
typedef struct drm_auth drm_auth_t;
|
||||
typedef struct drm_irq_busid drm_irq_busid_t;
|
||||
typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
|
||||
|
||||
typedef struct drm_agp_buffer drm_agp_buffer_t;
|
||||
typedef struct drm_agp_binding drm_agp_binding_t;
|
||||
typedef struct drm_agp_info drm_agp_info_t;
|
||||
typedef struct drm_scatter_gather drm_scatter_gather_t;
|
||||
typedef struct drm_set_version drm_set_version_t;
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,379 @@
|
|||
/*
|
||||
* Copyright 2011 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
||||
* OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef DRM_FOURCC_H
|
||||
#define DRM_FOURCC_H
|
||||
|
||||
#include "drm.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
|
||||
((__u32)(c) << 16) | ((__u32)(d) << 24))
|
||||
|
||||
#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */
|
||||
|
||||
/* color index */
|
||||
#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
|
||||
|
||||
/* 8 bpp Red */
|
||||
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
|
||||
|
||||
/* 16 bpp Red */
|
||||
#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
|
||||
|
||||
/* 16 bpp RG */
|
||||
#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */
|
||||
#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */
|
||||
|
||||
/* 32 bpp RG */
|
||||
#define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') /* [31:0] R:G 16:16 little endian */
|
||||
#define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') /* [31:0] G:R 16:16 little endian */
|
||||
|
||||
/* 8 bpp RGB */
|
||||
#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */
|
||||
#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */
|
||||
|
||||
/* 16 bpp RGB */
|
||||
#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */
|
||||
#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */
|
||||
|
||||
#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */
|
||||
#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */
|
||||
#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */
|
||||
#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */
|
||||
|
||||
#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */
|
||||
#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */
|
||||
|
||||
/* 24 bpp RGB */
|
||||
#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */
|
||||
#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */
|
||||
|
||||
/* 32 bpp RGB */
|
||||
#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */
|
||||
#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */
|
||||
|
||||
#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */
|
||||
#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */
|
||||
#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */
|
||||
|
||||
/* packed YCbCr */
|
||||
#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
|
||||
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
|
||||
|
||||
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
|
||||
|
||||
/*
|
||||
* 2 plane RGB + A
|
||||
* index 0 = RGB plane, same format as the corresponding non _A8 format has
|
||||
* index 1 = A plane, [7:0] A
|
||||
*/
|
||||
#define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8')
|
||||
#define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8')
|
||||
#define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8')
|
||||
#define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8')
|
||||
#define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8')
|
||||
#define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8')
|
||||
#define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8')
|
||||
#define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8')
|
||||
|
||||
/*
|
||||
* 2 plane YCbCr
|
||||
* index 0 = Y plane, [7:0] Y
|
||||
* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
|
||||
* or
|
||||
* index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
|
||||
*/
|
||||
#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */
|
||||
#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */
|
||||
#define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') /* non-subsampled Cr:Cb plane */
|
||||
#define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
|
||||
|
||||
/*
|
||||
* 3 plane YCbCr
|
||||
* index 0: Y plane, [7:0] Y
|
||||
* index 1: Cb plane, [7:0] Cb
|
||||
* index 2: Cr plane, [7:0] Cr
|
||||
* or
|
||||
* index 1: Cr plane, [7:0] Cr
|
||||
* index 2: Cb plane, [7:0] Cb
|
||||
*/
|
||||
#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */
|
||||
#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */
|
||||
#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */
|
||||
|
||||
|
||||
/*
|
||||
* Format Modifiers:
|
||||
*
|
||||
* Format modifiers describe, typically, a re-ordering or modification
|
||||
* of the data in a plane of an FB. This can be used to express tiled/
|
||||
* swizzled formats, or compression, or a combination of the two.
|
||||
*
|
||||
* The upper 8 bits of the format modifier are a vendor-id as assigned
|
||||
* below. The lower 56 bits are assigned as vendor sees fit.
|
||||
*/
|
||||
|
||||
/* Vendor Ids: */
|
||||
#define DRM_FORMAT_MOD_NONE 0
|
||||
#define DRM_FORMAT_MOD_VENDOR_NONE 0
|
||||
#define DRM_FORMAT_MOD_VENDOR_INTEL 0x01
|
||||
#define DRM_FORMAT_MOD_VENDOR_AMD 0x02
|
||||
#define DRM_FORMAT_MOD_VENDOR_NV 0x03
|
||||
#define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04
|
||||
#define DRM_FORMAT_MOD_VENDOR_QCOM 0x05
|
||||
#define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06
|
||||
#define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07
|
||||
/* add more to the end as needed */
|
||||
|
||||
#define fourcc_mod_code(vendor, val) \
|
||||
((((__u64)DRM_FORMAT_MOD_VENDOR_## vendor) << 56) | (val & 0x00ffffffffffffffULL))
|
||||
|
||||
/*
|
||||
* Format Modifier tokens:
|
||||
*
|
||||
* When adding a new token please document the layout with a code comment,
|
||||
* similar to the fourcc codes above. drm_fourcc.h is considered the
|
||||
* authoritative source for all of these.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Linear Layout
|
||||
*
|
||||
* Just plain linear layout. Note that this is different from no specifying any
|
||||
* modifier (e.g. not setting DRM_MODE_FB_MODIFIERS in the DRM_ADDFB2 ioctl),
|
||||
* which tells the driver to also take driver-internal information into account
|
||||
* and so might actually result in a tiled framebuffer.
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
|
||||
|
||||
/* Intel framebuffer modifiers */
|
||||
|
||||
/*
|
||||
* Intel X-tiling layout
|
||||
*
|
||||
* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
|
||||
* in row-major layout. Within the tile bytes are laid out row-major, with
|
||||
* a platform-dependent stride. On top of that the memory can apply
|
||||
* platform-depending swizzling of some higher address bits into bit6.
|
||||
*
|
||||
* This format is highly platforms specific and not useful for cross-driver
|
||||
* sharing. It exists since on a given platform it does uniquely identify the
|
||||
* layout in a simple way for i915-specific userspace.
|
||||
*/
|
||||
#define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1)
|
||||
|
||||
/*
|
||||
* Intel Y-tiling layout
|
||||
*
|
||||
* This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)
|
||||
* in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)
|
||||
* chunks column-major, with a platform-dependent height. On top of that the
|
||||
* memory can apply platform-depending swizzling of some higher address bits
|
||||
* into bit6.
|
||||
*
|
||||
* This format is highly platforms specific and not useful for cross-driver
|
||||
* sharing. It exists since on a given platform it does uniquely identify the
|
||||
* layout in a simple way for i915-specific userspace.
|
||||
*/
|
||||
#define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2)
|
||||
|
||||
/*
|
||||
* Intel Yf-tiling layout
|
||||
*
|
||||
* This is a tiled layout using 4Kb tiles in row-major layout.
|
||||
* Within the tile pixels are laid out in 16 256 byte units / sub-tiles which
|
||||
* are arranged in four groups (two wide, two high) with column-major layout.
|
||||
* Each group therefore consits out of four 256 byte units, which are also laid
|
||||
* out as 2x2 column-major.
|
||||
* 256 byte units are made out of four 64 byte blocks of pixels, producing
|
||||
* either a square block or a 2:1 unit.
|
||||
* 64 byte blocks of pixels contain four pixel rows of 16 bytes, where the width
|
||||
* in pixel depends on the pixel depth.
|
||||
*/
|
||||
#define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3)
|
||||
|
||||
/*
|
||||
* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
|
||||
*
|
||||
* Macroblocks are laid in a Z-shape, and each pixel data is following the
|
||||
* standard NV12 style.
|
||||
* As for NV12, an image is the result of two frame buffers: one for Y,
|
||||
* one for the interleaved Cb/Cr components (1/2 the height of the Y buffer).
|
||||
* Alignment requirements are (for each buffer):
|
||||
* - multiple of 128 pixels for the width
|
||||
* - multiple of 32 pixels for the height
|
||||
*
|
||||
* For more information: see https://linuxtv.org/downloads/v4l-dvb-apis/re32.html
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1)
|
||||
|
||||
/* Vivante framebuffer modifiers */
|
||||
|
||||
/*
|
||||
* Vivante 4x4 tiling layout
|
||||
*
|
||||
* This is a simple tiled layout using tiles of 4x4 pixels in a row-major
|
||||
* layout.
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1)
|
||||
|
||||
/*
|
||||
* Vivante 64x64 super-tiling layout
|
||||
*
|
||||
* This is a tiled layout using 64x64 pixel super-tiles, where each super-tile
|
||||
* contains 8x4 groups of 2x4 tiles of 4x4 pixels (like above) each, all in row-
|
||||
* major layout.
|
||||
*
|
||||
* For more information: see
|
||||
* https://github.com/etnaviv/etna_viv/blob/master/doc/hardware.md#texture-tiling
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2)
|
||||
|
||||
/*
|
||||
* Vivante 4x4 tiling layout for dual-pipe
|
||||
*
|
||||
* Same as the 4x4 tiling layout, except every second 4x4 pixel tile starts at a
|
||||
* different base address. Offsets from the base addresses are therefore halved
|
||||
* compared to the non-split tiled layout.
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3)
|
||||
|
||||
/*
|
||||
* Vivante 64x64 super-tiling layout for dual-pipe
|
||||
*
|
||||
* Same as the 64x64 super-tiling layout, except every second 4x4 pixel tile
|
||||
* starts at a different base address. Offsets from the base addresses are
|
||||
* therefore halved compared to the non-split super-tiled layout.
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
|
||||
|
||||
/* NVIDIA Tegra frame buffer modifiers */
|
||||
|
||||
/*
|
||||
* Some modifiers take parameters, for example the number of vertical GOBs in
|
||||
* a block. Reserve the lower 32 bits for parameters
|
||||
*/
|
||||
#define __fourcc_mod_tegra_mode_shift 32
|
||||
#define fourcc_mod_tegra_code(val, params) \
|
||||
fourcc_mod_code(NV, ((((__u64)val) << __fourcc_mod_tegra_mode_shift) | params))
|
||||
#define fourcc_mod_tegra_mod(m) \
|
||||
(m & ~((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
|
||||
#define fourcc_mod_tegra_param(m) \
|
||||
(m & ((1ULL << __fourcc_mod_tegra_mode_shift) - 1))
|
||||
|
||||
/*
|
||||
* Tegra Tiled Layout, used by Tegra 2, 3 and 4.
|
||||
*
|
||||
* Pixels are arranged in simple tiles of 16 x 16 bytes.
|
||||
*/
|
||||
#define NV_FORMAT_MOD_TEGRA_TILED fourcc_mod_tegra_code(1, 0)
|
||||
|
||||
/*
|
||||
* Tegra 16Bx2 Block Linear layout, used by TK1/TX1
|
||||
*
|
||||
* Pixels are arranged in 64x8 Groups Of Bytes (GOBs). GOBs are then stacked
|
||||
* vertically by a power of 2 (1 to 32 GOBs) to form a block.
|
||||
*
|
||||
* Within a GOB, data is ordered as 16B x 2 lines sectors laid in Z-shape.
|
||||
*
|
||||
* Parameter 'v' is the log2 encoding of the number of GOBs stacked vertically.
|
||||
* Valid values are:
|
||||
*
|
||||
* 0 == ONE_GOB
|
||||
* 1 == TWO_GOBS
|
||||
* 2 == FOUR_GOBS
|
||||
* 3 == EIGHT_GOBS
|
||||
* 4 == SIXTEEN_GOBS
|
||||
* 5 == THIRTYTWO_GOBS
|
||||
*
|
||||
* Chapter 20 "Pixel Memory Formats" of the Tegra X1 TRM describes this format
|
||||
* in full detail.
|
||||
*/
|
||||
#define NV_FORMAT_MOD_TEGRA_16BX2_BLOCK(v) fourcc_mod_tegra_code(2, v)
|
||||
|
||||
/*
|
||||
* Broadcom VC4 "T" format
|
||||
*
|
||||
* This is the primary layout that the V3D GPU can texture from (it
|
||||
* can't do linear). The T format has:
|
||||
*
|
||||
* - 64b utiles of pixels in a raster-order grid according to cpp. It's 4x4
|
||||
* pixels at 32 bit depth.
|
||||
*
|
||||
* - 1k subtiles made of a 4x4 raster-order grid of 64b utiles (so usually
|
||||
* 16x16 pixels).
|
||||
*
|
||||
* - 4k tiles made of a 2x2 grid of 1k subtiles (so usually 32x32 pixels). On
|
||||
* even 4k tile rows, they're arranged as (BL, TL, TR, BR), and on odd rows
|
||||
* they're (TR, BR, BL, TL), where bottom left is start of memory.
|
||||
*
|
||||
* - an image made of 4k tiles in rows either left-to-right (even rows of 4k
|
||||
* tiles) or right-to-left (odd rows of 4k tiles).
|
||||
*/
|
||||
#define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1)
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* DRM_FOURCC_H */
|
||||
|
|
@ -0,0 +1,739 @@
|
|||
/*
|
||||
* Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
|
||||
* Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
|
||||
* Copyright (c) 2008 Red Hat Inc.
|
||||
* Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
|
||||
* Copyright (c) 2007-2008 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
||||
* IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _DRM_MODE_H
|
||||
#define _DRM_MODE_H
|
||||
|
||||
#include "drm.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DRM_DISPLAY_INFO_LEN 32
|
||||
#define DRM_CONNECTOR_NAME_LEN 32
|
||||
#define DRM_DISPLAY_MODE_LEN 32
|
||||
#define DRM_PROP_NAME_LEN 32
|
||||
|
||||
#define DRM_MODE_TYPE_BUILTIN (1<<0)
|
||||
#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
|
||||
#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
|
||||
#define DRM_MODE_TYPE_PREFERRED (1<<3)
|
||||
#define DRM_MODE_TYPE_DEFAULT (1<<4)
|
||||
#define DRM_MODE_TYPE_USERDEF (1<<5)
|
||||
#define DRM_MODE_TYPE_DRIVER (1<<6)
|
||||
|
||||
/* Video mode flags */
|
||||
/* bit compatible with the xrandr RR_ definitions (bits 0-13)
|
||||
*
|
||||
* ABI warning: Existing userspace really expects
|
||||
* the mode flags to match the xrandr definitions. Any
|
||||
* changes that don't match the xrandr definitions will
|
||||
* likely need a new client cap or some other mechanism
|
||||
* to avoid breaking existing userspace. This includes
|
||||
* allocating new flags in the previously unused bits!
|
||||
*/
|
||||
#define DRM_MODE_FLAG_PHSYNC (1<<0)
|
||||
#define DRM_MODE_FLAG_NHSYNC (1<<1)
|
||||
#define DRM_MODE_FLAG_PVSYNC (1<<2)
|
||||
#define DRM_MODE_FLAG_NVSYNC (1<<3)
|
||||
#define DRM_MODE_FLAG_INTERLACE (1<<4)
|
||||
#define DRM_MODE_FLAG_DBLSCAN (1<<5)
|
||||
#define DRM_MODE_FLAG_CSYNC (1<<6)
|
||||
#define DRM_MODE_FLAG_PCSYNC (1<<7)
|
||||
#define DRM_MODE_FLAG_NCSYNC (1<<8)
|
||||
#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
|
||||
#define DRM_MODE_FLAG_BCAST (1<<10)
|
||||
#define DRM_MODE_FLAG_PIXMUX (1<<11)
|
||||
#define DRM_MODE_FLAG_DBLCLK (1<<12)
|
||||
#define DRM_MODE_FLAG_CLKDIV2 (1<<13)
|
||||
/*
|
||||
* When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
|
||||
* (define not exposed to user space).
|
||||
*/
|
||||
#define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
|
||||
#define DRM_MODE_FLAG_3D_NONE (0<<14)
|
||||
#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
|
||||
#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
|
||||
#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
|
||||
#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
|
||||
#define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
|
||||
#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
|
||||
#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
|
||||
#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
|
||||
|
||||
/* Picture aspect ratio options */
|
||||
#define DRM_MODE_PICTURE_ASPECT_NONE 0
|
||||
#define DRM_MODE_PICTURE_ASPECT_4_3 1
|
||||
#define DRM_MODE_PICTURE_ASPECT_16_9 2
|
||||
|
||||
/* Aspect ratio flag bitmask (4 bits 22:19) */
|
||||
#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19)
|
||||
#define DRM_MODE_FLAG_PIC_AR_NONE \
|
||||
(DRM_MODE_PICTURE_ASPECT_NONE<<19)
|
||||
#define DRM_MODE_FLAG_PIC_AR_4_3 \
|
||||
(DRM_MODE_PICTURE_ASPECT_4_3<<19)
|
||||
#define DRM_MODE_FLAG_PIC_AR_16_9 \
|
||||
(DRM_MODE_PICTURE_ASPECT_16_9<<19)
|
||||
|
||||
/* DPMS flags */
|
||||
/* bit compatible with the xorg definitions. */
|
||||
#define DRM_MODE_DPMS_ON 0
|
||||
#define DRM_MODE_DPMS_STANDBY 1
|
||||
#define DRM_MODE_DPMS_SUSPEND 2
|
||||
#define DRM_MODE_DPMS_OFF 3
|
||||
|
||||
/* Scaling mode options */
|
||||
#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
|
||||
software can still scale) */
|
||||
#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
|
||||
#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
|
||||
#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
|
||||
|
||||
/* Dithering mode options */
|
||||
#define DRM_MODE_DITHERING_OFF 0
|
||||
#define DRM_MODE_DITHERING_ON 1
|
||||
#define DRM_MODE_DITHERING_AUTO 2
|
||||
|
||||
/* Dirty info options */
|
||||
#define DRM_MODE_DIRTY_OFF 0
|
||||
#define DRM_MODE_DIRTY_ON 1
|
||||
#define DRM_MODE_DIRTY_ANNOTATE 2
|
||||
|
||||
/* Link Status options */
|
||||
#define DRM_MODE_LINK_STATUS_GOOD 0
|
||||
#define DRM_MODE_LINK_STATUS_BAD 1
|
||||
|
||||
/*
|
||||
* DRM_MODE_ROTATE_<degrees>
|
||||
*
|
||||
* Signals that a drm plane is been rotated <degrees> degrees in counter
|
||||
* clockwise direction.
|
||||
*
|
||||
* This define is provided as a convenience, looking up the property id
|
||||
* using the name->prop id lookup is the preferred method.
|
||||
*/
|
||||
#define DRM_MODE_ROTATE_0 (1<<0)
|
||||
#define DRM_MODE_ROTATE_90 (1<<1)
|
||||
#define DRM_MODE_ROTATE_180 (1<<2)
|
||||
#define DRM_MODE_ROTATE_270 (1<<3)
|
||||
|
||||
/*
|
||||
* DRM_MODE_ROTATE_MASK
|
||||
*
|
||||
* Bitmask used to look for drm plane rotations.
|
||||
*/
|
||||
#define DRM_MODE_ROTATE_MASK (\
|
||||
DRM_MODE_ROTATE_0 | \
|
||||
DRM_MODE_ROTATE_90 | \
|
||||
DRM_MODE_ROTATE_180 | \
|
||||
DRM_MODE_ROTATE_270)
|
||||
|
||||
/*
|
||||
* DRM_MODE_REFLECT_<axis>
|
||||
*
|
||||
* Signals that the contents of a drm plane is reflected in the <axis> axis,
|
||||
* in the same way as mirroring.
|
||||
*
|
||||
* This define is provided as a convenience, looking up the property id
|
||||
* using the name->prop id lookup is the preferred method.
|
||||
*/
|
||||
#define DRM_MODE_REFLECT_X (1<<4)
|
||||
#define DRM_MODE_REFLECT_Y (1<<5)
|
||||
|
||||
/*
|
||||
* DRM_MODE_REFLECT_MASK
|
||||
*
|
||||
* Bitmask used to look for drm plane reflections.
|
||||
*/
|
||||
#define DRM_MODE_REFLECT_MASK (\
|
||||
DRM_MODE_REFLECT_X | \
|
||||
DRM_MODE_REFLECT_Y)
|
||||
|
||||
|
||||
struct drm_mode_modeinfo {
|
||||
__u32 clock;
|
||||
__u16 hdisplay;
|
||||
__u16 hsync_start;
|
||||
__u16 hsync_end;
|
||||
__u16 htotal;
|
||||
__u16 hskew;
|
||||
__u16 vdisplay;
|
||||
__u16 vsync_start;
|
||||
__u16 vsync_end;
|
||||
__u16 vtotal;
|
||||
__u16 vscan;
|
||||
|
||||
__u32 vrefresh;
|
||||
|
||||
__u32 flags;
|
||||
__u32 type;
|
||||
char name[DRM_DISPLAY_MODE_LEN];
|
||||
};
|
||||
|
||||
struct drm_mode_card_res {
|
||||
__u64 fb_id_ptr;
|
||||
__u64 crtc_id_ptr;
|
||||
__u64 connector_id_ptr;
|
||||
__u64 encoder_id_ptr;
|
||||
__u32 count_fbs;
|
||||
__u32 count_crtcs;
|
||||
__u32 count_connectors;
|
||||
__u32 count_encoders;
|
||||
__u32 min_width;
|
||||
__u32 max_width;
|
||||
__u32 min_height;
|
||||
__u32 max_height;
|
||||
};
|
||||
|
||||
struct drm_mode_crtc {
|
||||
__u64 set_connectors_ptr;
|
||||
__u32 count_connectors;
|
||||
|
||||
__u32 crtc_id; /**< Id */
|
||||
__u32 fb_id; /**< Id of framebuffer */
|
||||
|
||||
__u32 x; /**< x Position on the framebuffer */
|
||||
__u32 y; /**< y Position on the framebuffer */
|
||||
|
||||
__u32 gamma_size;
|
||||
__u32 mode_valid;
|
||||
struct drm_mode_modeinfo mode;
|
||||
};
|
||||
|
||||
#define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
|
||||
#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
|
||||
|
||||
/* Planes blend with or override other bits on the CRTC */
|
||||
struct drm_mode_set_plane {
|
||||
__u32 plane_id;
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id; /* fb object contains surface format type */
|
||||
__u32 flags; /* see above flags */
|
||||
|
||||
/* Signed dest location allows it to be partially off screen */
|
||||
__s32 crtc_x;
|
||||
__s32 crtc_y;
|
||||
__u32 crtc_w;
|
||||
__u32 crtc_h;
|
||||
|
||||
/* Source values are 16.16 fixed point */
|
||||
__u32 src_x;
|
||||
__u32 src_y;
|
||||
__u32 src_h;
|
||||
__u32 src_w;
|
||||
};
|
||||
|
||||
struct drm_mode_get_plane {
|
||||
__u32 plane_id;
|
||||
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id;
|
||||
|
||||
__u32 possible_crtcs;
|
||||
__u32 gamma_size;
|
||||
|
||||
__u32 count_format_types;
|
||||
__u64 format_type_ptr;
|
||||
};
|
||||
|
||||
struct drm_mode_get_plane_res {
|
||||
__u64 plane_id_ptr;
|
||||
__u32 count_planes;
|
||||
};
|
||||
|
||||
#define DRM_MODE_ENCODER_NONE 0
|
||||
#define DRM_MODE_ENCODER_DAC 1
|
||||
#define DRM_MODE_ENCODER_TMDS 2
|
||||
#define DRM_MODE_ENCODER_LVDS 3
|
||||
#define DRM_MODE_ENCODER_TVDAC 4
|
||||
#define DRM_MODE_ENCODER_VIRTUAL 5
|
||||
#define DRM_MODE_ENCODER_DSI 6
|
||||
#define DRM_MODE_ENCODER_DPMST 7
|
||||
#define DRM_MODE_ENCODER_DPI 8
|
||||
|
||||
struct drm_mode_get_encoder {
|
||||
__u32 encoder_id;
|
||||
__u32 encoder_type;
|
||||
|
||||
__u32 crtc_id; /**< Id of crtc */
|
||||
|
||||
__u32 possible_crtcs;
|
||||
__u32 possible_clones;
|
||||
};
|
||||
|
||||
/* This is for connectors with multiple signal types. */
|
||||
/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
|
||||
enum drm_mode_subconnector {
|
||||
DRM_MODE_SUBCONNECTOR_Automatic = 0,
|
||||
DRM_MODE_SUBCONNECTOR_Unknown = 0,
|
||||
DRM_MODE_SUBCONNECTOR_DVID = 3,
|
||||
DRM_MODE_SUBCONNECTOR_DVIA = 4,
|
||||
DRM_MODE_SUBCONNECTOR_Composite = 5,
|
||||
DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
|
||||
DRM_MODE_SUBCONNECTOR_Component = 8,
|
||||
DRM_MODE_SUBCONNECTOR_SCART = 9,
|
||||
};
|
||||
|
||||
#define DRM_MODE_CONNECTOR_Unknown 0
|
||||
#define DRM_MODE_CONNECTOR_VGA 1
|
||||
#define DRM_MODE_CONNECTOR_DVII 2
|
||||
#define DRM_MODE_CONNECTOR_DVID 3
|
||||
#define DRM_MODE_CONNECTOR_DVIA 4
|
||||
#define DRM_MODE_CONNECTOR_Composite 5
|
||||
#define DRM_MODE_CONNECTOR_SVIDEO 6
|
||||
#define DRM_MODE_CONNECTOR_LVDS 7
|
||||
#define DRM_MODE_CONNECTOR_Component 8
|
||||
#define DRM_MODE_CONNECTOR_9PinDIN 9
|
||||
#define DRM_MODE_CONNECTOR_DisplayPort 10
|
||||
#define DRM_MODE_CONNECTOR_HDMIA 11
|
||||
#define DRM_MODE_CONNECTOR_HDMIB 12
|
||||
#define DRM_MODE_CONNECTOR_TV 13
|
||||
#define DRM_MODE_CONNECTOR_eDP 14
|
||||
#define DRM_MODE_CONNECTOR_VIRTUAL 15
|
||||
#define DRM_MODE_CONNECTOR_DSI 16
|
||||
#define DRM_MODE_CONNECTOR_DPI 17
|
||||
|
||||
struct drm_mode_get_connector {
|
||||
|
||||
__u64 encoders_ptr;
|
||||
__u64 modes_ptr;
|
||||
__u64 props_ptr;
|
||||
__u64 prop_values_ptr;
|
||||
|
||||
__u32 count_modes;
|
||||
__u32 count_props;
|
||||
__u32 count_encoders;
|
||||
|
||||
__u32 encoder_id; /**< Current Encoder */
|
||||
__u32 connector_id; /**< Id */
|
||||
__u32 connector_type;
|
||||
__u32 connector_type_id;
|
||||
|
||||
__u32 connection;
|
||||
__u32 mm_width; /**< width in millimeters */
|
||||
__u32 mm_height; /**< height in millimeters */
|
||||
__u32 subpixel;
|
||||
|
||||
__u32 pad;
|
||||
};
|
||||
|
||||
#define DRM_MODE_PROP_PENDING (1<<0)
|
||||
#define DRM_MODE_PROP_RANGE (1<<1)
|
||||
#define DRM_MODE_PROP_IMMUTABLE (1<<2)
|
||||
#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
|
||||
#define DRM_MODE_PROP_BLOB (1<<4)
|
||||
#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
|
||||
|
||||
/* non-extended types: legacy bitmask, one bit per type: */
|
||||
#define DRM_MODE_PROP_LEGACY_TYPE ( \
|
||||
DRM_MODE_PROP_RANGE | \
|
||||
DRM_MODE_PROP_ENUM | \
|
||||
DRM_MODE_PROP_BLOB | \
|
||||
DRM_MODE_PROP_BITMASK)
|
||||
|
||||
/* extended-types: rather than continue to consume a bit per type,
|
||||
* grab a chunk of the bits to use as integer type id.
|
||||
*/
|
||||
#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
|
||||
#define DRM_MODE_PROP_TYPE(n) ((n) << 6)
|
||||
#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
|
||||
#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
|
||||
|
||||
/* the PROP_ATOMIC flag is used to hide properties from userspace that
|
||||
* is not aware of atomic properties. This is mostly to work around
|
||||
* older userspace (DDX drivers) that read/write each prop they find,
|
||||
* witout being aware that this could be triggering a lengthy modeset.
|
||||
*/
|
||||
#define DRM_MODE_PROP_ATOMIC 0x80000000
|
||||
|
||||
struct drm_mode_property_enum {
|
||||
__u64 value;
|
||||
char name[DRM_PROP_NAME_LEN];
|
||||
};
|
||||
|
||||
struct drm_mode_get_property {
|
||||
__u64 values_ptr; /* values and blob lengths */
|
||||
__u64 enum_blob_ptr; /* enum and blob id ptrs */
|
||||
|
||||
__u32 prop_id;
|
||||
__u32 flags;
|
||||
char name[DRM_PROP_NAME_LEN];
|
||||
|
||||
__u32 count_values;
|
||||
/* This is only used to count enum values, not blobs. The _blobs is
|
||||
* simply because of a historical reason, i.e. backwards compat. */
|
||||
__u32 count_enum_blobs;
|
||||
};
|
||||
|
||||
struct drm_mode_connector_set_property {
|
||||
__u64 value;
|
||||
__u32 prop_id;
|
||||
__u32 connector_id;
|
||||
};
|
||||
|
||||
#define DRM_MODE_OBJECT_CRTC 0xcccccccc
|
||||
#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
|
||||
#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
|
||||
#define DRM_MODE_OBJECT_MODE 0xdededede
|
||||
#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
|
||||
#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
|
||||
#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
|
||||
#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
|
||||
#define DRM_MODE_OBJECT_ANY 0
|
||||
|
||||
struct drm_mode_obj_get_properties {
|
||||
__u64 props_ptr;
|
||||
__u64 prop_values_ptr;
|
||||
__u32 count_props;
|
||||
__u32 obj_id;
|
||||
__u32 obj_type;
|
||||
};
|
||||
|
||||
struct drm_mode_obj_set_property {
|
||||
__u64 value;
|
||||
__u32 prop_id;
|
||||
__u32 obj_id;
|
||||
__u32 obj_type;
|
||||
};
|
||||
|
||||
struct drm_mode_get_blob {
|
||||
__u32 blob_id;
|
||||
__u32 length;
|
||||
__u64 data;
|
||||
};
|
||||
|
||||
struct drm_mode_fb_cmd {
|
||||
__u32 fb_id;
|
||||
__u32 width;
|
||||
__u32 height;
|
||||
__u32 pitch;
|
||||
__u32 bpp;
|
||||
__u32 depth;
|
||||
/* driver specific handle */
|
||||
__u32 handle;
|
||||
};
|
||||
|
||||
#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
|
||||
#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
|
||||
|
||||
struct drm_mode_fb_cmd2 {
|
||||
__u32 fb_id;
|
||||
__u32 width;
|
||||
__u32 height;
|
||||
__u32 pixel_format; /* fourcc code from drm_fourcc.h */
|
||||
__u32 flags; /* see above flags */
|
||||
|
||||
/*
|
||||
* In case of planar formats, this ioctl allows up to 4
|
||||
* buffer objects with offsets and pitches per plane.
|
||||
* The pitch and offset order is dictated by the fourcc,
|
||||
* e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
|
||||
*
|
||||
* YUV 4:2:0 image with a plane of 8 bit Y samples
|
||||
* followed by an interleaved U/V plane containing
|
||||
* 8 bit 2x2 subsampled colour difference samples.
|
||||
*
|
||||
* So it would consist of Y as offsets[0] and UV as
|
||||
* offsets[1]. Note that offsets[0] will generally
|
||||
* be 0 (but this is not required).
|
||||
*
|
||||
* To accommodate tiled, compressed, etc formats, a
|
||||
* modifier can be specified. The default value of zero
|
||||
* indicates "native" format as specified by the fourcc.
|
||||
* Vendor specific modifier token. Note that even though
|
||||
* it looks like we have a modifier per-plane, we in fact
|
||||
* do not. The modifier for each plane must be identical.
|
||||
* Thus all combinations of different data layouts for
|
||||
* multi plane formats must be enumerated as separate
|
||||
* modifiers.
|
||||
*/
|
||||
__u32 handles[4];
|
||||
__u32 pitches[4]; /* pitch for each plane */
|
||||
__u32 offsets[4]; /* offset of each plane */
|
||||
__u64 modifier[4]; /* ie, tiling, compress */
|
||||
};
|
||||
|
||||
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
|
||||
#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
|
||||
#define DRM_MODE_FB_DIRTY_FLAGS 0x03
|
||||
|
||||
#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
|
||||
|
||||
/*
|
||||
* Mark a region of a framebuffer as dirty.
|
||||
*
|
||||
* Some hardware does not automatically update display contents
|
||||
* as a hardware or software draw to a framebuffer. This ioctl
|
||||
* allows userspace to tell the kernel and the hardware what
|
||||
* regions of the framebuffer have changed.
|
||||
*
|
||||
* The kernel or hardware is free to update more then just the
|
||||
* region specified by the clip rects. The kernel or hardware
|
||||
* may also delay and/or coalesce several calls to dirty into a
|
||||
* single update.
|
||||
*
|
||||
* Userspace may annotate the updates, the annotates are a
|
||||
* promise made by the caller that the change is either a copy
|
||||
* of pixels or a fill of a single color in the region specified.
|
||||
*
|
||||
* If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
|
||||
* the number of updated regions are half of num_clips given,
|
||||
* where the clip rects are paired in src and dst. The width and
|
||||
* height of each one of the pairs must match.
|
||||
*
|
||||
* If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
|
||||
* promises that the region specified of the clip rects is filled
|
||||
* completely with a single color as given in the color argument.
|
||||
*/
|
||||
|
||||
struct drm_mode_fb_dirty_cmd {
|
||||
__u32 fb_id;
|
||||
__u32 flags;
|
||||
__u32 color;
|
||||
__u32 num_clips;
|
||||
__u64 clips_ptr;
|
||||
};
|
||||
|
||||
struct drm_mode_mode_cmd {
|
||||
__u32 connector_id;
|
||||
struct drm_mode_modeinfo mode;
|
||||
};
|
||||
|
||||
#define DRM_MODE_CURSOR_BO 0x01
|
||||
#define DRM_MODE_CURSOR_MOVE 0x02
|
||||
#define DRM_MODE_CURSOR_FLAGS 0x03
|
||||
|
||||
/*
|
||||
* depending on the value in flags different members are used.
|
||||
*
|
||||
* CURSOR_BO uses
|
||||
* crtc_id
|
||||
* width
|
||||
* height
|
||||
* handle - if 0 turns the cursor off
|
||||
*
|
||||
* CURSOR_MOVE uses
|
||||
* crtc_id
|
||||
* x
|
||||
* y
|
||||
*/
|
||||
struct drm_mode_cursor {
|
||||
__u32 flags;
|
||||
__u32 crtc_id;
|
||||
__s32 x;
|
||||
__s32 y;
|
||||
__u32 width;
|
||||
__u32 height;
|
||||
/* driver specific handle */
|
||||
__u32 handle;
|
||||
};
|
||||
|
||||
struct drm_mode_cursor2 {
|
||||
__u32 flags;
|
||||
__u32 crtc_id;
|
||||
__s32 x;
|
||||
__s32 y;
|
||||
__u32 width;
|
||||
__u32 height;
|
||||
/* driver specific handle */
|
||||
__u32 handle;
|
||||
__s32 hot_x;
|
||||
__s32 hot_y;
|
||||
};
|
||||
|
||||
struct drm_mode_crtc_lut {
|
||||
__u32 crtc_id;
|
||||
__u32 gamma_size;
|
||||
|
||||
/* pointers to arrays */
|
||||
__u64 red;
|
||||
__u64 green;
|
||||
__u64 blue;
|
||||
};
|
||||
|
||||
struct drm_color_ctm {
|
||||
/* Conversion matrix in S31.32 format. */
|
||||
__s64 matrix[9];
|
||||
};
|
||||
|
||||
struct drm_color_lut {
|
||||
/*
|
||||
* Data is U0.16 fixed point format.
|
||||
*/
|
||||
__u16 red;
|
||||
__u16 green;
|
||||
__u16 blue;
|
||||
__u16 reserved;
|
||||
};
|
||||
|
||||
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
|
||||
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
|
||||
#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
|
||||
#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
|
||||
#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
|
||||
DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
|
||||
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
|
||||
DRM_MODE_PAGE_FLIP_ASYNC | \
|
||||
DRM_MODE_PAGE_FLIP_TARGET)
|
||||
|
||||
/*
|
||||
* Request a page flip on the specified crtc.
|
||||
*
|
||||
* This ioctl will ask KMS to schedule a page flip for the specified
|
||||
* crtc. Once any pending rendering targeting the specified fb (as of
|
||||
* ioctl time) has completed, the crtc will be reprogrammed to display
|
||||
* that fb after the next vertical refresh. The ioctl returns
|
||||
* immediately, but subsequent rendering to the current fb will block
|
||||
* in the execbuffer ioctl until the page flip happens. If a page
|
||||
* flip is already pending as the ioctl is called, EBUSY will be
|
||||
* returned.
|
||||
*
|
||||
* Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
|
||||
* event (see drm.h: struct drm_event_vblank) when the page flip is
|
||||
* done. The user_data field passed in with this ioctl will be
|
||||
* returned as the user_data field in the vblank event struct.
|
||||
*
|
||||
* Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
|
||||
* 'as soon as possible', meaning that it not delay waiting for vblank.
|
||||
* This may cause tearing on the screen.
|
||||
*
|
||||
* The reserved field must be zero.
|
||||
*/
|
||||
|
||||
struct drm_mode_crtc_page_flip {
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id;
|
||||
__u32 flags;
|
||||
__u32 reserved;
|
||||
__u64 user_data;
|
||||
};
|
||||
|
||||
/*
|
||||
* Request a page flip on the specified crtc.
|
||||
*
|
||||
* Same as struct drm_mode_crtc_page_flip, but supports new flags and
|
||||
* re-purposes the reserved field:
|
||||
*
|
||||
* The sequence field must be zero unless either of the
|
||||
* DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
|
||||
* the ABSOLUTE flag is specified, the sequence field denotes the absolute
|
||||
* vblank sequence when the flip should take effect. When the RELATIVE
|
||||
* flag is specified, the sequence field denotes the relative (to the
|
||||
* current one when the ioctl is called) vblank sequence when the flip
|
||||
* should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
|
||||
* make sure the vblank sequence before the target one has passed before
|
||||
* calling this ioctl. The purpose of the
|
||||
* DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
|
||||
* the target for when code dealing with a page flip runs during a
|
||||
* vertical blank period.
|
||||
*/
|
||||
|
||||
struct drm_mode_crtc_page_flip_target {
|
||||
__u32 crtc_id;
|
||||
__u32 fb_id;
|
||||
__u32 flags;
|
||||
__u32 sequence;
|
||||
__u64 user_data;
|
||||
};
|
||||
|
||||
/* create a dumb scanout buffer */
|
||||
struct drm_mode_create_dumb {
|
||||
__u32 height;
|
||||
__u32 width;
|
||||
__u32 bpp;
|
||||
__u32 flags;
|
||||
/* handle, pitch, size will be returned */
|
||||
__u32 handle;
|
||||
__u32 pitch;
|
||||
__u64 size;
|
||||
};
|
||||
|
||||
/* set up for mmap of a dumb scanout buffer */
|
||||
struct drm_mode_map_dumb {
|
||||
/** Handle for the object being mapped. */
|
||||
__u32 handle;
|
||||
__u32 pad;
|
||||
/**
|
||||
* Fake offset to use for subsequent mmap call
|
||||
*
|
||||
* This is a fixed-size type for 32/64 compatibility.
|
||||
*/
|
||||
__u64 offset;
|
||||
};
|
||||
|
||||
struct drm_mode_destroy_dumb {
|
||||
__u32 handle;
|
||||
};
|
||||
|
||||
/* page-flip flags are valid, plus: */
|
||||
#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
|
||||
#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
|
||||
#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
|
||||
|
||||
#define DRM_MODE_ATOMIC_FLAGS (\
|
||||
DRM_MODE_PAGE_FLIP_EVENT |\
|
||||
DRM_MODE_PAGE_FLIP_ASYNC |\
|
||||
DRM_MODE_ATOMIC_TEST_ONLY |\
|
||||
DRM_MODE_ATOMIC_NONBLOCK |\
|
||||
DRM_MODE_ATOMIC_ALLOW_MODESET)
|
||||
|
||||
struct drm_mode_atomic {
|
||||
__u32 flags;
|
||||
__u32 count_objs;
|
||||
__u64 objs_ptr;
|
||||
__u64 count_props_ptr;
|
||||
__u64 props_ptr;
|
||||
__u64 prop_values_ptr;
|
||||
__u64 reserved;
|
||||
__u64 user_data;
|
||||
};
|
||||
|
||||
/**
|
||||
* Create a new 'blob' data property, copying length bytes from data pointer,
|
||||
* and returning new blob ID.
|
||||
*/
|
||||
struct drm_mode_create_blob {
|
||||
/** Pointer to data to copy. */
|
||||
__u64 data;
|
||||
/** Length of data to copy. */
|
||||
__u32 length;
|
||||
/** Return: new property ID. */
|
||||
__u32 blob_id;
|
||||
};
|
||||
|
||||
/**
|
||||
* Destroy a user-created blob property.
|
||||
*/
|
||||
struct drm_mode_destroy_blob {
|
||||
__u32 blob_id;
|
||||
};
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -38,6 +38,7 @@ AM_CFLAGS = \
|
|||
-I$(top_srcdir)/src/compiler/nir \
|
||||
-I$(top_builddir)/src/intel \
|
||||
-I$(top_srcdir)/src/intel \
|
||||
-I$(top_srcdir)/src/intel/drm \
|
||||
$(DEFINES) \
|
||||
$(VISIBILITY_CFLAGS) \
|
||||
$(LIBDRM_CFLAGS) \
|
||||
|
|
|
|||
Loading…
Reference in New Issue