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radeonsi: drop LLVM global instruction selector 

I'm not sure if this is really used by anyone?

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15559>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2022-03-24 17:17:17 +01:00 committed by Marge Bot
parent 47152875c7
commit 7d7c56e61a
7 changed files with 2 additions and 21 deletions
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2
docs/envvars.rst
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@ -823,8 +823,6 @@ radeonsi driver environment variables
Don't print disassembled shaders
``preoptir``
Print the LLVM IR before initial optimizations
``gisel``
Enable LLVM global instruction selector.
``w32ge``
Use Wave32 for vertex, tessellation, and geometry shaders.
``w32ps``

5
src/amd/llvm/ac_llvm_helper.cpp
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@ -256,11 +256,6 @@ void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr)
llvm::unwrap(passmgr)->add(llvm::createBarrierNoopPass());
}
void ac_enable_global_isel(LLVMTargetMachineRef tm)
{
reinterpret_cast<llvm::TargetMachine *>(tm)->setGlobalISel(true);
}
LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op,
LLVMValueRef ptr, LLVMValueRef val, const char *sync_scope)
{

7
src/amd/llvm/ac_llvm_util.c
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@ -59,14 +59,10 @@ static void ac_init_llvm_target(void)
*
* "mesa" is the prefix for error messages.
*
* -global-isel-abort=2 is a no-op unless global isel has been enabled.
* This option tells the backend to fall-back to SelectionDAG and print
* a diagnostic message if global isel fails.
*/
const char *argv[] = {
"mesa",
"-simplifycfg-sink-common=false",
"-global-isel-abort=2",
"-amdgpu-atomic-optimizations=true",
#if LLVM_VERSION_MAJOR == 11
/* This fixes variable indexing on LLVM 11. It also breaks atomic.cmpswap on LLVM >= 12. */
@ -207,8 +203,7 @@ static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
if (out_triple)
*out_triple = triple;
if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL)
ac_enable_global_isel(tm);
return tm;
}

4
src/amd/llvm/ac_llvm_util.h
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@ -63,8 +63,7 @@ enum ac_target_machine_options
{
AC_TM_SUPPORTS_SPILL = 1 << 0,
AC_TM_CHECK_IR = 1 << 1,
AC_TM_ENABLE_GLOBAL_ISEL = 1 << 2,
AC_TM_CREATE_LOW_OPT = 1 << 3,
AC_TM_CREATE_LOW_OPT = 1 << 2,
};
enum ac_float_mode
@ -132,7 +131,6 @@ void ac_destroy_llvm_passes(struct ac_compiler_passes *p);
bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module,
char **pelf_buffer, size_t *pelf_size);
void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr);
void ac_enable_global_isel(LLVMTargetMachineRef tm);
static inline bool ac_has_vec3_support(enum chip_class chip, bool use_format)
{

2
src/gallium/drivers/radeonsi/si_pipe.c
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@ -63,7 +63,6 @@ static const struct debug_named_value radeonsi_debug_options[] = {
{"preoptir", DBG(PREOPT_IR), "Print the LLVM IR before initial optimizations"},
/* Shader compiler options the shader cache should be aware of: */
{"gisel", DBG(GISEL), "Enable LLVM global instruction selector."},
{"w32ge", DBG(W32_GE), "Use Wave32 for vertex, tessellation, and geometry shaders."},
{"w32ps", DBG(W32_PS), "Use Wave32 for pixel shaders."},
{"w32psdiscard", DBG(W32_PS_DISCARD), "Use Wave32 for pixel shaders even if they contain discard and LLVM is buggy."},
@ -145,7 +144,6 @@ void si_init_compiler(struct si_screen *sscreen, struct ac_llvm_compiler *compil
!sscreen->info.has_dedicated_vram && sscreen->info.chip_class <= GFX8;
enum ac_target_machine_options tm_options =
(sscreen->debug_flags & DBG(GISEL) ? AC_TM_ENABLE_GLOBAL_ISEL : 0) |
(sscreen->debug_flags & DBG(CHECK_IR) ? AC_TM_CHECK_IR : 0) |
(create_low_opt_compiler ? AC_TM_CREATE_LOW_OPT : 0);

1
src/gallium/drivers/radeonsi/si_pipe.h
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@ -192,7 +192,6 @@ enum
/* Shader compiler options the shader cache should be aware of: */
DBG_FS_CORRECT_DERIVS_AFTER_KILL,
DBG_GISEL,
DBG_W32_GE,
DBG_W32_PS,
DBG_W32_PS_DISCARD,

2
src/gallium/drivers/radeonsi/si_state_shaders.cpp
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@ -190,8 +190,6 @@ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es,
shader_variant_flags |= 1 << 7;
if (sel->screen->options.clamp_div_by_zero)
shader_variant_flags |= 1 << 8;
if (sel->screen->debug_flags & DBG(GISEL))
shader_variant_flags |= 1 << 9;
if ((sel->info.stage == MESA_SHADER_VERTEX ||
sel->info.stage == MESA_SHADER_TESS_EVAL ||
sel->info.stage == MESA_SHADER_GEOMETRY) &&