Merge branch 'master' into r300g-glsl
Conflicts: src/gallium/drivers/r300/r300_tgsi_to_rc.c Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
This commit is contained in:
commit
7ca7220ea1
|
@ -32,10 +32,10 @@ import common
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default_statetrackers = 'mesa'
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default_statetrackers = 'mesa'
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|
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if common.default_platform in ('linux', 'freebsd', 'darwin'):
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if common.default_platform in ('linux', 'freebsd', 'darwin'):
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default_drivers = 'softpipe,failover,i915simple,trace,identity,llvmpipe'
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default_drivers = 'softpipe,failover,i915,trace,identity,llvmpipe'
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default_winsys = 'xlib'
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default_winsys = 'xlib'
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elif common.default_platform in ('winddk',):
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elif common.default_platform in ('winddk',):
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default_drivers = 'softpipe,i915simple,trace,identity'
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default_drivers = 'softpipe,i915,trace,identity'
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default_winsys = 'all'
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default_winsys = 'all'
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else:
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else:
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default_drivers = 'all'
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default_drivers = 'all'
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@ -46,7 +46,7 @@ common.AddOptions(opts)
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opts.Add(ListVariable('statetrackers', 'state trackers to build', default_statetrackers,
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opts.Add(ListVariable('statetrackers', 'state trackers to build', default_statetrackers,
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['mesa', 'python', 'xorg']))
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['mesa', 'python', 'xorg']))
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opts.Add(ListVariable('drivers', 'pipe drivers to build', default_drivers,
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opts.Add(ListVariable('drivers', 'pipe drivers to build', default_drivers,
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['softpipe', 'failover', 'i915simple', 'i965simple', 'cell', 'trace', 'r300', 'identity', 'llvmpipe']))
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['softpipe', 'failover', 'i915', 'cell', 'trace', 'r300', 'identity', 'llvmpipe']))
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opts.Add(ListVariable('winsys', 'winsys drivers to build', default_winsys,
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opts.Add(ListVariable('winsys', 'winsys drivers to build', default_winsys,
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['xlib', 'intel', 'gdi', 'radeon']))
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['xlib', 'intel', 'gdi', 'radeon']))
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|
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|
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@ -96,7 +96,7 @@ EGL_DRIVERS_DIRS = demo
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GALLIUM_DIRS = auxiliary drivers state_trackers
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GALLIUM_DIRS = auxiliary drivers state_trackers
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GALLIUM_AUXILIARY_DIRS = rbug draw translate cso_cache pipebuffer tgsi sct rtasm util indices vl
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GALLIUM_AUXILIARY_DIRS = rbug draw translate cso_cache pipebuffer tgsi sct rtasm util indices vl
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GALLIUM_AUXILIARIES = $(foreach DIR,$(GALLIUM_AUXILIARY_DIRS),$(TOP)/src/gallium/auxiliary/$(DIR)/lib$(DIR).a)
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GALLIUM_AUXILIARIES = $(foreach DIR,$(GALLIUM_AUXILIARY_DIRS),$(TOP)/src/gallium/auxiliary/$(DIR)/lib$(DIR).a)
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GALLIUM_DRIVERS_DIRS = softpipe i915simple failover trace identity
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GALLIUM_DRIVERS_DIRS = softpipe i915 failover trace identity
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GALLIUM_DRIVERS = $(foreach DIR,$(GALLIUM_DRIVERS_DIRS),$(TOP)/src/gallium/drivers/$(DIR)/lib$(DIR).a)
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GALLIUM_DRIVERS = $(foreach DIR,$(GALLIUM_DRIVERS_DIRS),$(TOP)/src/gallium/drivers/$(DIR)/lib$(DIR).a)
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GALLIUM_WINSYS_DIRS = xlib egl_xlib
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GALLIUM_WINSYS_DIRS = xlib egl_xlib
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GALLIUM_WINSYS_DRM_DIRS =
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GALLIUM_WINSYS_DRM_DIRS =
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|
|
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@ -1190,7 +1190,7 @@ AC_ARG_ENABLE([gallium-intel],
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[enable_gallium_intel=yes])
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[enable_gallium_intel=yes])
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if test "x$enable_gallium_intel" = xyes; then
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if test "x$enable_gallium_intel" = xyes; then
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GALLIUM_WINSYS_DRM_DIRS="$GALLIUM_WINSYS_DRM_DIRS intel"
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GALLIUM_WINSYS_DRM_DIRS="$GALLIUM_WINSYS_DRM_DIRS intel"
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GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS i915simple"
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GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS i915"
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fi
|
fi
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|
|
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dnl
|
dnl
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|
|
|
@ -40,6 +40,9 @@ tbd
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<li>Fixed crash caused by glXCopyContext() and glXDestroyContext(), bug 24217
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<li>Fixed crash caused by glXCopyContext() and glXDestroyContext(), bug 24217
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<li>glXQueryContext(GLX_RENDER_TYPE) returned wrong values (bug 24211)
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<li>glXQueryContext(GLX_RENDER_TYPE) returned wrong values (bug 24211)
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<li>GLSL sqrt(0) returned unpredictable results
|
<li>GLSL sqrt(0) returned unpredictable results
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|
<li>Fixed default texture binding bug when a bound texture was deleted.
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||||||
|
<li>r300: Work around an issue with very large fragment programs on R500.
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||||||
|
<li>Fake glXQueryDrawable() didn't return good values (bug 24320)
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||||||
</ul>
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</ul>
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|
|
||||||
</body>
|
</body>
|
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|
|
|
@ -16,6 +16,9 @@
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#include <GL/glut.h>
|
#include <GL/glut.h>
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#include "shaderutil.h"
|
#include "shaderutil.h"
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|
|
||||||
|
#ifndef M_PI
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|
#define M_PI 3.1415926535
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|
#endif
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|
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static char *FragProgFile = "skinning.frag";
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static char *FragProgFile = "skinning.frag";
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static char *VertProgFile = "skinning.vert";
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static char *VertProgFile = "skinning.vert";
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|
|
|
@ -14,6 +14,9 @@
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#include <GL/glew.h>
|
#include <GL/glew.h>
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#include <GL/glut.h>
|
#include <GL/glut.h>
|
||||||
|
|
||||||
|
#ifndef M_PI
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||||||
|
#define M_PI 3.1415926535
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||||||
|
#endif
|
||||||
|
|
||||||
static GLint WinWidth = 300, WinHeight = 300;
|
static GLint WinWidth = 300, WinHeight = 300;
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static GLint win = 0;
|
static GLint win = 0;
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||||||
|
|
|
@ -16,6 +16,9 @@
|
||||||
#include <GL/glut.h>
|
#include <GL/glut.h>
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||||||
#include "shaderutil.h"
|
#include "shaderutil.h"
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||||||
|
|
||||||
|
#ifndef M_PI
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||||||
|
#define M_PI 3.1415926535
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||||||
|
#endif
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||||||
|
|
||||||
static GLint WinWidth = 300, WinHeight = 300;
|
static GLint WinWidth = 300, WinHeight = 300;
|
||||||
static char *FragProgFile = NULL;
|
static char *FragProgFile = NULL;
|
||||||
|
|
|
@ -30,6 +30,10 @@
|
||||||
#include <stdlib.h>
|
#include <stdlib.h>
|
||||||
#include <stdarg.h>
|
#include <stdarg.h>
|
||||||
|
|
||||||
|
#if defined(_MSC_VER)
|
||||||
|
#define snprintf _snprintf
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/* Need to add a fflush windows console with mingw, otherwise nothing
|
/* Need to add a fflush windows console with mingw, otherwise nothing
|
||||||
* shows up until program exit. May want to add logging here.
|
* shows up until program exit. May want to add logging here.
|
||||||
|
|
|
@ -69,7 +69,7 @@ DrawTestImage(void)
|
||||||
static int
|
static int
|
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Rand(int max)
|
Rand(int max)
|
||||||
{
|
{
|
||||||
return ((int) random()) % max;
|
return ((int) rand()) % max;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -257,11 +257,11 @@ RandomPrimitive(void)
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Vcount++;
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Vcount++;
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||||||
|
|
||||||
for (i = 0; i < len; i++) {
|
for (i = 0; i < len; i++) {
|
||||||
|
int k = RandomInt(9);
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Vbuffer[Vcount].v[0] = RandomFloat(-3, 3);
|
Vbuffer[Vcount].v[0] = RandomFloat(-3, 3);
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||||||
Vbuffer[Vcount].v[1] = RandomFloat(-3, 3);
|
Vbuffer[Vcount].v[1] = RandomFloat(-3, 3);
|
||||||
Vbuffer[Vcount].v[2] = RandomFloat(-3, 3);
|
Vbuffer[Vcount].v[2] = RandomFloat(-3, 3);
|
||||||
Vbuffer[Vcount].v[3] = RandomFloat(-3, 3);
|
Vbuffer[Vcount].v[3] = RandomFloat(-3, 3);
|
||||||
int k = RandomInt(9);
|
|
||||||
switch (k) {
|
switch (k) {
|
||||||
case 0:
|
case 0:
|
||||||
glVertex2fv(Vbuffer[Vcount].v);
|
glVertex2fv(Vbuffer[Vcount].v);
|
||||||
|
|
|
@ -143,7 +143,7 @@ MakePbuffer( Display *dpy, int screen, int width, int height )
|
||||||
|
|
||||||
/* Create the pbuffer using first fbConfig in the list that works. */
|
/* Create the pbuffer using first fbConfig in the list that works. */
|
||||||
for (i=0;i<nConfigs;i++) {
|
for (i=0;i<nConfigs;i++) {
|
||||||
pBuffer = CreatePbuffer(dpy, screen, fbConfigs[i], width, height, preserve, largest);
|
pBuffer = CreatePbuffer(dpy, screen, fbConfigs[i], width, height, largest, preserve);
|
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if (pBuffer) {
|
if (pBuffer) {
|
||||||
gFBconfig = fbConfigs[i];
|
gFBconfig = fbConfigs[i];
|
||||||
gWidth = width;
|
gWidth = width;
|
||||||
|
@ -210,6 +210,21 @@ Setup(int width, int height)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Test drawable queries */
|
||||||
|
{
|
||||||
|
unsigned int v;
|
||||||
|
glXQueryDrawable( gDpy, gPBuffer, GLX_WIDTH, &v);
|
||||||
|
printf("GLX_WIDTH = %u\n", v);
|
||||||
|
glXQueryDrawable( gDpy, gPBuffer, GLX_HEIGHT, &v);
|
||||||
|
printf("GLX_HEIGHT = %u\n", v);
|
||||||
|
glXQueryDrawable( gDpy, gPBuffer, GLX_PRESERVED_CONTENTS, &v);
|
||||||
|
printf("GLX_PRESERVED_CONTENTS = %u\n", v);
|
||||||
|
glXQueryDrawable( gDpy, gPBuffer, GLX_LARGEST_PBUFFER, &v);
|
||||||
|
printf("GLX_LARGEST_PBUFFER = %u\n", v);
|
||||||
|
glXQueryDrawable( gDpy, gPBuffer, GLX_FBCONFIG_ID, &v);
|
||||||
|
printf("GLX_FBCONFIG_ID = %u\n", v);
|
||||||
|
}
|
||||||
|
|
||||||
/* Get corresponding XVisualInfo */
|
/* Get corresponding XVisualInfo */
|
||||||
visInfo = GetVisualFromFBConfig(gDpy, gScreen, gFBconfig);
|
visInfo = GetVisualFromFBConfig(gDpy, gScreen, gFBconfig);
|
||||||
if (!visInfo) {
|
if (!visInfo) {
|
||||||
|
|
|
@ -268,7 +268,7 @@ void cso_release_all( struct cso_context *ctx )
|
||||||
void cso_destroy_context( struct cso_context *ctx )
|
void cso_destroy_context( struct cso_context *ctx )
|
||||||
{
|
{
|
||||||
if (ctx) {
|
if (ctx) {
|
||||||
//cso_release_all( ctx );
|
/*cso_release_all( ctx );*/
|
||||||
FREE( ctx );
|
FREE( ctx );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -212,17 +212,10 @@ static void fse_prepare( struct draw_pt_middle_end *middle,
|
||||||
struct draw_vertex_shader *vs = draw->vs.vertex_shader;
|
struct draw_vertex_shader *vs = draw->vs.vertex_shader;
|
||||||
vs->prepare(vs, draw);
|
vs->prepare(vs, draw);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
//return TRUE;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void fse_run_linear( struct draw_pt_middle_end *middle,
|
static void fse_run_linear( struct draw_pt_middle_end *middle,
|
||||||
unsigned start,
|
unsigned start,
|
||||||
unsigned count )
|
unsigned count )
|
||||||
|
|
|
@ -210,7 +210,7 @@ void draw_pt_post_vs_prepare( struct pt_post_vs *pvs,
|
||||||
pvs->run = post_vs_viewport;
|
pvs->run = post_vs_viewport;
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
//if (opengl)
|
/* if (opengl) */
|
||||||
pvs->run = post_vs_cliptest_viewport_gl;
|
pvs->run = post_vs_cliptest_viewport_gl;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -891,7 +891,7 @@ static void x87_emit_ex2( struct aos_compilation *cp )
|
||||||
struct x86_reg st1 = x86_make_reg(file_x87, 1);
|
struct x86_reg st1 = x86_make_reg(file_x87, 1);
|
||||||
int stack = cp->func->x87_stack;
|
int stack = cp->func->x87_stack;
|
||||||
|
|
||||||
// set_fpu_round_neg_inf( cp );
|
/* set_fpu_round_neg_inf( cp ); */
|
||||||
|
|
||||||
x87_fld(cp->func, st0); /* a a */
|
x87_fld(cp->func, st0); /* a a */
|
||||||
x87_fprndint( cp->func ); /* int(a) a*/
|
x87_fprndint( cp->func ); /* int(a) a*/
|
||||||
|
@ -1759,14 +1759,14 @@ emit_instruction( struct aos_compilation *cp,
|
||||||
return emit_SUB(cp, inst);
|
return emit_SUB(cp, inst);
|
||||||
|
|
||||||
case TGSI_OPCODE_LRP:
|
case TGSI_OPCODE_LRP:
|
||||||
// return emit_LERP(cp, inst);
|
/*return emit_LERP(cp, inst);*/
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
case TGSI_OPCODE_FRC:
|
case TGSI_OPCODE_FRC:
|
||||||
return emit_FRC(cp, inst);
|
return emit_FRC(cp, inst);
|
||||||
|
|
||||||
case TGSI_OPCODE_CLAMP:
|
case TGSI_OPCODE_CLAMP:
|
||||||
// return emit_CLAMP(cp, inst);
|
/*return emit_CLAMP(cp, inst);*/
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
case TGSI_OPCODE_FLR:
|
case TGSI_OPCODE_FLR:
|
||||||
|
|
|
@ -584,7 +584,7 @@ fenced_buffer_list_destroy(struct fenced_buffer_list *fenced_list)
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
//assert(!fenced_list->numUnfenced);
|
/*assert(!fenced_list->numUnfenced);*/
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
pipe_mutex_unlock(fenced_list->mutex);
|
pipe_mutex_unlock(fenced_list->mutex);
|
||||||
|
|
|
@ -217,7 +217,7 @@ ATTRIB( R8G8_SNORM, 2, char, FROM_8_SNORM, TO_8_SNORM )
|
||||||
ATTRIB( R8_SNORM, 1, char, FROM_8_SNORM, TO_8_SNORM )
|
ATTRIB( R8_SNORM, 1, char, FROM_8_SNORM, TO_8_SNORM )
|
||||||
|
|
||||||
ATTRIB( A8R8G8B8_UNORM, 4, ubyte, FROM_8_UNORM, TO_8_UNORM )
|
ATTRIB( A8R8G8B8_UNORM, 4, ubyte, FROM_8_UNORM, TO_8_UNORM )
|
||||||
//ATTRIB( R8G8B8A8_UNORM, 4, ubyte, FROM_8_UNORM, TO_8_UNORM )
|
/*ATTRIB( R8G8B8A8_UNORM, 4, ubyte, FROM_8_UNORM, TO_8_UNORM )*/
|
||||||
|
|
||||||
ATTRIB( R32G32B32A32_FIXED, 4, int, FROM_32_FIXED, TO_32_FIXED )
|
ATTRIB( R32G32B32A32_FIXED, 4, int, FROM_32_FIXED, TO_32_FIXED )
|
||||||
ATTRIB( R32G32B32_FIXED, 3, int, FROM_32_FIXED, TO_32_FIXED )
|
ATTRIB( R32G32B32_FIXED, 3, int, FROM_32_FIXED, TO_32_FIXED )
|
||||||
|
|
|
@ -182,47 +182,7 @@ get_next_slot( struct blit_state *ctx )
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Setup vertex data for the textured quad we'll draw.
|
|
||||||
* Note: y=0=top
|
|
||||||
*/
|
|
||||||
static unsigned
|
|
||||||
setup_vertex_data(struct blit_state *ctx,
|
|
||||||
float x0, float y0, float x1, float y1, float z)
|
|
||||||
{
|
|
||||||
unsigned offset;
|
|
||||||
|
|
||||||
ctx->vertices[0][0][0] = x0;
|
|
||||||
ctx->vertices[0][0][1] = y0;
|
|
||||||
ctx->vertices[0][0][2] = z;
|
|
||||||
ctx->vertices[0][1][0] = 0.0f; /*s*/
|
|
||||||
ctx->vertices[0][1][1] = 0.0f; /*t*/
|
|
||||||
|
|
||||||
ctx->vertices[1][0][0] = x1;
|
|
||||||
ctx->vertices[1][0][1] = y0;
|
|
||||||
ctx->vertices[1][0][2] = z;
|
|
||||||
ctx->vertices[1][1][0] = 1.0f; /*s*/
|
|
||||||
ctx->vertices[1][1][1] = 0.0f; /*t*/
|
|
||||||
|
|
||||||
ctx->vertices[2][0][0] = x1;
|
|
||||||
ctx->vertices[2][0][1] = y1;
|
|
||||||
ctx->vertices[2][0][2] = z;
|
|
||||||
ctx->vertices[2][1][0] = 1.0f;
|
|
||||||
ctx->vertices[2][1][1] = 1.0f;
|
|
||||||
|
|
||||||
ctx->vertices[3][0][0] = x0;
|
|
||||||
ctx->vertices[3][0][1] = y1;
|
|
||||||
ctx->vertices[3][0][2] = z;
|
|
||||||
ctx->vertices[3][1][0] = 0.0f;
|
|
||||||
ctx->vertices[3][1][1] = 1.0f;
|
|
||||||
|
|
||||||
offset = get_next_slot( ctx );
|
|
||||||
|
|
||||||
pipe_buffer_write(ctx->pipe->screen, ctx->vbuf,
|
|
||||||
offset, sizeof(ctx->vertices), ctx->vertices);
|
|
||||||
|
|
||||||
return offset;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -315,15 +275,13 @@ util_blit_pixels_writemask(struct blit_state *ctx,
|
||||||
{
|
{
|
||||||
struct pipe_context *pipe = ctx->pipe;
|
struct pipe_context *pipe = ctx->pipe;
|
||||||
struct pipe_screen *screen = pipe->screen;
|
struct pipe_screen *screen = pipe->screen;
|
||||||
struct pipe_texture texTemp, *tex;
|
struct pipe_texture *tex = NULL;
|
||||||
struct pipe_surface *texSurf;
|
|
||||||
struct pipe_framebuffer_state fb;
|
struct pipe_framebuffer_state fb;
|
||||||
const int srcW = abs(srcX1 - srcX0);
|
const int srcW = abs(srcX1 - srcX0);
|
||||||
const int srcH = abs(srcY1 - srcY0);
|
const int srcH = abs(srcY1 - srcY0);
|
||||||
const int srcLeft = MIN2(srcX0, srcX1);
|
|
||||||
const int srcTop = MIN2(srcY0, srcY1);
|
|
||||||
unsigned offset;
|
unsigned offset;
|
||||||
boolean overlap;
|
boolean overlap;
|
||||||
|
float s0, t0, s1, t1;
|
||||||
|
|
||||||
assert(filter == PIPE_TEX_MIPFILTER_NEAREST ||
|
assert(filter == PIPE_TEX_MIPFILTER_NEAREST ||
|
||||||
filter == PIPE_TEX_MIPFILTER_LINEAR);
|
filter == PIPE_TEX_MIPFILTER_LINEAR);
|
||||||
|
@ -358,54 +316,76 @@ util_blit_pixels_writemask(struct blit_state *ctx,
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (srcLeft != srcX0) {
|
|
||||||
/* left-right flip */
|
|
||||||
int tmp = dstX0;
|
|
||||||
dstX0 = dstX1;
|
|
||||||
dstX1 = tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (srcTop != srcY0) {
|
|
||||||
/* up-down flip */
|
|
||||||
int tmp = dstY0;
|
|
||||||
dstY0 = dstY1;
|
|
||||||
dstY1 = tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE_2D,
|
assert(screen->is_format_supported(screen, dst->format, PIPE_TEXTURE_2D,
|
||||||
PIPE_TEXTURE_USAGE_RENDER_TARGET, 0));
|
PIPE_TEXTURE_USAGE_RENDER_TARGET, 0));
|
||||||
|
|
||||||
/*
|
/* Create a temporary texture when src and dest alias or when src
|
||||||
* XXX for now we're always creating a temporary texture.
|
* is anything other than a single-level 2d texture.
|
||||||
* Strictly speaking that's not always needed.
|
*
|
||||||
|
* This can still be improved upon.
|
||||||
*/
|
*/
|
||||||
|
if (util_same_surface(src, dst) ||
|
||||||
|
src->texture->target != PIPE_TEXTURE_2D ||
|
||||||
|
src->texture->last_level != 0)
|
||||||
|
{
|
||||||
|
struct pipe_texture texTemp;
|
||||||
|
struct pipe_surface *texSurf;
|
||||||
|
const int srcLeft = MIN2(srcX0, srcX1);
|
||||||
|
const int srcTop = MIN2(srcY0, srcY1);
|
||||||
|
|
||||||
/* create temp texture */
|
if (srcLeft != srcX0) {
|
||||||
memset(&texTemp, 0, sizeof(texTemp));
|
/* left-right flip */
|
||||||
texTemp.target = PIPE_TEXTURE_2D;
|
int tmp = dstX0;
|
||||||
texTemp.format = src->format;
|
dstX0 = dstX1;
|
||||||
texTemp.last_level = 0;
|
dstX1 = tmp;
|
||||||
texTemp.width[0] = srcW;
|
}
|
||||||
texTemp.height[0] = srcH;
|
|
||||||
texTemp.depth[0] = 1;
|
|
||||||
pf_get_block(src->format, &texTemp.block);
|
|
||||||
|
|
||||||
tex = screen->texture_create(screen, &texTemp);
|
if (srcTop != srcY0) {
|
||||||
if (!tex)
|
/* up-down flip */
|
||||||
return;
|
int tmp = dstY0;
|
||||||
|
dstY0 = dstY1;
|
||||||
|
dstY1 = tmp;
|
||||||
|
}
|
||||||
|
|
||||||
texSurf = screen->get_tex_surface(screen, tex, 0, 0, 0,
|
/* create temp texture */
|
||||||
PIPE_BUFFER_USAGE_GPU_WRITE);
|
memset(&texTemp, 0, sizeof(texTemp));
|
||||||
|
texTemp.target = PIPE_TEXTURE_2D;
|
||||||
|
texTemp.format = src->format;
|
||||||
|
texTemp.last_level = 0;
|
||||||
|
texTemp.width[0] = srcW;
|
||||||
|
texTemp.height[0] = srcH;
|
||||||
|
texTemp.depth[0] = 1;
|
||||||
|
pf_get_block(src->format, &texTemp.block);
|
||||||
|
|
||||||
/* load temp texture */
|
tex = screen->texture_create(screen, &texTemp);
|
||||||
pipe->surface_copy(pipe,
|
if (!tex)
|
||||||
texSurf, 0, 0, /* dest */
|
return;
|
||||||
src, srcLeft, srcTop, /* src */
|
|
||||||
srcW, srcH); /* size */
|
texSurf = screen->get_tex_surface(screen, tex, 0, 0, 0,
|
||||||
|
PIPE_BUFFER_USAGE_GPU_WRITE);
|
||||||
|
|
||||||
|
/* load temp texture */
|
||||||
|
pipe->surface_copy(pipe,
|
||||||
|
texSurf, 0, 0, /* dest */
|
||||||
|
src, srcLeft, srcTop, /* src */
|
||||||
|
srcW, srcH); /* size */
|
||||||
|
|
||||||
|
/* free the surface, update the texture if necessary.
|
||||||
|
*/
|
||||||
|
pipe_surface_reference(&texSurf, NULL);
|
||||||
|
s0 = 0.0f;
|
||||||
|
s1 = 1.0f;
|
||||||
|
t0 = 0.0f;
|
||||||
|
t1 = 1.0f;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
pipe_texture_reference(&tex, src->texture);
|
||||||
|
s0 = srcX0 / (float)tex->width[0];
|
||||||
|
s1 = srcX1 / (float)tex->width[0];
|
||||||
|
t0 = srcY0 / (float)tex->height[0];
|
||||||
|
t1 = srcY1 / (float)tex->height[0];
|
||||||
|
}
|
||||||
|
|
||||||
/* free the surface, update the texture if necessary.
|
|
||||||
*/
|
|
||||||
pipe_surface_reference(&texSurf, NULL);
|
|
||||||
|
|
||||||
/* save state (restored below) */
|
/* save state (restored below) */
|
||||||
cso_save_blend(ctx->cso);
|
cso_save_blend(ctx->cso);
|
||||||
|
@ -447,9 +427,12 @@ util_blit_pixels_writemask(struct blit_state *ctx,
|
||||||
cso_set_framebuffer(ctx->cso, &fb);
|
cso_set_framebuffer(ctx->cso, &fb);
|
||||||
|
|
||||||
/* draw quad */
|
/* draw quad */
|
||||||
offset = setup_vertex_data(ctx,
|
offset = setup_vertex_data_tex(ctx,
|
||||||
(float) dstX0, (float) dstY0,
|
(float) dstX0, (float) dstY0,
|
||||||
(float) dstX1, (float) dstY1, z);
|
(float) dstX1, (float) dstY1,
|
||||||
|
s0, t0,
|
||||||
|
s1, t1,
|
||||||
|
z);
|
||||||
|
|
||||||
util_draw_vertex_buffer(ctx->pipe, ctx->vbuf, offset,
|
util_draw_vertex_buffer(ctx->pipe, ctx->vbuf, offset,
|
||||||
PIPE_PRIM_TRIANGLE_FAN,
|
PIPE_PRIM_TRIANGLE_FAN,
|
||||||
|
|
|
@ -73,7 +73,7 @@
|
||||||
struct util_cpu_caps util_cpu_caps;
|
struct util_cpu_caps util_cpu_caps;
|
||||||
|
|
||||||
static int has_cpuid(void);
|
static int has_cpuid(void);
|
||||||
static int cpuid(unsigned int ax, unsigned int *p);
|
static int cpuid(uint32_t ax, uint32_t *p);
|
||||||
|
|
||||||
#if defined(PIPE_ARCH_X86)
|
#if defined(PIPE_ARCH_X86)
|
||||||
|
|
||||||
|
@ -331,27 +331,41 @@ static int has_cpuid(void)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @sa cpuid.h included in gcc-4.3 onwards.
|
||||||
|
*/
|
||||||
static INLINE int
|
static INLINE int
|
||||||
cpuid(unsigned int ax, unsigned int *p)
|
cpuid(uint32_t ax, uint32_t *p)
|
||||||
{
|
{
|
||||||
int ret = -1;
|
int ret = -1;
|
||||||
|
|
||||||
#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
|
#if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
|
||||||
#if defined(PIPE_CC_GCC)
|
__asm __volatile (
|
||||||
__asm __volatile
|
"xchgl %%ebx, %1\n\t"
|
||||||
("movl %%ebx, %%esi\n\t"
|
"cpuid\n\t"
|
||||||
"cpuid\n\t"
|
"xchgl %%ebx, %1"
|
||||||
"xchgl %%ebx, %%esi"
|
: "=a" (p[0]),
|
||||||
: "=a" (p[0]), "=S" (p[1]),
|
"=m" (p[1]),
|
||||||
"=c" (p[2]), "=d" (p[3])
|
"=c" (p[2]),
|
||||||
: "0" (ax));
|
"=d" (p[3])
|
||||||
|
: "0" (ax)
|
||||||
|
);
|
||||||
|
ret = 0;
|
||||||
|
#elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
|
||||||
|
__asm __volatile (
|
||||||
|
"cpuid\n\t"
|
||||||
|
: "=a" (p[0]),
|
||||||
|
"=b" (p[1]),
|
||||||
|
"=c" (p[2]),
|
||||||
|
"=d" (p[3])
|
||||||
|
: "0" (ax)
|
||||||
|
);
|
||||||
ret = 0;
|
ret = 0;
|
||||||
#elif defined(PIPE_CC_MSVC)
|
#elif defined(PIPE_CC_MSVC)
|
||||||
__cpuid(ax, p);
|
__cpuid(ax, p);
|
||||||
|
|
||||||
ret = 0;
|
ret = 0;
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -406,8 +420,8 @@ util_cpu_detect(void)
|
||||||
|
|
||||||
#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
|
#if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
|
||||||
if (has_cpuid()) {
|
if (has_cpuid()) {
|
||||||
unsigned int regs[4];
|
uint32_t regs[4];
|
||||||
unsigned int regs2[4];
|
uint32_t regs2[4];
|
||||||
|
|
||||||
util_cpu_caps.cacheline = 32;
|
util_cpu_caps.cacheline = 32;
|
||||||
|
|
||||||
|
|
|
@ -181,11 +181,14 @@ void _debug_assert_fail(const char *expr,
|
||||||
*
|
*
|
||||||
* Do not expect that the assert call terminates -- errors must be handled
|
* Do not expect that the assert call terminates -- errors must be handled
|
||||||
* regardless of assert behavior.
|
* regardless of assert behavior.
|
||||||
|
*
|
||||||
|
* For non debug builds the assert macro will expand to a no-op, so do not
|
||||||
|
* call functions with side effects in the assert expression.
|
||||||
*/
|
*/
|
||||||
#ifdef DEBUG
|
#ifdef DEBUG
|
||||||
#define debug_assert(expr) ((expr) ? (void)0 : _debug_assert_fail(#expr, __FILE__, __LINE__, __FUNCTION__))
|
#define debug_assert(expr) ((expr) ? (void)0 : _debug_assert_fail(#expr, __FILE__, __LINE__, __FUNCTION__))
|
||||||
#else
|
#else
|
||||||
#define debug_assert(expr) ((void)(expr))
|
#define debug_assert(expr) ((void)0)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -254,7 +254,7 @@ debug_profile_start(void)
|
||||||
{
|
{
|
||||||
WCHAR *p;
|
WCHAR *p;
|
||||||
|
|
||||||
// increment starting from the less significant digit
|
/* increment starting from the less significant digit */
|
||||||
p = &wFileName[14];
|
p = &wFileName[14];
|
||||||
while(1) {
|
while(1) {
|
||||||
if(*p == '9') {
|
if(*p == '9') {
|
||||||
|
|
|
@ -214,7 +214,7 @@ debug_symbol_print_imagehlp(const void *addr)
|
||||||
HANDLE hProcess;
|
HANDLE hProcess;
|
||||||
BYTE symbolBuffer[1024];
|
BYTE symbolBuffer[1024];
|
||||||
PIMAGEHLP_SYMBOL pSymbol = (PIMAGEHLP_SYMBOL) symbolBuffer;
|
PIMAGEHLP_SYMBOL pSymbol = (PIMAGEHLP_SYMBOL) symbolBuffer;
|
||||||
DWORD dwDisplacement = 0; // Displacement of the input address, relative to the start of the symbol
|
DWORD dwDisplacement = 0; /* Displacement of the input address, relative to the start of the symbol */
|
||||||
|
|
||||||
hProcess = GetCurrentProcess();
|
hProcess = GetCurrentProcess();
|
||||||
|
|
||||||
|
|
|
@ -1427,6 +1427,7 @@ set_vertex_data(struct gen_mipmap_state *ctx,
|
||||||
rz = -1.0f;
|
rz = -1.0f;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
rx = ry = rz = 0.0f;
|
||||||
assert(0);
|
assert(0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -108,7 +108,15 @@ util_make_fragment_tex_shader_writemask(struct pipe_context *pipe,
|
||||||
TGSI_SEMANTIC_COLOR,
|
TGSI_SEMANTIC_COLOR,
|
||||||
0 );
|
0 );
|
||||||
|
|
||||||
ureg_TEX( ureg, out, TGSI_TEXTURE_2D, tex, sampler );
|
if (writemask != TGSI_WRITEMASK_XYZW) {
|
||||||
|
struct ureg_src imm = ureg_imm4f( ureg, 0, 0, 0, 1 );
|
||||||
|
|
||||||
|
ureg_MOV( ureg, out, imm );
|
||||||
|
}
|
||||||
|
|
||||||
|
ureg_TEX( ureg,
|
||||||
|
ureg_writemask(out, writemask),
|
||||||
|
TGSI_TEXTURE_2D, tex, sampler );
|
||||||
ureg_END( ureg );
|
ureg_END( ureg );
|
||||||
|
|
||||||
return ureg_create_shader_and_destroy( ureg, pipe );
|
return ureg_create_shader_and_destroy( ureg, pipe );
|
||||||
|
|
|
@ -1,7 +1,7 @@
|
||||||
TOP = ../../../..
|
TOP = ../../../..
|
||||||
include $(TOP)/configs/current
|
include $(TOP)/configs/current
|
||||||
|
|
||||||
LIBNAME = i915simple
|
LIBNAME = i915
|
||||||
|
|
||||||
C_SOURCES = \
|
C_SOURCES = \
|
||||||
i915_blit.c \
|
i915_blit.c \
|
|
@ -2,8 +2,8 @@ Import('*')
|
||||||
|
|
||||||
env = env.Clone()
|
env = env.Clone()
|
||||||
|
|
||||||
i915simple = env.ConvenienceLibrary(
|
i915 = env.ConvenienceLibrary(
|
||||||
target = 'i915simple',
|
target = 'i915',
|
||||||
source = [
|
source = [
|
||||||
'i915_blit.c',
|
'i915_blit.c',
|
||||||
'i915_buffer.c',
|
'i915_buffer.c',
|
||||||
|
@ -27,4 +27,4 @@ i915simple = env.ConvenienceLibrary(
|
||||||
'i915_texture.c',
|
'i915_texture.c',
|
||||||
])
|
])
|
||||||
|
|
||||||
Export('i915simple')
|
Export('i915')
|
|
@ -52,6 +52,9 @@
|
||||||
#include "i915_state.h"
|
#include "i915_state.h"
|
||||||
|
|
||||||
|
|
||||||
|
#undef VBUF_USE_FIFO
|
||||||
|
#undef VBUF_MAP_BUFFER
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* Primitive renderer for i915.
|
* Primitive renderer for i915.
|
||||||
*/
|
*/
|
||||||
|
@ -74,16 +77,25 @@ struct i915_vbuf_render {
|
||||||
|
|
||||||
/* Stuff for the vbo */
|
/* Stuff for the vbo */
|
||||||
struct intel_buffer *vbo;
|
struct intel_buffer *vbo;
|
||||||
size_t vbo_size;
|
size_t vbo_size; /**< current size of allocated buffer */
|
||||||
|
size_t vbo_alloc_size; /**< minimum buffer size to allocate */
|
||||||
size_t vbo_offset;
|
size_t vbo_offset;
|
||||||
void *vbo_ptr;
|
void *vbo_ptr;
|
||||||
size_t vbo_max_used;
|
size_t vbo_max_used;
|
||||||
|
|
||||||
/* stuff for the pool */
|
#ifndef VBUF_MAP_BUFFER
|
||||||
|
size_t map_used_start;
|
||||||
|
size_t map_used_end;
|
||||||
|
size_t map_size;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef VBUF_USE_FIFO
|
||||||
|
/* Stuff for the pool */
|
||||||
struct util_fifo *pool_fifo;
|
struct util_fifo *pool_fifo;
|
||||||
unsigned pool_used;
|
unsigned pool_used;
|
||||||
unsigned pool_buffer_size;
|
unsigned pool_buffer_size;
|
||||||
boolean pool_not_used;
|
boolean pool_not_used;
|
||||||
|
#endif
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
|
@ -132,18 +144,31 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size)
|
||||||
struct intel_winsys *iws = i915->iws;
|
struct intel_winsys *iws = i915->iws;
|
||||||
|
|
||||||
if (i915_render->vbo) {
|
if (i915_render->vbo) {
|
||||||
|
#ifdef VBUF_USE_FIFO
|
||||||
if (i915_render->pool_not_used)
|
if (i915_render->pool_not_used)
|
||||||
iws->buffer_destroy(iws, i915_render->vbo);
|
iws->buffer_destroy(iws, i915_render->vbo);
|
||||||
else
|
else
|
||||||
u_fifo_add(i915_render->pool_fifo, i915_render->vbo);
|
u_fifo_add(i915_render->pool_fifo, i915_render->vbo);
|
||||||
i915_render->vbo = NULL;
|
i915_render->vbo = NULL;
|
||||||
|
#else
|
||||||
|
iws->buffer_destroy(iws, i915_render->vbo);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
i915->vbo_flushed = 0;
|
i915->vbo_flushed = 0;
|
||||||
|
|
||||||
i915_render->vbo_size = MAX2(size, i915_render->pool_buffer_size);
|
i915_render->vbo_size = MAX2(size, i915_render->vbo_alloc_size);
|
||||||
i915_render->vbo_offset = 0;
|
i915_render->vbo_offset = 0;
|
||||||
|
|
||||||
|
#ifndef VBUF_MAP_BUFFER
|
||||||
|
if (i915_render->vbo_size > i915_render->map_size) {
|
||||||
|
i915_render->map_size = i915_render->vbo_size;
|
||||||
|
FREE(i915_render->vbo_ptr);
|
||||||
|
i915_render->vbo_ptr = MALLOC(i915_render->map_size);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef VBUF_USE_FIFO
|
||||||
if (i915_render->vbo_size != i915_render->pool_buffer_size) {
|
if (i915_render->vbo_size != i915_render->pool_buffer_size) {
|
||||||
i915_render->pool_not_used = TRUE;
|
i915_render->pool_not_used = TRUE;
|
||||||
i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size, 64,
|
i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size, 64,
|
||||||
|
@ -158,6 +183,10 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size)
|
||||||
}
|
}
|
||||||
u_fifo_pop(i915_render->pool_fifo, (void**)&i915_render->vbo);
|
u_fifo_pop(i915_render->pool_fifo, (void**)&i915_render->vbo);
|
||||||
}
|
}
|
||||||
|
#else
|
||||||
|
i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size,
|
||||||
|
64, INTEL_NEW_VERTEX);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static boolean
|
static boolean
|
||||||
|
@ -173,10 +202,11 @@ i915_vbuf_render_allocate_vertices(struct vbuf_render *render,
|
||||||
assert(!i915->vbo);
|
assert(!i915->vbo);
|
||||||
|
|
||||||
if (!i915_vbuf_render_reserve(i915_render, size)) {
|
if (!i915_vbuf_render_reserve(i915_render, size)) {
|
||||||
|
#ifdef VBUF_USE_FIFO
|
||||||
|
/* incase we flushed reset the number of pool buffers used */
|
||||||
if (i915->vbo_flushed)
|
if (i915->vbo_flushed)
|
||||||
i915_render->pool_used = 0;
|
i915_render->pool_used = 0;
|
||||||
|
#endif
|
||||||
i915_vbuf_render_new_buf(i915_render, size);
|
i915_vbuf_render_new_buf(i915_render, size);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -200,9 +230,13 @@ i915_vbuf_render_map_vertices(struct vbuf_render *render)
|
||||||
if (i915->vbo_flushed)
|
if (i915->vbo_flushed)
|
||||||
debug_printf("%s bad vbo flush occured stalling on hw\n", __FUNCTION__);
|
debug_printf("%s bad vbo flush occured stalling on hw\n", __FUNCTION__);
|
||||||
|
|
||||||
|
#ifdef VBUF_MAP_BUFFER
|
||||||
i915_render->vbo_ptr = iws->buffer_map(iws, i915_render->vbo, TRUE);
|
i915_render->vbo_ptr = iws->buffer_map(iws, i915_render->vbo, TRUE);
|
||||||
|
return (unsigned char *)i915_render->vbo_ptr + i915_render->vbo_offset;
|
||||||
return (unsigned char *)i915_render->vbo_ptr + i915->vbo_offset;
|
#else
|
||||||
|
(void)iws;
|
||||||
|
return (unsigned char *)i915_render->vbo_ptr;
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
@ -215,7 +249,17 @@ i915_vbuf_render_unmap_vertices(struct vbuf_render *render,
|
||||||
struct intel_winsys *iws = i915->iws;
|
struct intel_winsys *iws = i915->iws;
|
||||||
|
|
||||||
i915_render->vbo_max_used = MAX2(i915_render->vbo_max_used, i915_render->vertex_size * (max_index + 1));
|
i915_render->vbo_max_used = MAX2(i915_render->vbo_max_used, i915_render->vertex_size * (max_index + 1));
|
||||||
|
#ifdef VBUF_MAP_BUFFER
|
||||||
iws->buffer_unmap(iws, i915_render->vbo);
|
iws->buffer_unmap(iws, i915_render->vbo);
|
||||||
|
#else
|
||||||
|
i915_render->map_used_start = i915_render->vertex_size * min_index;
|
||||||
|
i915_render->map_used_end = i915_render->vertex_size * (max_index + 1);
|
||||||
|
iws->buffer_write(iws, i915_render->vbo,
|
||||||
|
i915_render->map_used_start + i915_render->vbo_offset,
|
||||||
|
i915_render->map_used_end - i915_render->map_used_start,
|
||||||
|
i915_render->vbo_ptr + i915_render->map_used_start);
|
||||||
|
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
static boolean
|
static boolean
|
||||||
|
@ -581,9 +625,9 @@ i915_vbuf_render_create(struct i915_context *i915)
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
i915_render->i915 = i915;
|
i915_render->i915 = i915;
|
||||||
|
|
||||||
i915_render->base.max_vertex_buffer_bytes = 128*1024;
|
i915_render->base.max_vertex_buffer_bytes = 16*4096;
|
||||||
|
|
||||||
/* NOTE: it must be such that state and vertices indices fit in a single
|
/* NOTE: it must be such that state and vertices indices fit in a single
|
||||||
* batch buffer.
|
* batch buffer.
|
||||||
*/
|
*/
|
||||||
|
@ -599,23 +643,29 @@ i915_vbuf_render_create(struct i915_context *i915)
|
||||||
i915_render->base.release_vertices = i915_vbuf_render_release_vertices;
|
i915_render->base.release_vertices = i915_vbuf_render_release_vertices;
|
||||||
i915_render->base.destroy = i915_vbuf_render_destroy;
|
i915_render->base.destroy = i915_vbuf_render_destroy;
|
||||||
|
|
||||||
|
#ifndef VBUF_MAP_BUFFER
|
||||||
|
i915_render->map_size = 0;
|
||||||
|
i915_render->map_used_start = 0;
|
||||||
|
i915_render->map_used_end = 0;
|
||||||
|
#endif
|
||||||
|
|
||||||
i915_render->vbo = NULL;
|
i915_render->vbo = NULL;
|
||||||
|
i915_render->vbo_ptr = NULL;
|
||||||
i915_render->vbo_size = 0;
|
i915_render->vbo_size = 0;
|
||||||
i915_render->vbo_offset = 0;
|
i915_render->vbo_offset = 0;
|
||||||
|
i915_render->vbo_alloc_size = i915_render->base.max_vertex_buffer_bytes * 4;
|
||||||
|
|
||||||
|
#ifdef VBUF_USE_POOL
|
||||||
i915_render->pool_used = FALSE;
|
i915_render->pool_used = FALSE;
|
||||||
i915_render->pool_buffer_size = 128 * 4096;
|
i915_render->pool_buffer_size = i915_render->vbo_alloc_size;
|
||||||
i915_render->pool_fifo = u_fifo_create(6);
|
i915_render->pool_fifo = u_fifo_create(6);
|
||||||
for (i = 0; i < 6; i++)
|
for (i = 0; i < 6; i++)
|
||||||
u_fifo_add(i915_render->pool_fifo,
|
u_fifo_add(i915_render->pool_fifo,
|
||||||
iws->buffer_create(iws, i915_render->pool_buffer_size, 64,
|
iws->buffer_create(iws, i915_render->pool_buffer_size, 64,
|
||||||
INTEL_NEW_VERTEX));
|
INTEL_NEW_VERTEX));
|
||||||
|
#else
|
||||||
#if 0
|
(void)i;
|
||||||
/* TODO JB: is this realy needed? */
|
(void)iws;
|
||||||
i915_render->vbo_ptr = iws->buffer_map(iws, i915_render->vbo, TRUE);
|
|
||||||
iws->buffer_unmap(iws, i915_render->vbo);
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return &i915_render->base;
|
return &i915_render->base;
|
|
@ -153,13 +153,13 @@ struct intel_winsys {
|
||||||
/**
|
/**
|
||||||
* Write to a buffer.
|
* Write to a buffer.
|
||||||
*
|
*
|
||||||
* Arguments follows pwrite(2)
|
* Arguments follows pipe_buffer_write.
|
||||||
*/
|
*/
|
||||||
int (*buffer_write)(struct intel_winsys *iws,
|
int (*buffer_write)(struct intel_winsys *iws,
|
||||||
struct intel_buffer *dst,
|
struct intel_buffer *dst,
|
||||||
const void *src,
|
size_t offset,
|
||||||
size_t size,
|
size_t size,
|
||||||
size_t offset);
|
const void *data);
|
||||||
|
|
||||||
void (*buffer_destroy)(struct intel_winsys *iws,
|
void (*buffer_destroy)(struct intel_winsys *iws,
|
||||||
struct intel_buffer *buffer);
|
struct intel_buffer *buffer);
|
|
@ -1,52 +0,0 @@
|
||||||
TOP = ../../../..
|
|
||||||
include $(TOP)/configs/current
|
|
||||||
|
|
||||||
LIBNAME = i965simple
|
|
||||||
|
|
||||||
C_SOURCES = \
|
|
||||||
brw_blit.c \
|
|
||||||
brw_flush.c \
|
|
||||||
brw_screen.c \
|
|
||||||
brw_surface.c \
|
|
||||||
brw_cc.c \
|
|
||||||
brw_clip.c \
|
|
||||||
brw_clip_line.c \
|
|
||||||
brw_clip_point.c \
|
|
||||||
brw_clip_state.c \
|
|
||||||
brw_clip_tri.c \
|
|
||||||
brw_clip_util.c \
|
|
||||||
brw_context.c \
|
|
||||||
brw_curbe.c \
|
|
||||||
brw_draw.c \
|
|
||||||
brw_draw_upload.c \
|
|
||||||
brw_eu.c \
|
|
||||||
brw_eu_debug.c \
|
|
||||||
brw_eu_emit.c \
|
|
||||||
brw_eu_util.c \
|
|
||||||
brw_gs.c \
|
|
||||||
brw_gs_emit.c \
|
|
||||||
brw_gs_state.c \
|
|
||||||
brw_misc_state.c \
|
|
||||||
brw_sf.c \
|
|
||||||
brw_sf_emit.c \
|
|
||||||
brw_sf_state.c \
|
|
||||||
brw_state.c \
|
|
||||||
brw_state_batch.c \
|
|
||||||
brw_state_cache.c \
|
|
||||||
brw_state_pool.c \
|
|
||||||
brw_state_upload.c \
|
|
||||||
brw_tex_layout.c \
|
|
||||||
brw_urb.c \
|
|
||||||
brw_util.c \
|
|
||||||
brw_vs.c \
|
|
||||||
brw_vs_emit.c \
|
|
||||||
brw_vs_state.c \
|
|
||||||
brw_wm.c \
|
|
||||||
brw_wm_iz.c \
|
|
||||||
brw_wm_decl.c \
|
|
||||||
brw_wm_glsl.c \
|
|
||||||
brw_wm_sampler_state.c \
|
|
||||||
brw_wm_state.c \
|
|
||||||
brw_wm_surface_state.c
|
|
||||||
|
|
||||||
include ../../Makefile.template
|
|
|
@ -1,54 +0,0 @@
|
||||||
Import('*')
|
|
||||||
|
|
||||||
env = env.Clone()
|
|
||||||
|
|
||||||
i965simple = env.ConvenienceLibrary(
|
|
||||||
target = 'i965simple',
|
|
||||||
source = [
|
|
||||||
'brw_blit.c',
|
|
||||||
'brw_cc.c',
|
|
||||||
'brw_clip.c',
|
|
||||||
'brw_clip_line.c',
|
|
||||||
'brw_clip_point.c',
|
|
||||||
'brw_clip_state.c',
|
|
||||||
'brw_clip_tri.c',
|
|
||||||
'brw_clip_util.c',
|
|
||||||
'brw_context.c',
|
|
||||||
'brw_curbe.c',
|
|
||||||
'brw_draw.c',
|
|
||||||
'brw_draw_upload.c',
|
|
||||||
'brw_eu.c',
|
|
||||||
'brw_eu_debug.c',
|
|
||||||
'brw_eu_emit.c',
|
|
||||||
'brw_eu_util.c',
|
|
||||||
'brw_flush.c',
|
|
||||||
'brw_gs.c',
|
|
||||||
'brw_gs_emit.c',
|
|
||||||
'brw_gs_state.c',
|
|
||||||
'brw_misc_state.c',
|
|
||||||
'brw_screen.c',
|
|
||||||
'brw_sf.c',
|
|
||||||
'brw_sf_emit.c',
|
|
||||||
'brw_sf_state.c',
|
|
||||||
'brw_state.c',
|
|
||||||
'brw_state_batch.c',
|
|
||||||
'brw_state_cache.c',
|
|
||||||
'brw_state_pool.c',
|
|
||||||
'brw_state_upload.c',
|
|
||||||
'brw_surface.c',
|
|
||||||
'brw_tex_layout.c',
|
|
||||||
'brw_urb.c',
|
|
||||||
'brw_util.c',
|
|
||||||
'brw_vs.c',
|
|
||||||
'brw_vs_emit.c',
|
|
||||||
'brw_vs_state.c',
|
|
||||||
'brw_wm.c',
|
|
||||||
'brw_wm_decl.c',
|
|
||||||
'brw_wm_glsl.c',
|
|
||||||
'brw_wm_iz.c',
|
|
||||||
'brw_wm_sampler_state.c',
|
|
||||||
'brw_wm_state.c',
|
|
||||||
'brw_wm_surface_state.c',
|
|
||||||
])
|
|
||||||
|
|
||||||
Export('i965simple')
|
|
|
@ -1,59 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
#ifndef BRW_BATCH_H
|
|
||||||
#define BRW_BATCH_H
|
|
||||||
|
|
||||||
#include "brw_winsys.h"
|
|
||||||
|
|
||||||
#define BATCH_LOCALS
|
|
||||||
|
|
||||||
#define INTEL_BATCH_NO_CLIPRECTS 0x1
|
|
||||||
#define INTEL_BATCH_CLIPRECTS 0x2
|
|
||||||
|
|
||||||
#define BEGIN_BATCH( dwords, relocs ) \
|
|
||||||
brw->winsys->batch_start(brw->winsys, dwords, relocs)
|
|
||||||
|
|
||||||
#define OUT_BATCH( dword ) \
|
|
||||||
brw->winsys->batch_dword(brw->winsys, dword)
|
|
||||||
|
|
||||||
#define OUT_RELOC( buf, flags, delta ) \
|
|
||||||
brw->winsys->batch_reloc(brw->winsys, buf, flags, delta)
|
|
||||||
|
|
||||||
#define ADVANCE_BATCH() \
|
|
||||||
brw->winsys->batch_end( brw->winsys )
|
|
||||||
|
|
||||||
/* XXX: this is bogus - need proper handling for out-of-memory in batchbuffer.
|
|
||||||
*/
|
|
||||||
#define FLUSH_BATCH(fence) do { \
|
|
||||||
brw->winsys->batch_flush(brw->winsys, fence); \
|
|
||||||
brw->hardware_dirty = ~0; \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->winsys, (s), sizeof(*(s)))
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,218 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
#include <stdio.h>
|
|
||||||
#include <errno.h>
|
|
||||||
|
|
||||||
#include "brw_batch.h"
|
|
||||||
#include "brw_blit.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_reg.h"
|
|
||||||
|
|
||||||
#include "pipe/p_context.h"
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
|
|
||||||
#define FILE_DEBUG_FLAG DEBUG_BLIT
|
|
||||||
|
|
||||||
void brw_fill_blit(struct brw_context *brw,
|
|
||||||
unsigned cpp,
|
|
||||||
short dst_pitch,
|
|
||||||
struct pipe_buffer *dst_buffer,
|
|
||||||
unsigned dst_offset,
|
|
||||||
boolean dst_tiled,
|
|
||||||
short x, short y,
|
|
||||||
short w, short h,
|
|
||||||
unsigned color)
|
|
||||||
{
|
|
||||||
unsigned BR13, CMD;
|
|
||||||
BATCH_LOCALS;
|
|
||||||
|
|
||||||
dst_pitch *= cpp;
|
|
||||||
|
|
||||||
switch(cpp) {
|
|
||||||
case 1:
|
|
||||||
case 2:
|
|
||||||
case 3:
|
|
||||||
BR13 = (0xF0 << 16) | (1<<24);
|
|
||||||
CMD = XY_COLOR_BLT_CMD;
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
BR13 = (0xF0 << 16) | (1<<24) | (1<<25);
|
|
||||||
CMD = XY_COLOR_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (dst_tiled) {
|
|
||||||
CMD |= XY_DST_TILED;
|
|
||||||
dst_pitch /= 4;
|
|
||||||
}
|
|
||||||
|
|
||||||
BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
|
|
||||||
OUT_BATCH( CMD );
|
|
||||||
OUT_BATCH( dst_pitch | BR13 );
|
|
||||||
OUT_BATCH( (y << 16) | x );
|
|
||||||
OUT_BATCH( ((y+h) << 16) | (x+w) );
|
|
||||||
OUT_RELOC( dst_buffer, BRW_BUFFER_ACCESS_WRITE, dst_offset );
|
|
||||||
OUT_BATCH( color );
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned translate_raster_op(unsigned logicop)
|
|
||||||
{
|
|
||||||
switch(logicop) {
|
|
||||||
case PIPE_LOGICOP_CLEAR: return 0x00;
|
|
||||||
case PIPE_LOGICOP_AND: return 0x88;
|
|
||||||
case PIPE_LOGICOP_AND_REVERSE: return 0x44;
|
|
||||||
case PIPE_LOGICOP_COPY: return 0xCC;
|
|
||||||
case PIPE_LOGICOP_AND_INVERTED: return 0x22;
|
|
||||||
case PIPE_LOGICOP_NOOP: return 0xAA;
|
|
||||||
case PIPE_LOGICOP_XOR: return 0x66;
|
|
||||||
case PIPE_LOGICOP_OR: return 0xEE;
|
|
||||||
case PIPE_LOGICOP_NOR: return 0x11;
|
|
||||||
case PIPE_LOGICOP_EQUIV: return 0x99;
|
|
||||||
case PIPE_LOGICOP_INVERT: return 0x55;
|
|
||||||
case PIPE_LOGICOP_OR_REVERSE: return 0xDD;
|
|
||||||
case PIPE_LOGICOP_COPY_INVERTED: return 0x33;
|
|
||||||
case PIPE_LOGICOP_OR_INVERTED: return 0xBB;
|
|
||||||
case PIPE_LOGICOP_NAND: return 0x77;
|
|
||||||
case PIPE_LOGICOP_SET: return 0xFF;
|
|
||||||
default: return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Copy BitBlt
|
|
||||||
*/
|
|
||||||
void brw_copy_blit(struct brw_context *brw,
|
|
||||||
unsigned do_flip,
|
|
||||||
unsigned cpp,
|
|
||||||
short src_pitch,
|
|
||||||
struct pipe_buffer *src_buffer,
|
|
||||||
unsigned src_offset,
|
|
||||||
boolean src_tiled,
|
|
||||||
short dst_pitch,
|
|
||||||
struct pipe_buffer *dst_buffer,
|
|
||||||
unsigned dst_offset,
|
|
||||||
boolean dst_tiled,
|
|
||||||
short src_x, short src_y,
|
|
||||||
short dst_x, short dst_y,
|
|
||||||
short w, short h,
|
|
||||||
unsigned logic_op)
|
|
||||||
{
|
|
||||||
unsigned CMD, BR13;
|
|
||||||
int dst_y2 = dst_y + h;
|
|
||||||
int dst_x2 = dst_x + w;
|
|
||||||
BATCH_LOCALS;
|
|
||||||
|
|
||||||
|
|
||||||
DBG("%s src:buf(%d)/%d %d,%d dst:buf(%d)/%d %d,%d sz:%dx%d op:%d\n",
|
|
||||||
__FUNCTION__,
|
|
||||||
src_buffer, src_pitch, src_x, src_y,
|
|
||||||
dst_buffer, dst_pitch, dst_x, dst_y,
|
|
||||||
w,h,logic_op);
|
|
||||||
|
|
||||||
assert( logic_op - PIPE_LOGICOP_CLEAR >= 0 );
|
|
||||||
assert( logic_op - PIPE_LOGICOP_CLEAR < 0x10 );
|
|
||||||
|
|
||||||
src_pitch *= cpp;
|
|
||||||
dst_pitch *= cpp;
|
|
||||||
|
|
||||||
switch(cpp) {
|
|
||||||
case 1:
|
|
||||||
case 2:
|
|
||||||
case 3:
|
|
||||||
BR13 = (translate_raster_op(logic_op) << 16) | (1<<24);
|
|
||||||
CMD = XY_SRC_COPY_BLT_CMD;
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
BR13 = (translate_raster_op(logic_op) << 16) | (1<<24) |
|
|
||||||
(1<<25);
|
|
||||||
CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (src_tiled) {
|
|
||||||
CMD |= XY_SRC_TILED;
|
|
||||||
src_pitch /= 4;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (dst_tiled) {
|
|
||||||
CMD |= XY_DST_TILED;
|
|
||||||
dst_pitch /= 4;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (dst_y2 < dst_y ||
|
|
||||||
dst_x2 < dst_x) {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
dst_pitch &= 0xffff;
|
|
||||||
src_pitch &= 0xffff;
|
|
||||||
|
|
||||||
/* Initial y values don't seem to work with negative pitches. If
|
|
||||||
* we adjust the offsets manually (below), it seems to work fine.
|
|
||||||
*
|
|
||||||
* On the other hand, if we always adjust, the hardware doesn't
|
|
||||||
* know which blit directions to use, so overlapping copypixels get
|
|
||||||
* the wrong result.
|
|
||||||
*/
|
|
||||||
if (dst_pitch > 0 && src_pitch > 0) {
|
|
||||||
BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
|
|
||||||
OUT_BATCH( CMD );
|
|
||||||
OUT_BATCH( dst_pitch | BR13 );
|
|
||||||
OUT_BATCH( (dst_y << 16) | dst_x );
|
|
||||||
OUT_BATCH( (dst_y2 << 16) | dst_x2 );
|
|
||||||
OUT_RELOC( dst_buffer, BRW_BUFFER_ACCESS_WRITE,
|
|
||||||
dst_offset );
|
|
||||||
OUT_BATCH( (src_y << 16) | src_x );
|
|
||||||
OUT_BATCH( src_pitch );
|
|
||||||
OUT_RELOC( src_buffer, BRW_BUFFER_ACCESS_READ,
|
|
||||||
src_offset );
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
|
|
||||||
OUT_BATCH( CMD );
|
|
||||||
OUT_BATCH( (dst_pitch & 0xffff) | BR13 );
|
|
||||||
OUT_BATCH( (0 << 16) | dst_x );
|
|
||||||
OUT_BATCH( (h << 16) | dst_x2 );
|
|
||||||
OUT_RELOC( dst_buffer, BRW_BUFFER_ACCESS_WRITE,
|
|
||||||
dst_offset + dst_y * dst_pitch );
|
|
||||||
OUT_BATCH( (src_pitch & 0xffff) );
|
|
||||||
OUT_RELOC( src_buffer, BRW_BUFFER_ACCESS_READ,
|
|
||||||
src_offset + src_y * src_pitch );
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,33 +0,0 @@
|
||||||
#ifndef BRW_BLIT_H
|
|
||||||
#define BRW_BLIT_H
|
|
||||||
|
|
||||||
#include "pipe/p_compiler.h"
|
|
||||||
|
|
||||||
struct pipe_buffer;
|
|
||||||
struct brw_context;
|
|
||||||
|
|
||||||
void brw_fill_blit(struct brw_context *intel,
|
|
||||||
unsigned cpp,
|
|
||||||
short dst_pitch,
|
|
||||||
struct pipe_buffer *dst_buffer,
|
|
||||||
unsigned dst_offset,
|
|
||||||
boolean dst_tiled,
|
|
||||||
short x, short y,
|
|
||||||
short w, short h,
|
|
||||||
unsigned color);
|
|
||||||
void brw_copy_blit(struct brw_context *intel,
|
|
||||||
unsigned do_flip,
|
|
||||||
unsigned cpp,
|
|
||||||
short src_pitch,
|
|
||||||
struct pipe_buffer *src_buffer,
|
|
||||||
unsigned src_offset,
|
|
||||||
boolean src_tiled,
|
|
||||||
short dst_pitch,
|
|
||||||
struct pipe_buffer *dst_buffer,
|
|
||||||
unsigned dst_offset,
|
|
||||||
boolean dst_tiled,
|
|
||||||
short src_x, short src_y,
|
|
||||||
short dst_x, short dst_y,
|
|
||||||
short w, short h,
|
|
||||||
unsigned logic_op);
|
|
||||||
#endif
|
|
|
@ -1,269 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "util/u_math.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
|
|
||||||
|
|
||||||
static int brw_translate_compare_func(int func)
|
|
||||||
{
|
|
||||||
switch(func) {
|
|
||||||
case PIPE_FUNC_NEVER:
|
|
||||||
return BRW_COMPAREFUNCTION_NEVER;
|
|
||||||
case PIPE_FUNC_LESS:
|
|
||||||
return BRW_COMPAREFUNCTION_LESS;
|
|
||||||
case PIPE_FUNC_LEQUAL:
|
|
||||||
return BRW_COMPAREFUNCTION_LEQUAL;
|
|
||||||
case PIPE_FUNC_GREATER:
|
|
||||||
return BRW_COMPAREFUNCTION_GREATER;
|
|
||||||
case PIPE_FUNC_GEQUAL:
|
|
||||||
return BRW_COMPAREFUNCTION_GEQUAL;
|
|
||||||
case PIPE_FUNC_NOTEQUAL:
|
|
||||||
return BRW_COMPAREFUNCTION_NOTEQUAL;
|
|
||||||
case PIPE_FUNC_EQUAL:
|
|
||||||
return BRW_COMPAREFUNCTION_EQUAL;
|
|
||||||
case PIPE_FUNC_ALWAYS:
|
|
||||||
return BRW_COMPAREFUNCTION_ALWAYS;
|
|
||||||
}
|
|
||||||
|
|
||||||
debug_printf("Unknown value in %s: %x\n", __FUNCTION__, func);
|
|
||||||
return BRW_COMPAREFUNCTION_ALWAYS;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int brw_translate_stencil_op(int op)
|
|
||||||
{
|
|
||||||
switch(op) {
|
|
||||||
case PIPE_STENCIL_OP_KEEP:
|
|
||||||
return BRW_STENCILOP_KEEP;
|
|
||||||
case PIPE_STENCIL_OP_ZERO:
|
|
||||||
return BRW_STENCILOP_ZERO;
|
|
||||||
case PIPE_STENCIL_OP_REPLACE:
|
|
||||||
return BRW_STENCILOP_REPLACE;
|
|
||||||
case PIPE_STENCIL_OP_INCR:
|
|
||||||
return BRW_STENCILOP_INCRSAT;
|
|
||||||
case PIPE_STENCIL_OP_DECR:
|
|
||||||
return BRW_STENCILOP_DECRSAT;
|
|
||||||
case PIPE_STENCIL_OP_INCR_WRAP:
|
|
||||||
return BRW_STENCILOP_INCR;
|
|
||||||
case PIPE_STENCIL_OP_DECR_WRAP:
|
|
||||||
return BRW_STENCILOP_DECR;
|
|
||||||
case PIPE_STENCIL_OP_INVERT:
|
|
||||||
return BRW_STENCILOP_INVERT;
|
|
||||||
default:
|
|
||||||
return BRW_STENCILOP_ZERO;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static int brw_translate_logic_op(int opcode)
|
|
||||||
{
|
|
||||||
switch(opcode) {
|
|
||||||
case PIPE_LOGICOP_CLEAR:
|
|
||||||
return BRW_LOGICOPFUNCTION_CLEAR;
|
|
||||||
case PIPE_LOGICOP_AND:
|
|
||||||
return BRW_LOGICOPFUNCTION_AND;
|
|
||||||
case PIPE_LOGICOP_AND_REVERSE:
|
|
||||||
return BRW_LOGICOPFUNCTION_AND_REVERSE;
|
|
||||||
case PIPE_LOGICOP_COPY:
|
|
||||||
return BRW_LOGICOPFUNCTION_COPY;
|
|
||||||
case PIPE_LOGICOP_COPY_INVERTED:
|
|
||||||
return BRW_LOGICOPFUNCTION_COPY_INVERTED;
|
|
||||||
case PIPE_LOGICOP_AND_INVERTED:
|
|
||||||
return BRW_LOGICOPFUNCTION_AND_INVERTED;
|
|
||||||
case PIPE_LOGICOP_NOOP:
|
|
||||||
return BRW_LOGICOPFUNCTION_NOOP;
|
|
||||||
case PIPE_LOGICOP_XOR:
|
|
||||||
return BRW_LOGICOPFUNCTION_XOR;
|
|
||||||
case PIPE_LOGICOP_OR:
|
|
||||||
return BRW_LOGICOPFUNCTION_OR;
|
|
||||||
case PIPE_LOGICOP_OR_INVERTED:
|
|
||||||
return BRW_LOGICOPFUNCTION_OR_INVERTED;
|
|
||||||
case PIPE_LOGICOP_NOR:
|
|
||||||
return BRW_LOGICOPFUNCTION_NOR;
|
|
||||||
case PIPE_LOGICOP_EQUIV:
|
|
||||||
return BRW_LOGICOPFUNCTION_EQUIV;
|
|
||||||
case PIPE_LOGICOP_INVERT:
|
|
||||||
return BRW_LOGICOPFUNCTION_INVERT;
|
|
||||||
case PIPE_LOGICOP_OR_REVERSE:
|
|
||||||
return BRW_LOGICOPFUNCTION_OR_REVERSE;
|
|
||||||
case PIPE_LOGICOP_NAND:
|
|
||||||
return BRW_LOGICOPFUNCTION_NAND;
|
|
||||||
case PIPE_LOGICOP_SET:
|
|
||||||
return BRW_LOGICOPFUNCTION_SET;
|
|
||||||
default:
|
|
||||||
return BRW_LOGICOPFUNCTION_SET;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void upload_cc_vp( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_cc_viewport ccv;
|
|
||||||
|
|
||||||
memset(&ccv, 0, sizeof(ccv));
|
|
||||||
|
|
||||||
ccv.min_depth = 0.0;
|
|
||||||
ccv.max_depth = 1.0;
|
|
||||||
|
|
||||||
brw->cc.vp_gs_offset = brw_cache_data( &brw->cache[BRW_CC_VP], &ccv );
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_cc_vp = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_cc_vp
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
static void upload_cc_unit( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_cc_unit_state cc;
|
|
||||||
|
|
||||||
memset(&cc, 0, sizeof(cc));
|
|
||||||
|
|
||||||
/* BRW_NEW_DEPTH_STENCIL */
|
|
||||||
if (brw->attribs.DepthStencil->stencil[0].enabled) {
|
|
||||||
cc.cc0.stencil_enable = brw->attribs.DepthStencil->stencil[0].enabled;
|
|
||||||
cc.cc0.stencil_func = brw_translate_compare_func(brw->attribs.DepthStencil->stencil[0].func);
|
|
||||||
cc.cc0.stencil_fail_op = brw_translate_stencil_op(brw->attribs.DepthStencil->stencil[0].fail_op);
|
|
||||||
cc.cc0.stencil_pass_depth_fail_op = brw_translate_stencil_op(
|
|
||||||
brw->attribs.DepthStencil->stencil[0].zfail_op);
|
|
||||||
cc.cc0.stencil_pass_depth_pass_op = brw_translate_stencil_op(
|
|
||||||
brw->attribs.DepthStencil->stencil[0].zpass_op);
|
|
||||||
cc.cc1.stencil_ref = brw->attribs.DepthStencil->stencil[0].ref_value;
|
|
||||||
cc.cc1.stencil_write_mask = brw->attribs.DepthStencil->stencil[0].writemask;
|
|
||||||
cc.cc1.stencil_test_mask = brw->attribs.DepthStencil->stencil[0].valuemask;
|
|
||||||
|
|
||||||
if (brw->attribs.DepthStencil->stencil[1].enabled) {
|
|
||||||
cc.cc0.bf_stencil_enable = brw->attribs.DepthStencil->stencil[1].enabled;
|
|
||||||
cc.cc0.bf_stencil_func = brw_translate_compare_func(
|
|
||||||
brw->attribs.DepthStencil->stencil[1].func);
|
|
||||||
cc.cc0.bf_stencil_fail_op = brw_translate_stencil_op(
|
|
||||||
brw->attribs.DepthStencil->stencil[1].fail_op);
|
|
||||||
cc.cc0.bf_stencil_pass_depth_fail_op = brw_translate_stencil_op(
|
|
||||||
brw->attribs.DepthStencil->stencil[1].zfail_op);
|
|
||||||
cc.cc0.bf_stencil_pass_depth_pass_op = brw_translate_stencil_op(
|
|
||||||
brw->attribs.DepthStencil->stencil[1].zpass_op);
|
|
||||||
cc.cc1.bf_stencil_ref = brw->attribs.DepthStencil->stencil[1].ref_value;
|
|
||||||
cc.cc2.bf_stencil_write_mask = brw->attribs.DepthStencil->stencil[1].writemask;
|
|
||||||
cc.cc2.bf_stencil_test_mask = brw->attribs.DepthStencil->stencil[1].valuemask;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Not really sure about this:
|
|
||||||
*/
|
|
||||||
if (brw->attribs.DepthStencil->stencil[0].writemask ||
|
|
||||||
brw->attribs.DepthStencil->stencil[1].writemask)
|
|
||||||
cc.cc0.stencil_write_enable = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* BRW_NEW_BLEND */
|
|
||||||
if (brw->attribs.Blend->logicop_enable) {
|
|
||||||
cc.cc2.logicop_enable = 1;
|
|
||||||
cc.cc5.logicop_func = brw_translate_logic_op( brw->attribs.Blend->logicop_func );
|
|
||||||
}
|
|
||||||
else if (brw->attribs.Blend->blend_enable) {
|
|
||||||
int eqRGB = brw->attribs.Blend->rgb_func;
|
|
||||||
int eqA = brw->attribs.Blend->alpha_func;
|
|
||||||
int srcRGB = brw->attribs.Blend->rgb_src_factor;
|
|
||||||
int dstRGB = brw->attribs.Blend->rgb_dst_factor;
|
|
||||||
int srcA = brw->attribs.Blend->alpha_src_factor;
|
|
||||||
int dstA = brw->attribs.Blend->alpha_dst_factor;
|
|
||||||
|
|
||||||
if (eqRGB == PIPE_BLEND_MIN || eqRGB == PIPE_BLEND_MAX) {
|
|
||||||
srcRGB = dstRGB = PIPE_BLENDFACTOR_ONE;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (eqA == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MAX) {
|
|
||||||
srcA = dstA = PIPE_BLENDFACTOR_ONE;
|
|
||||||
}
|
|
||||||
|
|
||||||
cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
|
|
||||||
cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
|
|
||||||
cc.cc6.blend_function = brw_translate_blend_equation( eqRGB );
|
|
||||||
|
|
||||||
cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
|
|
||||||
cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
|
|
||||||
cc.cc5.ia_blend_function = brw_translate_blend_equation( eqA );
|
|
||||||
|
|
||||||
cc.cc3.blend_enable = 1;
|
|
||||||
cc.cc3.ia_blend_enable = (srcA != srcRGB ||
|
|
||||||
dstA != dstRGB ||
|
|
||||||
eqA != eqRGB);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* BRW_NEW_ALPHATEST
|
|
||||||
*/
|
|
||||||
if (brw->attribs.DepthStencil->alpha.enabled) {
|
|
||||||
cc.cc3.alpha_test = 1;
|
|
||||||
cc.cc3.alpha_test_func =
|
|
||||||
brw_translate_compare_func(brw->attribs.DepthStencil->alpha.func);
|
|
||||||
|
|
||||||
cc.cc7.alpha_ref.ub[0] = float_to_ubyte(brw->attribs.DepthStencil->alpha.ref_value);
|
|
||||||
|
|
||||||
cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (brw->attribs.Blend->dither) {
|
|
||||||
cc.cc5.dither_enable = 1;
|
|
||||||
cc.cc6.y_dither_offset = 0;
|
|
||||||
cc.cc6.x_dither_offset = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (brw->attribs.DepthStencil->depth.enabled) {
|
|
||||||
cc.cc2.depth_test = brw->attribs.DepthStencil->depth.enabled;
|
|
||||||
cc.cc2.depth_test_function = brw_translate_compare_func(brw->attribs.DepthStencil->depth.func);
|
|
||||||
cc.cc2.depth_write_enable = brw->attribs.DepthStencil->depth.writemask;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* CACHE_NEW_CC_VP */
|
|
||||||
cc.cc4.cc_viewport_state_offset = brw->cc.vp_gs_offset >> 5;
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_STATS)
|
|
||||||
cc.cc5.statistics_enable = 1;
|
|
||||||
|
|
||||||
brw->cc.state_gs_offset = brw_cache_data( &brw->cache[BRW_CC_UNIT], &cc );
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_cc_unit = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_DEPTH_STENCIL | BRW_NEW_BLEND | BRW_NEW_ALPHA_TEST,
|
|
||||||
.cache = CACHE_NEW_CC_VP
|
|
||||||
},
|
|
||||||
.update = upload_cc_unit
|
|
||||||
};
|
|
||||||
|
|
|
@ -1,206 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
#define FRONT_UNFILLED_BIT 0x1
|
|
||||||
#define BACK_UNFILLED_BIT 0x2
|
|
||||||
|
|
||||||
|
|
||||||
static void compile_clip_prog( struct brw_context *brw,
|
|
||||||
struct brw_clip_prog_key *key )
|
|
||||||
{
|
|
||||||
struct brw_clip_compile c;
|
|
||||||
const unsigned *program;
|
|
||||||
unsigned program_size;
|
|
||||||
unsigned delta;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
memset(&c, 0, sizeof(c));
|
|
||||||
|
|
||||||
/* Begin the compilation:
|
|
||||||
*/
|
|
||||||
brw_init_compile(&c.func);
|
|
||||||
|
|
||||||
c.func.single_program_flow = 1;
|
|
||||||
|
|
||||||
c.key = *key;
|
|
||||||
|
|
||||||
|
|
||||||
/* Need to locate the two positions present in vertex + header.
|
|
||||||
* These are currently hardcoded:
|
|
||||||
*/
|
|
||||||
c.header_position_offset = ATTR_SIZE;
|
|
||||||
|
|
||||||
for (i = 0, delta = REG_SIZE; i < PIPE_MAX_SHADER_OUTPUTS; i++)
|
|
||||||
if (c.key.attrs & (1<<i)) {
|
|
||||||
c.offset[i] = delta;
|
|
||||||
delta += ATTR_SIZE;
|
|
||||||
}
|
|
||||||
|
|
||||||
c.nr_attrs = brw_count_bits(c.key.attrs);
|
|
||||||
c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */
|
|
||||||
c.nr_bytes = c.nr_regs * REG_SIZE;
|
|
||||||
|
|
||||||
c.prog_data.clip_mode = c.key.clip_mode; /* XXX */
|
|
||||||
|
|
||||||
/* For some reason the thread is spawned with only 4 channels
|
|
||||||
* unmasked.
|
|
||||||
*/
|
|
||||||
brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
|
|
||||||
|
|
||||||
|
|
||||||
/* Would ideally have the option of producing a program which could
|
|
||||||
* do all three:
|
|
||||||
*/
|
|
||||||
switch (key->primitive) {
|
|
||||||
case PIPE_PRIM_TRIANGLES:
|
|
||||||
#if 0
|
|
||||||
if (key->do_unfilled)
|
|
||||||
brw_emit_unfilled_clip( &c );
|
|
||||||
else
|
|
||||||
#endif
|
|
||||||
brw_emit_tri_clip( &c );
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_LINES:
|
|
||||||
brw_emit_line_clip( &c );
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_POINTS:
|
|
||||||
brw_emit_point_clip( &c );
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* get the program
|
|
||||||
*/
|
|
||||||
program = brw_get_program(&c.func, &program_size);
|
|
||||||
|
|
||||||
/* Upload
|
|
||||||
*/
|
|
||||||
brw->clip.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_CLIP_PROG],
|
|
||||||
&c.key,
|
|
||||||
sizeof(c.key),
|
|
||||||
program,
|
|
||||||
program_size,
|
|
||||||
&c.prog_data,
|
|
||||||
&brw->clip.prog_data );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static boolean search_cache( struct brw_context *brw,
|
|
||||||
struct brw_clip_prog_key *key )
|
|
||||||
{
|
|
||||||
return brw_search_cache(&brw->cache[BRW_CLIP_PROG],
|
|
||||||
key, sizeof(*key),
|
|
||||||
&brw->clip.prog_data,
|
|
||||||
&brw->clip.prog_gs_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Calculate interpolants for triangle and line rasterization.
|
|
||||||
*/
|
|
||||||
static void upload_clip_prog(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_clip_prog_key key;
|
|
||||||
|
|
||||||
memset(&key, 0, sizeof(key));
|
|
||||||
|
|
||||||
/* Populate the key:
|
|
||||||
*/
|
|
||||||
/* BRW_NEW_REDUCED_PRIMITIVE */
|
|
||||||
key.primitive = brw->reduced_primitive;
|
|
||||||
/* CACHE_NEW_VS_PROG */
|
|
||||||
key.attrs = brw->vs.prog_data->outputs_written;
|
|
||||||
/* BRW_NEW_RASTER */
|
|
||||||
key.do_flat_shading = (brw->attribs.Raster->flatshade);
|
|
||||||
/* BRW_NEW_CLIP */
|
|
||||||
key.nr_userclip = brw->attribs.Clip.nr; /* XXX */
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
key.clip_mode = BRW_CLIPMODE_NORMAL;
|
|
||||||
|
|
||||||
if (key.primitive == PIPE_PRIM_TRIANGLES) {
|
|
||||||
if (brw->attribs.Raster->cull_mode == PIPE_WINDING_BOTH)
|
|
||||||
key.clip_mode = BRW_CLIPMODE_REJECT_ALL;
|
|
||||||
else {
|
|
||||||
if (brw->attribs.Raster->fill_cw != PIPE_POLYGON_MODE_FILL ||
|
|
||||||
brw->attribs.Raster->fill_ccw != PIPE_POLYGON_MODE_FILL)
|
|
||||||
key.do_unfilled = 1;
|
|
||||||
|
|
||||||
/* Most cases the fixed function units will handle. Cases where
|
|
||||||
* one or more polygon faces are unfilled will require help:
|
|
||||||
*/
|
|
||||||
if (key.do_unfilled) {
|
|
||||||
key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
|
|
||||||
|
|
||||||
if (brw->attribs.Raster->offset_cw ||
|
|
||||||
brw->attribs.Raster->offset_ccw) {
|
|
||||||
key.offset_units = brw->attribs.Raster->offset_units;
|
|
||||||
key.offset_factor = brw->attribs.Raster->offset_scale;
|
|
||||||
}
|
|
||||||
key.fill_ccw = brw->attribs.Raster->fill_ccw;
|
|
||||||
key.fill_cw = brw->attribs.Raster->fill_cw;
|
|
||||||
key.offset_ccw = brw->attribs.Raster->offset_ccw;
|
|
||||||
key.offset_cw = brw->attribs.Raster->offset_cw;
|
|
||||||
if (brw->attribs.Raster->light_twoside &&
|
|
||||||
key.fill_cw != CLIP_CULL)
|
|
||||||
key.copy_bfc_cw = 1;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
key.clip_mode = BRW_CLIPMODE_ACCEPT_ALL;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (!search_cache(brw, &key))
|
|
||||||
compile_clip_prog( brw, &key );
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_clip_prog = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_RASTERIZER |
|
|
||||||
BRW_NEW_CLIP |
|
|
||||||
BRW_NEW_REDUCED_PRIMITIVE),
|
|
||||||
.cache = CACHE_NEW_VS_PROG
|
|
||||||
},
|
|
||||||
.update = upload_clip_prog
|
|
||||||
};
|
|
|
@ -1,170 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef BRW_CLIP_H
|
|
||||||
#define BRW_CLIP_H
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
#define MAX_VERTS (3+6+6)
|
|
||||||
|
|
||||||
/* Note that if unfilled primitives are being emitted, we have to fix
|
|
||||||
* up polygon offset and flatshading at this point:
|
|
||||||
*/
|
|
||||||
struct brw_clip_prog_key {
|
|
||||||
unsigned attrs:32;
|
|
||||||
unsigned primitive:4;
|
|
||||||
unsigned nr_userclip:3;
|
|
||||||
unsigned do_flat_shading:1;
|
|
||||||
unsigned do_unfilled:1;
|
|
||||||
unsigned fill_cw:2; /* includes cull information */
|
|
||||||
unsigned fill_ccw:2; /* includes cull information */
|
|
||||||
unsigned offset_cw:1;
|
|
||||||
unsigned offset_ccw:1;
|
|
||||||
unsigned pad0:17;
|
|
||||||
|
|
||||||
unsigned copy_bfc_cw:1;
|
|
||||||
unsigned copy_bfc_ccw:1;
|
|
||||||
unsigned clip_mode:3;
|
|
||||||
unsigned pad1:27;
|
|
||||||
|
|
||||||
float offset_factor;
|
|
||||||
float offset_units;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#define CLIP_LINE 0
|
|
||||||
#define CLIP_POINT 1
|
|
||||||
#define CLIP_FILL 2
|
|
||||||
#define CLIP_CULL 3
|
|
||||||
|
|
||||||
|
|
||||||
#define PRIM_MASK (0x1f)
|
|
||||||
|
|
||||||
struct brw_clip_compile {
|
|
||||||
struct brw_compile func;
|
|
||||||
struct brw_clip_prog_key key;
|
|
||||||
struct brw_clip_prog_data prog_data;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_reg R0;
|
|
||||||
struct brw_reg vertex[MAX_VERTS];
|
|
||||||
|
|
||||||
struct brw_reg t;
|
|
||||||
struct brw_reg t0, t1;
|
|
||||||
struct brw_reg dp0, dp1;
|
|
||||||
|
|
||||||
struct brw_reg dpPrev;
|
|
||||||
struct brw_reg dp;
|
|
||||||
struct brw_reg loopcount;
|
|
||||||
struct brw_reg nr_verts;
|
|
||||||
struct brw_reg planemask;
|
|
||||||
|
|
||||||
struct brw_reg inlist;
|
|
||||||
struct brw_reg outlist;
|
|
||||||
struct brw_reg freelist;
|
|
||||||
|
|
||||||
struct brw_reg dir;
|
|
||||||
struct brw_reg tmp0, tmp1;
|
|
||||||
struct brw_reg offset;
|
|
||||||
|
|
||||||
struct brw_reg fixed_planes;
|
|
||||||
struct brw_reg plane_equation;
|
|
||||||
} reg;
|
|
||||||
|
|
||||||
/* 3 different ways of expressing vertex size:
|
|
||||||
*/
|
|
||||||
unsigned nr_attrs;
|
|
||||||
unsigned nr_regs;
|
|
||||||
unsigned nr_bytes;
|
|
||||||
|
|
||||||
unsigned first_tmp;
|
|
||||||
unsigned last_tmp;
|
|
||||||
|
|
||||||
boolean need_direction;
|
|
||||||
|
|
||||||
unsigned last_mrf;
|
|
||||||
|
|
||||||
unsigned header_position_offset;
|
|
||||||
unsigned offset[PIPE_MAX_ATTRIBS];
|
|
||||||
};
|
|
||||||
|
|
||||||
#define ATTR_SIZE (4*4)
|
|
||||||
|
|
||||||
/* Points are only culled, so no need for a clip routine, however it
|
|
||||||
* works out easier to have a dummy one.
|
|
||||||
*/
|
|
||||||
void brw_emit_unfilled_clip( struct brw_clip_compile *c );
|
|
||||||
void brw_emit_tri_clip( struct brw_clip_compile *c );
|
|
||||||
void brw_emit_line_clip( struct brw_clip_compile *c );
|
|
||||||
void brw_emit_point_clip( struct brw_clip_compile *c );
|
|
||||||
|
|
||||||
/* brw_clip_tri.c, for use by the unfilled clip routine:
|
|
||||||
*/
|
|
||||||
void brw_clip_tri_init_vertices( struct brw_clip_compile *c );
|
|
||||||
void brw_clip_tri_flat_shade( struct brw_clip_compile *c );
|
|
||||||
void brw_clip_tri( struct brw_clip_compile *c );
|
|
||||||
void brw_clip_tri_emit_polygon( struct brw_clip_compile *c );
|
|
||||||
void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
|
|
||||||
unsigned nr_verts );
|
|
||||||
|
|
||||||
|
|
||||||
/* Utils:
|
|
||||||
*/
|
|
||||||
|
|
||||||
void brw_clip_interp_vertex( struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect dest_ptr,
|
|
||||||
struct brw_indirect v0_ptr, /* from */
|
|
||||||
struct brw_indirect v1_ptr, /* to */
|
|
||||||
struct brw_reg t0,
|
|
||||||
boolean force_edgeflag );
|
|
||||||
|
|
||||||
void brw_clip_init_planes( struct brw_clip_compile *c );
|
|
||||||
|
|
||||||
void brw_clip_emit_vue(struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect vert,
|
|
||||||
boolean allocate,
|
|
||||||
boolean eot,
|
|
||||||
unsigned header);
|
|
||||||
|
|
||||||
void brw_clip_kill_thread(struct brw_clip_compile *c);
|
|
||||||
|
|
||||||
struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c );
|
|
||||||
struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c );
|
|
||||||
|
|
||||||
void brw_clip_copy_colors( struct brw_clip_compile *c,
|
|
||||||
unsigned to, unsigned from );
|
|
||||||
|
|
||||||
void brw_clip_init_clipmask( struct brw_clip_compile *c );
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,245 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
unsigned i = 0,j;
|
|
||||||
|
|
||||||
/* Register usage is static, precompute here:
|
|
||||||
*/
|
|
||||||
c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
|
|
||||||
|
|
||||||
if (c->key.nr_userclip) {
|
|
||||||
c->reg.fixed_planes = brw_vec4_grf(i, 0);
|
|
||||||
i += (6 + c->key.nr_userclip + 1) / 2;
|
|
||||||
|
|
||||||
c->prog_data.curb_read_length = (6 + c->key.nr_userclip + 1) / 2;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
c->prog_data.curb_read_length = 0;
|
|
||||||
|
|
||||||
|
|
||||||
/* Payload vertices plus space for more generated vertices:
|
|
||||||
*/
|
|
||||||
for (j = 0; j < 4; j++) {
|
|
||||||
c->reg.vertex[j] = brw_vec4_grf(i, 0);
|
|
||||||
i += c->nr_regs;
|
|
||||||
}
|
|
||||||
|
|
||||||
c->reg.t = brw_vec1_grf(i, 0);
|
|
||||||
c->reg.t0 = brw_vec1_grf(i, 1);
|
|
||||||
c->reg.t1 = brw_vec1_grf(i, 2);
|
|
||||||
c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
|
|
||||||
c->reg.plane_equation = brw_vec4_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
c->reg.dp0 = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */
|
|
||||||
c->reg.dp1 = brw_vec1_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
if (!c->key.nr_userclip) {
|
|
||||||
c->reg.fixed_planes = brw_vec8_grf(i, 0);
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
c->first_tmp = i;
|
|
||||||
c->last_tmp = i;
|
|
||||||
|
|
||||||
c->prog_data.urb_read_length = c->nr_regs; /* ? */
|
|
||||||
c->prog_data.total_grf = i;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Line clipping, more or less following the following algorithm:
|
|
||||||
*
|
|
||||||
* for (p=0;p<MAX_PLANES;p++) {
|
|
||||||
* if (clipmask & (1 << p)) {
|
|
||||||
* float dp0 = DOTPROD( vtx0, plane[p] );
|
|
||||||
* float dp1 = DOTPROD( vtx1, plane[p] );
|
|
||||||
*
|
|
||||||
* if (IS_NEGATIVE(dp1)) {
|
|
||||||
* float t = dp1 / (dp1 - dp0);
|
|
||||||
* if (t > t1) t1 = t;
|
|
||||||
* } else {
|
|
||||||
* float t = dp0 / (dp0 - dp1);
|
|
||||||
* if (t > t0) t0 = t;
|
|
||||||
* }
|
|
||||||
*
|
|
||||||
* if (t0 + t1 >= 1.0)
|
|
||||||
* return;
|
|
||||||
* }
|
|
||||||
* }
|
|
||||||
*
|
|
||||||
* interp( ctx, newvtx0, vtx0, vtx1, t0 );
|
|
||||||
* interp( ctx, newvtx1, vtx1, vtx0, t1 );
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
static void clip_and_emit_line( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_indirect vtx0 = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect vtx1 = brw_indirect(1, 0);
|
|
||||||
struct brw_indirect newvtx0 = brw_indirect(2, 0);
|
|
||||||
struct brw_indirect newvtx1 = brw_indirect(3, 0);
|
|
||||||
struct brw_indirect plane_ptr = brw_indirect(4, 0);
|
|
||||||
struct brw_instruction *plane_loop;
|
|
||||||
struct brw_instruction *plane_active;
|
|
||||||
struct brw_instruction *is_negative;
|
|
||||||
struct brw_instruction *is_neg2;
|
|
||||||
struct brw_instruction *not_culled;
|
|
||||||
struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
|
|
||||||
|
|
||||||
brw_MOV(p, get_addr_reg(vtx0), brw_address(c->reg.vertex[0]));
|
|
||||||
brw_MOV(p, get_addr_reg(vtx1), brw_address(c->reg.vertex[1]));
|
|
||||||
brw_MOV(p, get_addr_reg(newvtx0), brw_address(c->reg.vertex[2]));
|
|
||||||
brw_MOV(p, get_addr_reg(newvtx1), brw_address(c->reg.vertex[3]));
|
|
||||||
brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
|
|
||||||
|
|
||||||
/* Note: init t0, t1 together:
|
|
||||||
*/
|
|
||||||
brw_MOV(p, vec2(c->reg.t0), brw_imm_f(0));
|
|
||||||
|
|
||||||
brw_clip_init_planes(c);
|
|
||||||
brw_clip_init_clipmask(c);
|
|
||||||
|
|
||||||
/* -ve rhw workaround */
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
|
|
||||||
brw_imm_ud(1<<20));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
plane_loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* if (planemask & 1)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_AND(p, v1_null_ud, c->reg.planemask, brw_imm_ud(1));
|
|
||||||
|
|
||||||
plane_active = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
if (c->key.nr_userclip)
|
|
||||||
brw_MOV(p, c->reg.plane_equation, deref_4f(plane_ptr, 0));
|
|
||||||
else
|
|
||||||
brw_MOV(p, c->reg.plane_equation, deref_4b(plane_ptr, 0));
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* dp = DP4(vtx->position, plane)
|
|
||||||
*/
|
|
||||||
brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
|
|
||||||
|
|
||||||
/* if (IS_NEGATIVE(dp1))
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
|
|
||||||
brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
is_negative = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_ADD(p, c->reg.t, c->reg.dp1, negate(c->reg.dp0));
|
|
||||||
brw_math_invert(p, c->reg.t, c->reg.t);
|
|
||||||
brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp1);
|
|
||||||
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
|
|
||||||
brw_MOV(p, c->reg.t1, c->reg.t);
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
}
|
|
||||||
is_negative = brw_ELSE(p, is_negative);
|
|
||||||
{
|
|
||||||
/* Coming back in. We know that both cannot be negative
|
|
||||||
* because the line would have been culled in that case.
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* If both are positive, do nothing */
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
|
|
||||||
is_neg2 = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
|
|
||||||
brw_math_invert(p, c->reg.t, c->reg.t);
|
|
||||||
brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
|
|
||||||
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
|
|
||||||
brw_MOV(p, c->reg.t0, c->reg.t);
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, is_neg2);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, is_negative);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, plane_active);
|
|
||||||
|
|
||||||
/* plane_ptr++;
|
|
||||||
*/
|
|
||||||
brw_ADD(p, get_addr_reg(plane_ptr), get_addr_reg(plane_ptr), brw_clip_plane_stride(c));
|
|
||||||
|
|
||||||
/* while (planemask>>=1) != 0
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, plane_loop);
|
|
||||||
|
|
||||||
brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
|
|
||||||
not_culled = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, FALSE);
|
|
||||||
brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, FALSE);
|
|
||||||
|
|
||||||
brw_clip_emit_vue(c, newvtx0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START);
|
|
||||||
brw_clip_emit_vue(c, newvtx1, 0, 1, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, not_culled);
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_line_clip( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
brw_clip_line_alloc_regs(c);
|
|
||||||
|
|
||||||
if (c->key.do_flat_shading)
|
|
||||||
brw_clip_copy_colors(c, 0, 1);
|
|
||||||
|
|
||||||
clip_and_emit_line(c);
|
|
||||||
}
|
|
|
@ -1,47 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
|
|
||||||
/* Point clipping, nothing to do?
|
|
||||||
*/
|
|
||||||
void brw_emit_point_clip( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
/* Send an empty message to kill the thread:
|
|
||||||
*/
|
|
||||||
brw_clip_tri_alloc_regs(c, 0);
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
|
@ -1,93 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "util/u_math.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
|
|
||||||
|
|
||||||
static void upload_clip_unit( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_clip_unit_state clip;
|
|
||||||
|
|
||||||
memset(&clip, 0, sizeof(clip));
|
|
||||||
|
|
||||||
/* CACHE_NEW_CLIP_PROG */
|
|
||||||
clip.thread0.grf_reg_count =
|
|
||||||
align(brw->clip.prog_data->total_grf, 16) / 16 - 1;
|
|
||||||
clip.thread0.kernel_start_pointer = brw->clip.prog_gs_offset >> 6;
|
|
||||||
clip.thread3.urb_entry_read_length = brw->clip.prog_data->urb_read_length;
|
|
||||||
clip.thread3.const_urb_entry_read_length = brw->clip.prog_data->curb_read_length;
|
|
||||||
clip.clip5.clip_mode = brw->clip.prog_data->clip_mode;
|
|
||||||
|
|
||||||
/* BRW_NEW_CURBE_OFFSETS */
|
|
||||||
clip.thread3.const_urb_entry_read_offset = brw->curbe.clip_start * 2;
|
|
||||||
|
|
||||||
/* BRW_NEW_URB_FENCE */
|
|
||||||
clip.thread4.nr_urb_entries = brw->urb.nr_clip_entries;
|
|
||||||
clip.thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
|
|
||||||
clip.thread4.max_threads = 1; /* 2 threads */
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_STATS)
|
|
||||||
clip.thread4.stats_enable = 1;
|
|
||||||
|
|
||||||
/* CONSTANT */
|
|
||||||
clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
|
|
||||||
clip.thread1.single_program_flow = 1;
|
|
||||||
clip.thread3.dispatch_grf_start_reg = 1;
|
|
||||||
clip.thread3.urb_entry_read_offset = 0;
|
|
||||||
clip.clip5.userclip_enable_flags = 0x7f;
|
|
||||||
clip.clip5.userclip_must_clip = 1;
|
|
||||||
clip.clip5.guard_band_enable = 0;
|
|
||||||
clip.clip5.viewport_z_clip_enable = 1;
|
|
||||||
clip.clip5.viewport_xy_clip_enable = 1;
|
|
||||||
clip.clip5.vertex_position_space = BRW_CLIP_NDCSPACE;
|
|
||||||
clip.clip5.api_mode = BRW_CLIP_API_OGL;
|
|
||||||
clip.clip6.clipper_viewport_state_ptr = 0;
|
|
||||||
clip.viewport_xmin = -1;
|
|
||||||
clip.viewport_xmax = 1;
|
|
||||||
clip.viewport_ymin = -1;
|
|
||||||
clip.viewport_ymax = 1;
|
|
||||||
|
|
||||||
brw->clip.state_gs_offset = brw_cache_data( &brw->cache[BRW_CLIP_UNIT], &clip );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_clip_unit = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_CURBE_OFFSETS |
|
|
||||||
BRW_NEW_URB_FENCE),
|
|
||||||
.cache = CACHE_NEW_CLIP_PROG
|
|
||||||
},
|
|
||||||
.update = upload_clip_unit
|
|
||||||
};
|
|
|
@ -1,566 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
static struct brw_reg get_tmp( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
|
|
||||||
|
|
||||||
if (++c->last_tmp > c->prog_data.total_grf)
|
|
||||||
c->prog_data.total_grf = c->last_tmp;
|
|
||||||
|
|
||||||
return tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void release_tmps( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
c->last_tmp = c->first_tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
|
|
||||||
unsigned nr_verts )
|
|
||||||
{
|
|
||||||
unsigned i = 0,j;
|
|
||||||
|
|
||||||
/* Register usage is static, precompute here:
|
|
||||||
*/
|
|
||||||
c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
|
|
||||||
|
|
||||||
if (c->key.nr_userclip) {
|
|
||||||
c->reg.fixed_planes = brw_vec4_grf(i, 0);
|
|
||||||
i += (6 + c->key.nr_userclip + 1) / 2;
|
|
||||||
|
|
||||||
c->prog_data.curb_read_length = (6 + c->key.nr_userclip + 1) / 2;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
c->prog_data.curb_read_length = 0;
|
|
||||||
|
|
||||||
|
|
||||||
/* Payload vertices plus space for more generated vertices:
|
|
||||||
*/
|
|
||||||
for (j = 0; j < nr_verts; j++) {
|
|
||||||
c->reg.vertex[j] = brw_vec4_grf(i, 0);
|
|
||||||
i += c->nr_regs;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (c->nr_attrs & 1) {
|
|
||||||
for (j = 0; j < 3; j++) {
|
|
||||||
unsigned delta = c->nr_attrs*16 + 32;
|
|
||||||
brw_MOV(&c->func, byte_offset(c->reg.vertex[j], delta), brw_imm_f(0));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
c->reg.t = brw_vec1_grf(i, 0);
|
|
||||||
c->reg.loopcount = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_UD);
|
|
||||||
c->reg.nr_verts = retype(brw_vec1_grf(i, 2), BRW_REGISTER_TYPE_UD);
|
|
||||||
c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
|
|
||||||
c->reg.plane_equation = brw_vec4_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
c->reg.dpPrev = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */
|
|
||||||
c->reg.dp = brw_vec1_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
c->reg.inlist = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, i, 0);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
c->reg.outlist = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, i, 0);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
c->reg.freelist = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, i, 0);
|
|
||||||
i++;
|
|
||||||
|
|
||||||
if (!c->key.nr_userclip) {
|
|
||||||
c->reg.fixed_planes = brw_vec8_grf(i, 0);
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (c->key.do_unfilled) {
|
|
||||||
c->reg.dir = brw_vec4_grf(i, 0);
|
|
||||||
c->reg.offset = brw_vec4_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
c->reg.tmp0 = brw_vec4_grf(i, 0);
|
|
||||||
c->reg.tmp1 = brw_vec4_grf(i, 4);
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
|
|
||||||
c->first_tmp = i;
|
|
||||||
c->last_tmp = i;
|
|
||||||
|
|
||||||
c->prog_data.urb_read_length = c->nr_regs; /* ? */
|
|
||||||
c->prog_data.total_grf = i;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_tri_init_vertices( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
|
|
||||||
struct brw_instruction *is_rev;
|
|
||||||
|
|
||||||
/* Initial list of indices for incoming vertexes:
|
|
||||||
*/
|
|
||||||
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_EQ,
|
|
||||||
tmp0,
|
|
||||||
brw_imm_ud(_3DPRIM_TRISTRIP_REVERSE));
|
|
||||||
|
|
||||||
/* XXX: Is there an easier way to do this? Need to reverse every
|
|
||||||
* second tristrip element: Can ignore sometimes?
|
|
||||||
*/
|
|
||||||
is_rev = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_MOV(p, get_element(c->reg.inlist, 0), brw_address(c->reg.vertex[1]) );
|
|
||||||
brw_MOV(p, get_element(c->reg.inlist, 1), brw_address(c->reg.vertex[0]) );
|
|
||||||
if (c->need_direction)
|
|
||||||
brw_MOV(p, c->reg.dir, brw_imm_f(-1));
|
|
||||||
}
|
|
||||||
is_rev = brw_ELSE(p, is_rev);
|
|
||||||
{
|
|
||||||
brw_MOV(p, get_element(c->reg.inlist, 0), brw_address(c->reg.vertex[0]) );
|
|
||||||
brw_MOV(p, get_element(c->reg.inlist, 1), brw_address(c->reg.vertex[1]) );
|
|
||||||
if (c->need_direction)
|
|
||||||
brw_MOV(p, c->reg.dir, brw_imm_f(1));
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, is_rev);
|
|
||||||
|
|
||||||
brw_MOV(p, get_element(c->reg.inlist, 2), brw_address(c->reg.vertex[2]) );
|
|
||||||
brw_MOV(p, brw_vec8_grf(c->reg.outlist.nr, 0), brw_imm_f(0));
|
|
||||||
brw_MOV(p, c->reg.nr_verts, brw_imm_ud(3));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_tri_flat_shade( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *is_poly;
|
|
||||||
struct brw_reg tmp0 = c->reg.loopcount; /* handy temporary */
|
|
||||||
|
|
||||||
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_EQ,
|
|
||||||
tmp0,
|
|
||||||
brw_imm_ud(_3DPRIM_POLYGON));
|
|
||||||
|
|
||||||
is_poly = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_copy_colors(c, 1, 0);
|
|
||||||
brw_clip_copy_colors(c, 2, 0);
|
|
||||||
}
|
|
||||||
is_poly = brw_ELSE(p, is_poly);
|
|
||||||
{
|
|
||||||
brw_clip_copy_colors(c, 0, 2);
|
|
||||||
brw_clip_copy_colors(c, 1, 2);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, is_poly);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Use mesa's clipping algorithms, translated to GEN4 assembly.
|
|
||||||
*/
|
|
||||||
void brw_clip_tri( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_indirect vtx = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect vtxPrev = brw_indirect(1, 0);
|
|
||||||
struct brw_indirect vtxOut = brw_indirect(2, 0);
|
|
||||||
struct brw_indirect plane_ptr = brw_indirect(3, 0);
|
|
||||||
struct brw_indirect inlist_ptr = brw_indirect(4, 0);
|
|
||||||
struct brw_indirect outlist_ptr = brw_indirect(5, 0);
|
|
||||||
struct brw_indirect freelist_ptr = brw_indirect(6, 0);
|
|
||||||
struct brw_instruction *plane_loop;
|
|
||||||
struct brw_instruction *plane_active;
|
|
||||||
struct brw_instruction *vertex_loop;
|
|
||||||
struct brw_instruction *next_test;
|
|
||||||
struct brw_instruction *prev_test;
|
|
||||||
|
|
||||||
brw_MOV(p, get_addr_reg(vtxPrev), brw_address(c->reg.vertex[2]) );
|
|
||||||
brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
|
|
||||||
brw_MOV(p, get_addr_reg(inlist_ptr), brw_address(c->reg.inlist));
|
|
||||||
brw_MOV(p, get_addr_reg(outlist_ptr), brw_address(c->reg.outlist));
|
|
||||||
|
|
||||||
brw_MOV(p, get_addr_reg(freelist_ptr), brw_address(c->reg.vertex[3]) );
|
|
||||||
|
|
||||||
plane_loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* if (planemask & 1)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_AND(p, vec1(brw_null_reg()), c->reg.planemask, brw_imm_ud(1));
|
|
||||||
|
|
||||||
plane_active = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* vtxOut = freelist_ptr++
|
|
||||||
*/
|
|
||||||
brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(freelist_ptr) );
|
|
||||||
brw_ADD(p, get_addr_reg(freelist_ptr), get_addr_reg(freelist_ptr), brw_imm_uw(c->nr_regs * REG_SIZE));
|
|
||||||
|
|
||||||
if (c->key.nr_userclip)
|
|
||||||
brw_MOV(p, c->reg.plane_equation, deref_4f(plane_ptr, 0));
|
|
||||||
else
|
|
||||||
brw_MOV(p, c->reg.plane_equation, deref_4b(plane_ptr, 0));
|
|
||||||
|
|
||||||
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
|
|
||||||
brw_MOV(p, c->reg.nr_verts, brw_imm_ud(0));
|
|
||||||
|
|
||||||
vertex_loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* vtx = *input_ptr;
|
|
||||||
*/
|
|
||||||
brw_MOV(p, get_addr_reg(vtx), deref_1uw(inlist_ptr, 0));
|
|
||||||
|
|
||||||
/* IS_NEGATIVE(prev) */
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
|
|
||||||
brw_DP4(p, vec4(c->reg.dpPrev), deref_4f(vtxPrev, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
|
|
||||||
prev_test = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* IS_POSITIVE(next)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_GE);
|
|
||||||
brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
|
|
||||||
next_test = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
|
|
||||||
/* Coming back in.
|
|
||||||
*/
|
|
||||||
brw_ADD(p, c->reg.t, c->reg.dpPrev, negate(c->reg.dp));
|
|
||||||
brw_math_invert(p, c->reg.t, c->reg.t);
|
|
||||||
brw_MUL(p, c->reg.t, c->reg.t, c->reg.dpPrev);
|
|
||||||
|
|
||||||
/* If (vtxOut == 0) vtxOut = vtxPrev
|
|
||||||
*/
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
|
|
||||||
brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtxPrev) );
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
brw_clip_interp_vertex(c, vtxOut, vtxPrev, vtx, c->reg.t, FALSE);
|
|
||||||
|
|
||||||
/* *outlist_ptr++ = vtxOut;
|
|
||||||
* nr_verts++;
|
|
||||||
* vtxOut = 0;
|
|
||||||
*/
|
|
||||||
brw_MOV(p, deref_1uw(outlist_ptr, 0), get_addr_reg(vtxOut));
|
|
||||||
brw_ADD(p, get_addr_reg(outlist_ptr), get_addr_reg(outlist_ptr), brw_imm_uw(sizeof(short)));
|
|
||||||
brw_ADD(p, c->reg.nr_verts, c->reg.nr_verts, brw_imm_ud(1));
|
|
||||||
brw_MOV(p, get_addr_reg(vtxOut), brw_imm_uw(0) );
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, next_test);
|
|
||||||
|
|
||||||
}
|
|
||||||
prev_test = brw_ELSE(p, prev_test);
|
|
||||||
{
|
|
||||||
/* *outlist_ptr++ = vtxPrev;
|
|
||||||
* nr_verts++;
|
|
||||||
*/
|
|
||||||
brw_MOV(p, deref_1uw(outlist_ptr, 0), get_addr_reg(vtxPrev));
|
|
||||||
brw_ADD(p, get_addr_reg(outlist_ptr), get_addr_reg(outlist_ptr), brw_imm_uw(sizeof(short)));
|
|
||||||
brw_ADD(p, c->reg.nr_verts, c->reg.nr_verts, brw_imm_ud(1));
|
|
||||||
|
|
||||||
/* IS_NEGATIVE(next)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_L);
|
|
||||||
brw_DP4(p, vec4(c->reg.dp), deref_4f(vtx, c->offset[VERT_RESULT_HPOS]), c->reg.plane_equation);
|
|
||||||
next_test = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
/* Going out of bounds. Avoid division by zero as we
|
|
||||||
* know dp != dpPrev from DIFFERENT_SIGNS, above.
|
|
||||||
*/
|
|
||||||
brw_ADD(p, c->reg.t, c->reg.dp, negate(c->reg.dpPrev));
|
|
||||||
brw_math_invert(p, c->reg.t, c->reg.t);
|
|
||||||
brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp);
|
|
||||||
|
|
||||||
/* If (vtxOut == 0) vtxOut = vtx
|
|
||||||
*/
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_EQ, get_addr_reg(vtxOut), brw_imm_uw(0) );
|
|
||||||
brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtx) );
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
brw_clip_interp_vertex(c, vtxOut, vtx, vtxPrev, c->reg.t, TRUE);
|
|
||||||
|
|
||||||
/* *outlist_ptr++ = vtxOut;
|
|
||||||
* nr_verts++;
|
|
||||||
* vtxOut = 0;
|
|
||||||
*/
|
|
||||||
brw_MOV(p, deref_1uw(outlist_ptr, 0), get_addr_reg(vtxOut));
|
|
||||||
brw_ADD(p, get_addr_reg(outlist_ptr), get_addr_reg(outlist_ptr), brw_imm_uw(sizeof(short)));
|
|
||||||
brw_ADD(p, c->reg.nr_verts, c->reg.nr_verts, brw_imm_ud(1));
|
|
||||||
brw_MOV(p, get_addr_reg(vtxOut), brw_imm_uw(0) );
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, next_test);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, prev_test);
|
|
||||||
|
|
||||||
/* vtxPrev = vtx;
|
|
||||||
* inlist_ptr++;
|
|
||||||
*/
|
|
||||||
brw_MOV(p, get_addr_reg(vtxPrev), get_addr_reg(vtx));
|
|
||||||
brw_ADD(p, get_addr_reg(inlist_ptr), get_addr_reg(inlist_ptr), brw_imm_uw(sizeof(short)));
|
|
||||||
|
|
||||||
/* while (--loopcount != 0)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, vertex_loop);
|
|
||||||
|
|
||||||
/* vtxPrev = *(outlist_ptr-1) OR: outlist[nr_verts-1]
|
|
||||||
* inlist = outlist
|
|
||||||
* inlist_ptr = &inlist[0]
|
|
||||||
* outlist_ptr = &outlist[0]
|
|
||||||
*/
|
|
||||||
brw_ADD(p, get_addr_reg(outlist_ptr), get_addr_reg(outlist_ptr), brw_imm_w(-2));
|
|
||||||
brw_MOV(p, get_addr_reg(vtxPrev), deref_1uw(outlist_ptr, 0));
|
|
||||||
brw_MOV(p, brw_vec8_grf(c->reg.inlist.nr, 0), brw_vec8_grf(c->reg.outlist.nr, 0));
|
|
||||||
brw_MOV(p, get_addr_reg(inlist_ptr), brw_address(c->reg.inlist));
|
|
||||||
brw_MOV(p, get_addr_reg(outlist_ptr), brw_address(c->reg.outlist));
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, plane_active);
|
|
||||||
|
|
||||||
/* plane_ptr++;
|
|
||||||
*/
|
|
||||||
brw_ADD(p, get_addr_reg(plane_ptr), get_addr_reg(plane_ptr), brw_clip_plane_stride(c));
|
|
||||||
|
|
||||||
/* nr_verts >= 3
|
|
||||||
*/
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_GE,
|
|
||||||
c->reg.nr_verts,
|
|
||||||
brw_imm_ud(3));
|
|
||||||
|
|
||||||
/* && (planemask>>=1) != 0
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, plane_loop);
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_tri_emit_polygon(struct brw_clip_compile *c)
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *loop, *if_insn;
|
|
||||||
|
|
||||||
/* for (loopcount = nr_verts-2; loopcount > 0; loopcount--)
|
|
||||||
*/
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_G);
|
|
||||||
brw_ADD(p,
|
|
||||||
c->reg.loopcount,
|
|
||||||
c->reg.nr_verts,
|
|
||||||
brw_imm_d(-2));
|
|
||||||
|
|
||||||
if_insn = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
struct brw_indirect v0 = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect vptr = brw_indirect(1, 0);
|
|
||||||
|
|
||||||
brw_MOV(p, get_addr_reg(vptr), brw_address(c->reg.inlist));
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(vptr, 0));
|
|
||||||
|
|
||||||
brw_clip_emit_vue(c, v0, 1, 0, ((_3DPRIM_TRIFAN << 2) | R02_PRIM_START));
|
|
||||||
|
|
||||||
brw_ADD(p, get_addr_reg(vptr), get_addr_reg(vptr), brw_imm_uw(2));
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(vptr, 0));
|
|
||||||
|
|
||||||
loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_TRIFAN << 2));
|
|
||||||
|
|
||||||
brw_ADD(p, get_addr_reg(vptr), get_addr_reg(vptr), brw_imm_uw(2));
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(vptr, 0));
|
|
||||||
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, loop);
|
|
||||||
|
|
||||||
brw_clip_emit_vue(c, v0, 0, 1, ((_3DPRIM_TRIFAN << 2) | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, if_insn);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void do_clip_tri( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
brw_clip_init_planes(c);
|
|
||||||
|
|
||||||
brw_clip_tri(c);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void maybe_do_clip_tri( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *do_clip;
|
|
||||||
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
|
|
||||||
do_clip = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
do_clip_tri(c);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, do_clip);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_clip_test( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
struct brw_reg t = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
|
|
||||||
struct brw_reg t1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
|
|
||||||
struct brw_reg t2 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
|
|
||||||
struct brw_reg t3 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
|
|
||||||
|
|
||||||
struct brw_reg v0 = get_tmp(c);
|
|
||||||
struct brw_reg v1 = get_tmp(c);
|
|
||||||
struct brw_reg v2 = get_tmp(c);
|
|
||||||
|
|
||||||
struct brw_indirect vt0 = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect vt1 = brw_indirect(1, 0);
|
|
||||||
struct brw_indirect vt2 = brw_indirect(2, 0);
|
|
||||||
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
|
|
||||||
brw_MOV(p, get_addr_reg(vt0), brw_address(c->reg.vertex[0]));
|
|
||||||
brw_MOV(p, get_addr_reg(vt1), brw_address(c->reg.vertex[1]));
|
|
||||||
brw_MOV(p, get_addr_reg(vt2), brw_address(c->reg.vertex[2]));
|
|
||||||
brw_MOV(p, v0, deref_4f(vt0, c->offset[VERT_RESULT_HPOS]));
|
|
||||||
brw_MOV(p, v1, deref_4f(vt1, c->offset[VERT_RESULT_HPOS]));
|
|
||||||
brw_MOV(p, v2, deref_4f(vt2, c->offset[VERT_RESULT_HPOS]));
|
|
||||||
|
|
||||||
/* test nearz, xmin, ymin plane */
|
|
||||||
brw_CMP(p, t1, BRW_CONDITIONAL_LE, negate(v0), get_element(v0, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, t2, BRW_CONDITIONAL_LE, negate(v1), get_element(v1, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, t3, BRW_CONDITIONAL_LE, negate(v2), get_element(v2, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_XOR(p, t, t1, t2);
|
|
||||||
brw_XOR(p, t1, t2, t3);
|
|
||||||
brw_OR(p, t, t, t1);
|
|
||||||
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 0), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<5)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 1), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<3)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 2), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<1)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
/* test farz, xmax, ymax plane */
|
|
||||||
brw_CMP(p, t1, BRW_CONDITIONAL_L, v0, get_element(v0, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, t2, BRW_CONDITIONAL_L, v1, get_element(v1, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, t3, BRW_CONDITIONAL_L, v2, get_element(v2, 3));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
brw_XOR(p, t, t1, t2);
|
|
||||||
brw_XOR(p, t1, t2, t3);
|
|
||||||
brw_OR(p, t, t, t1);
|
|
||||||
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 0), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<4)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 1), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<2)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_NZ,
|
|
||||||
get_element(t, 2), brw_imm_ud(0));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud((1<<0)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
release_tmps(c);
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_tri_clip( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_instruction *neg_rhw;
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
|
|
||||||
brw_clip_tri_init_vertices(c);
|
|
||||||
brw_clip_init_clipmask(c);
|
|
||||||
|
|
||||||
/* if -ve rhw workaround bit is set,
|
|
||||||
do cliptest */
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
|
|
||||||
brw_imm_ud(1<<20));
|
|
||||||
neg_rhw = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_test(c);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, neg_rhw);
|
|
||||||
|
|
||||||
/* Can't push into do_clip_tri because with polygon (or quad)
|
|
||||||
* flatshading, need to apply the flatshade here because we don't
|
|
||||||
* respect the PV when converting to trifan for emit:
|
|
||||||
*/
|
|
||||||
if (c->key.do_flat_shading)
|
|
||||||
brw_clip_tri_flat_shade(c);
|
|
||||||
|
|
||||||
if (c->key.clip_mode == BRW_CLIPMODE_NORMAL)
|
|
||||||
do_clip_tri(c);
|
|
||||||
else
|
|
||||||
maybe_do_clip_tri(c);
|
|
||||||
|
|
||||||
brw_clip_tri_emit_polygon(c);
|
|
||||||
|
|
||||||
/* Send an empty message to kill the thread:
|
|
||||||
*/
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
|
@ -1,477 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* This is performed against the original triangles, so no indirection
|
|
||||||
* required:
|
|
||||||
BZZZT!
|
|
||||||
*/
|
|
||||||
static void compute_tri_direction( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg e = c->reg.tmp0;
|
|
||||||
struct brw_reg f = c->reg.tmp1;
|
|
||||||
struct brw_reg v0 = byte_offset(c->reg.vertex[0], c->offset[VERT_RESULT_HPOS]);
|
|
||||||
struct brw_reg v1 = byte_offset(c->reg.vertex[1], c->offset[VERT_RESULT_HPOS]);
|
|
||||||
struct brw_reg v2 = byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_HPOS]);
|
|
||||||
|
|
||||||
|
|
||||||
/* Calculate the vectors of two edges of the triangle:
|
|
||||||
*/
|
|
||||||
brw_ADD(p, e, v0, negate(v2));
|
|
||||||
brw_ADD(p, f, v1, negate(v2));
|
|
||||||
|
|
||||||
/* Take their crossproduct:
|
|
||||||
*/
|
|
||||||
brw_set_access_mode(p, BRW_ALIGN_16);
|
|
||||||
brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
|
|
||||||
brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
|
|
||||||
brw_set_access_mode(p, BRW_ALIGN_1);
|
|
||||||
|
|
||||||
brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void cull_direction( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *ccw;
|
|
||||||
unsigned conditional;
|
|
||||||
|
|
||||||
assert (!(c->key.fill_ccw == CLIP_CULL &&
|
|
||||||
c->key.fill_cw == CLIP_CULL));
|
|
||||||
|
|
||||||
if (c->key.fill_ccw == CLIP_CULL)
|
|
||||||
conditional = BRW_CONDITIONAL_GE;
|
|
||||||
else
|
|
||||||
conditional = BRW_CONDITIONAL_L;
|
|
||||||
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
conditional,
|
|
||||||
get_element(c->reg.dir, 2),
|
|
||||||
brw_imm_f(0));
|
|
||||||
|
|
||||||
ccw = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, ccw);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void copy_bfc( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *ccw;
|
|
||||||
unsigned conditional;
|
|
||||||
|
|
||||||
/* Do we have any colors to copy?
|
|
||||||
*/
|
|
||||||
if (!(c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0]) &&
|
|
||||||
!(c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1]))
|
|
||||||
return;
|
|
||||||
|
|
||||||
/* In some wierd degnerate cases we can end up testing the
|
|
||||||
* direction twice, once for culling and once for bfc copying. Oh
|
|
||||||
* well, that's what you get for setting wierd GL state.
|
|
||||||
*/
|
|
||||||
if (c->key.copy_bfc_ccw)
|
|
||||||
conditional = BRW_CONDITIONAL_GE;
|
|
||||||
else
|
|
||||||
conditional = BRW_CONDITIONAL_L;
|
|
||||||
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
conditional,
|
|
||||||
get_element(c->reg.dir, 2),
|
|
||||||
brw_imm_f(0));
|
|
||||||
|
|
||||||
ccw = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
for (i = 0; i < 3; i++) {
|
|
||||||
if (c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL0]),
|
|
||||||
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC0]));
|
|
||||||
|
|
||||||
if (c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL1]),
|
|
||||||
byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC1]));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, ccw);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
float iz = 1.0 / dir.z;
|
|
||||||
float ac = dir.x * iz;
|
|
||||||
float bc = dir.y * iz;
|
|
||||||
offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
|
|
||||||
offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
|
|
||||||
offset *= MRD;
|
|
||||||
*/
|
|
||||||
static void compute_offset( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg off = c->reg.offset;
|
|
||||||
struct brw_reg dir = c->reg.dir;
|
|
||||||
|
|
||||||
brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
|
|
||||||
brw_MUL(p, vec2(off), dir, get_element(off, 2));
|
|
||||||
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_GE,
|
|
||||||
brw_abs(get_element(off, 0)),
|
|
||||||
brw_abs(get_element(off, 1)));
|
|
||||||
|
|
||||||
brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
|
|
||||||
brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void merge_edgeflags( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *is_poly;
|
|
||||||
struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
|
|
||||||
|
|
||||||
brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_EQ,
|
|
||||||
tmp0,
|
|
||||||
brw_imm_ud(_3DPRIM_POLYGON));
|
|
||||||
|
|
||||||
/* Get away with using reg.vertex because we know that this is not
|
|
||||||
* a _3DPRIM_TRISTRIP_REVERSE:
|
|
||||||
*/
|
|
||||||
is_poly = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
|
|
||||||
brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
|
|
||||||
brw_MOV(p, byte_offset(c->reg.vertex[0], c->offset[VERT_RESULT_EDGE]), brw_imm_f(0));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
|
|
||||||
brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
|
|
||||||
brw_MOV(p, byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_EDGE]), brw_imm_f(0));
|
|
||||||
brw_set_predicate_control(p, BRW_PREDICATE_NONE);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, is_poly);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void apply_one_offset( struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect vert )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg pos = deref_4f(vert, c->offset[VERT_RESULT_HPOS]);
|
|
||||||
struct brw_reg z = get_element(pos, 2);
|
|
||||||
|
|
||||||
brw_ADD(p, z, z, vec1(c->reg.offset));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Output clipped polygon as an unfilled primitive:
|
|
||||||
*/
|
|
||||||
static void emit_lines(struct brw_clip_compile *c,
|
|
||||||
boolean do_offset)
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *loop;
|
|
||||||
struct brw_instruction *draw_edge;
|
|
||||||
struct brw_indirect v0 = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect v1 = brw_indirect(1, 0);
|
|
||||||
struct brw_indirect v0ptr = brw_indirect(2, 0);
|
|
||||||
struct brw_indirect v1ptr = brw_indirect(3, 0);
|
|
||||||
|
|
||||||
/* Need a seperate loop for offset:
|
|
||||||
*/
|
|
||||||
if (do_offset) {
|
|
||||||
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
|
|
||||||
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
|
|
||||||
|
|
||||||
loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
|
|
||||||
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
|
|
||||||
|
|
||||||
apply_one_offset(c, v0);
|
|
||||||
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_G);
|
|
||||||
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, loop);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* v1ptr = &inlist[nr_verts]
|
|
||||||
* *v1ptr = v0
|
|
||||||
*/
|
|
||||||
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
|
|
||||||
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
|
|
||||||
brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v0ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
|
|
||||||
brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
|
|
||||||
brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0));
|
|
||||||
|
|
||||||
loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
|
|
||||||
brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2));
|
|
||||||
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
|
|
||||||
|
|
||||||
/* draw edge if edgeflag != 0 */
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
|
|
||||||
deref_1f(v0, c->offset[VERT_RESULT_EDGE]),
|
|
||||||
brw_imm_f(0));
|
|
||||||
draw_edge = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START);
|
|
||||||
brw_clip_emit_vue(c, v1, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, draw_edge);
|
|
||||||
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, loop);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void emit_points(struct brw_clip_compile *c,
|
|
||||||
boolean do_offset )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *loop;
|
|
||||||
struct brw_instruction *draw_point;
|
|
||||||
|
|
||||||
struct brw_indirect v0 = brw_indirect(0, 0);
|
|
||||||
struct brw_indirect v0ptr = brw_indirect(2, 0);
|
|
||||||
|
|
||||||
brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
|
|
||||||
brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
|
|
||||||
|
|
||||||
loop = brw_DO(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
|
|
||||||
brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
|
|
||||||
|
|
||||||
/* draw if edgeflag != 0
|
|
||||||
*/
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
|
|
||||||
deref_1f(v0, c->offset[VERT_RESULT_EDGE]),
|
|
||||||
brw_imm_f(0));
|
|
||||||
draw_point = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
if (do_offset)
|
|
||||||
apply_one_offset(c, v0);
|
|
||||||
|
|
||||||
brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, draw_point);
|
|
||||||
|
|
||||||
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
|
|
||||||
brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
|
|
||||||
}
|
|
||||||
brw_WHILE(p, loop);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void emit_primitives( struct brw_clip_compile *c,
|
|
||||||
unsigned mode,
|
|
||||||
boolean do_offset )
|
|
||||||
{
|
|
||||||
switch (mode) {
|
|
||||||
case CLIP_FILL:
|
|
||||||
brw_clip_tri_emit_polygon(c);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case CLIP_LINE:
|
|
||||||
emit_lines(c, do_offset);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case CLIP_POINT:
|
|
||||||
emit_points(c, do_offset);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case CLIP_CULL:
|
|
||||||
assert(0);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void emit_unfilled_primitives( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *ccw;
|
|
||||||
|
|
||||||
/* Direction culling has already been done.
|
|
||||||
*/
|
|
||||||
if (c->key.fill_ccw != c->key.fill_cw &&
|
|
||||||
c->key.fill_ccw != CLIP_CULL &&
|
|
||||||
c->key.fill_cw != CLIP_CULL)
|
|
||||||
{
|
|
||||||
brw_CMP(p,
|
|
||||||
vec1(brw_null_reg()),
|
|
||||||
BRW_CONDITIONAL_GE,
|
|
||||||
get_element(c->reg.dir, 2),
|
|
||||||
brw_imm_f(0));
|
|
||||||
|
|
||||||
ccw = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
|
|
||||||
}
|
|
||||||
ccw = brw_ELSE(p, ccw);
|
|
||||||
{
|
|
||||||
emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, ccw);
|
|
||||||
}
|
|
||||||
else if (c->key.fill_cw != CLIP_CULL) {
|
|
||||||
emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
|
|
||||||
}
|
|
||||||
else if (c->key.fill_ccw != CLIP_CULL) {
|
|
||||||
emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void check_nr_verts( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *if_insn;
|
|
||||||
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
|
|
||||||
if_insn = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, if_insn);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_unfilled_clip( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_instruction *do_clip;
|
|
||||||
|
|
||||||
|
|
||||||
c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
|
|
||||||
(c->key.fill_ccw != c->key.fill_cw) ||
|
|
||||||
c->key.fill_ccw == CLIP_CULL ||
|
|
||||||
c->key.fill_cw == CLIP_CULL ||
|
|
||||||
c->key.copy_bfc_cw ||
|
|
||||||
c->key.copy_bfc_ccw);
|
|
||||||
|
|
||||||
brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
|
|
||||||
brw_clip_tri_init_vertices(c);
|
|
||||||
|
|
||||||
assert(c->offset[VERT_RESULT_EDGE]);
|
|
||||||
|
|
||||||
if (c->key.fill_ccw == CLIP_CULL &&
|
|
||||||
c->key.fill_cw == CLIP_CULL) {
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
merge_edgeflags(c);
|
|
||||||
|
|
||||||
/* Need to use the inlist indirection here:
|
|
||||||
*/
|
|
||||||
if (c->need_direction)
|
|
||||||
compute_tri_direction(c);
|
|
||||||
|
|
||||||
if (c->key.fill_ccw == CLIP_CULL ||
|
|
||||||
c->key.fill_cw == CLIP_CULL)
|
|
||||||
cull_direction(c);
|
|
||||||
|
|
||||||
if (c->key.offset_ccw ||
|
|
||||||
c->key.offset_cw)
|
|
||||||
compute_offset(c);
|
|
||||||
|
|
||||||
if (c->key.copy_bfc_ccw ||
|
|
||||||
c->key.copy_bfc_cw)
|
|
||||||
copy_bfc(c);
|
|
||||||
|
|
||||||
/* Need to do this whether we clip or not:
|
|
||||||
*/
|
|
||||||
if (c->key.do_flat_shading)
|
|
||||||
brw_clip_tri_flat_shade(c);
|
|
||||||
|
|
||||||
brw_clip_init_clipmask(c);
|
|
||||||
brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
|
|
||||||
do_clip = brw_IF(p, BRW_EXECUTE_1);
|
|
||||||
{
|
|
||||||
brw_clip_init_planes(c);
|
|
||||||
brw_clip_tri(c);
|
|
||||||
check_nr_verts(c);
|
|
||||||
}
|
|
||||||
brw_ENDIF(p, do_clip);
|
|
||||||
|
|
||||||
emit_unfilled_primitives(c);
|
|
||||||
brw_clip_kill_thread(c);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,351 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_clip.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static struct brw_reg get_tmp( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_reg tmp = brw_vec4_grf(c->last_tmp, 0);
|
|
||||||
|
|
||||||
if (++c->last_tmp > c->prog_data.total_grf)
|
|
||||||
c->prog_data.total_grf = c->last_tmp;
|
|
||||||
|
|
||||||
return tmp;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void release_tmp( struct brw_clip_compile *c, struct brw_reg tmp )
|
|
||||||
{
|
|
||||||
if (tmp.nr == c->last_tmp-1)
|
|
||||||
c->last_tmp--;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static struct brw_reg make_plane_ud(unsigned x, unsigned y, unsigned z, unsigned w)
|
|
||||||
{
|
|
||||||
return brw_imm_ud((w<<24) | (z<<16) | (y<<8) | x);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_init_planes( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
|
|
||||||
if (!c->key.nr_userclip) {
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 0), make_plane_ud( 0, 0, 0xff, 1));
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 1), make_plane_ud( 0, 0, 1, 1));
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 2), make_plane_ud( 0, 0xff, 0, 1));
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 3), make_plane_ud( 0, 1, 0, 1));
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 4), make_plane_ud(0xff, 0, 0, 1));
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.fixed_planes, 5), make_plane_ud( 1, 0, 0, 1));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define W 3
|
|
||||||
|
|
||||||
/* Project 'pos' to screen space (or back again), overwrite with results:
|
|
||||||
*/
|
|
||||||
static void brw_clip_project_position(struct brw_clip_compile *c, struct brw_reg pos )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
|
|
||||||
/* calc rhw
|
|
||||||
*/
|
|
||||||
brw_math_invert(p, get_element(pos, W), get_element(pos, W));
|
|
||||||
|
|
||||||
/* value.xyz *= value.rhw
|
|
||||||
*/
|
|
||||||
brw_set_access_mode(p, BRW_ALIGN_16);
|
|
||||||
brw_MUL(p, brw_writemask(pos, TGSI_WRITEMASK_XYZ), pos, brw_swizzle1(pos, W));
|
|
||||||
brw_set_access_mode(p, BRW_ALIGN_1);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_clip_project_vertex( struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect vert_addr )
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg tmp = get_tmp(c);
|
|
||||||
|
|
||||||
/* Fixup position. Extract from the original vertex and re-project
|
|
||||||
* to screen space:
|
|
||||||
*/
|
|
||||||
brw_MOV(p, tmp, deref_4f(vert_addr, c->offset[VERT_RESULT_HPOS]));
|
|
||||||
brw_clip_project_position(c, tmp);
|
|
||||||
brw_MOV(p, deref_4f(vert_addr, c->header_position_offset), tmp);
|
|
||||||
|
|
||||||
release_tmp(c, tmp);
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Interpolate between two vertices and put the result into a0.0.
|
|
||||||
* Increment a0.0 accordingly.
|
|
||||||
*/
|
|
||||||
void brw_clip_interp_vertex( struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect dest_ptr,
|
|
||||||
struct brw_indirect v0_ptr, /* from */
|
|
||||||
struct brw_indirect v1_ptr, /* to */
|
|
||||||
struct brw_reg t0,
|
|
||||||
boolean force_edgeflag)
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg tmp = get_tmp(c);
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
/* Just copy the vertex header:
|
|
||||||
*/
|
|
||||||
brw_copy_indirect_to_indirect(p, dest_ptr, v0_ptr, 1);
|
|
||||||
|
|
||||||
/* Iterate over each attribute (could be done in pairs?)
|
|
||||||
*/
|
|
||||||
for (i = 0; i < c->nr_attrs; i++) {
|
|
||||||
unsigned delta = i*16 + 32;
|
|
||||||
|
|
||||||
if (delta == c->offset[VERT_RESULT_EDGE]) {
|
|
||||||
if (force_edgeflag)
|
|
||||||
brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(1));
|
|
||||||
else
|
|
||||||
brw_MOV(p, deref_4f(dest_ptr, delta), deref_4f(v0_ptr, delta));
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
/* Interpolate:
|
|
||||||
*
|
|
||||||
* New = attr0 + t*attr1 - t*attr0
|
|
||||||
*/
|
|
||||||
brw_MUL(p,
|
|
||||||
vec4(brw_null_reg()),
|
|
||||||
deref_4f(v1_ptr, delta),
|
|
||||||
t0);
|
|
||||||
|
|
||||||
brw_MAC(p,
|
|
||||||
tmp,
|
|
||||||
negate(deref_4f(v0_ptr, delta)),
|
|
||||||
t0);
|
|
||||||
|
|
||||||
brw_ADD(p,
|
|
||||||
deref_4f(dest_ptr, delta),
|
|
||||||
deref_4f(v0_ptr, delta),
|
|
||||||
tmp);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (i & 1) {
|
|
||||||
unsigned delta = i*16 + 32;
|
|
||||||
brw_MOV(p, deref_4f(dest_ptr, delta), brw_imm_f(0));
|
|
||||||
}
|
|
||||||
|
|
||||||
release_tmp(c, tmp);
|
|
||||||
|
|
||||||
/* Recreate the projected (NDC) coordinate in the new vertex
|
|
||||||
* header:
|
|
||||||
*/
|
|
||||||
brw_clip_project_vertex(c, dest_ptr );
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define MAX_MRF 16
|
|
||||||
|
|
||||||
void brw_clip_emit_vue(struct brw_clip_compile *c,
|
|
||||||
struct brw_indirect vert,
|
|
||||||
boolean allocate,
|
|
||||||
boolean eot,
|
|
||||||
unsigned header)
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
unsigned start = c->last_mrf;
|
|
||||||
|
|
||||||
assert(!(allocate && eot));
|
|
||||||
|
|
||||||
/* Cycle through mrf regs - probably futile as we have to wait for
|
|
||||||
* the allocation response anyway. Also, the order this function
|
|
||||||
* is invoked doesn't correspond to the order the instructions will
|
|
||||||
* be executed, so it won't have any effect in many cases.
|
|
||||||
*/
|
|
||||||
#if 0
|
|
||||||
if (start + c->nr_regs + 1 >= MAX_MRF)
|
|
||||||
start = 0;
|
|
||||||
|
|
||||||
c->last_mrf = start + c->nr_regs + 1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Copy the vertex from vertn into m1..mN+1:
|
|
||||||
*/
|
|
||||||
brw_copy_from_indirect(p, brw_message_reg(start+1), vert, c->nr_regs);
|
|
||||||
|
|
||||||
/* Overwrite PrimType and PrimStart in the message header, for
|
|
||||||
* each vertex in turn:
|
|
||||||
*/
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
|
|
||||||
|
|
||||||
|
|
||||||
/* Send each vertex as a seperate write to the urb. This
|
|
||||||
* is different to the concept in brw_sf_emit.c, where
|
|
||||||
* subsequent writes are used to build up a single urb
|
|
||||||
* entry. Each of these writes instantiates a seperate
|
|
||||||
* urb entry - (I think... what about 'allocate'?)
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
|
|
||||||
start,
|
|
||||||
c->reg.R0,
|
|
||||||
allocate,
|
|
||||||
1, /* used */
|
|
||||||
c->nr_regs + 1, /* msg length */
|
|
||||||
allocate ? 1 : 0, /* response_length */
|
|
||||||
eot, /* eot */
|
|
||||||
1, /* writes_complete */
|
|
||||||
0, /* urb offset */
|
|
||||||
BRW_URB_SWIZZLE_NONE);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_kill_thread(struct brw_clip_compile *c)
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
|
|
||||||
/* Send an empty message to kill the thread and release any
|
|
||||||
* allocated urb entry:
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
|
|
||||||
0,
|
|
||||||
c->reg.R0,
|
|
||||||
0, /* allocate */
|
|
||||||
0, /* used */
|
|
||||||
0, /* msg len */
|
|
||||||
0, /* response len */
|
|
||||||
1, /* eot */
|
|
||||||
1, /* writes complete */
|
|
||||||
0,
|
|
||||||
BRW_URB_SWIZZLE_NONE);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_reg brw_clip_plane0_address( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
return brw_address(c->reg.fixed_planes);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_reg brw_clip_plane_stride( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
if (c->key.nr_userclip) {
|
|
||||||
return brw_imm_uw(16);
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
return brw_imm_uw(4);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* If flatshading, distribute color from provoking vertex prior to
|
|
||||||
* clipping.
|
|
||||||
*/
|
|
||||||
void brw_clip_copy_colors( struct brw_clip_compile *c,
|
|
||||||
unsigned to, unsigned from )
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
|
|
||||||
if (c->offset[VERT_RESULT_COL0])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL0]),
|
|
||||||
byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL0]));
|
|
||||||
|
|
||||||
if (c->offset[VERT_RESULT_COL1])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_COL1]),
|
|
||||||
byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_COL1]));
|
|
||||||
|
|
||||||
if (c->offset[VERT_RESULT_BFC0])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC0]),
|
|
||||||
byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC0]));
|
|
||||||
|
|
||||||
if (c->offset[VERT_RESULT_BFC1])
|
|
||||||
brw_MOV(p,
|
|
||||||
byte_offset(c->reg.vertex[to], c->offset[VERT_RESULT_BFC1]),
|
|
||||||
byte_offset(c->reg.vertex[from], c->offset[VERT_RESULT_BFC1]));
|
|
||||||
#else
|
|
||||||
#warning "disabled"
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_clip_init_clipmask( struct brw_clip_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
|
|
||||||
|
|
||||||
/* Shift so that lowest outcode bit is rightmost:
|
|
||||||
*/
|
|
||||||
brw_SHR(p, c->reg.planemask, incoming, brw_imm_ud(26));
|
|
||||||
|
|
||||||
if (c->key.nr_userclip) {
|
|
||||||
struct brw_reg tmp = retype(vec1(get_tmp(c)), BRW_REGISTER_TYPE_UD);
|
|
||||||
|
|
||||||
/* Rearrange userclip outcodes so that they come directly after
|
|
||||||
* the fixed plane bits.
|
|
||||||
*/
|
|
||||||
brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
|
|
||||||
brw_SHR(p, tmp, tmp, brw_imm_ud(8));
|
|
||||||
brw_OR(p, c->reg.planemask, c->reg.planemask, tmp);
|
|
||||||
|
|
||||||
release_tmp(c, tmp);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
|
@ -1,139 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_draw.h"
|
|
||||||
#include "brw_vs.h"
|
|
||||||
#include "brw_tex_layout.h"
|
|
||||||
#include "brw_winsys.h"
|
|
||||||
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
#include "pipe/p_context.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
#include "pipe/p_screen.h"
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_DEBUG
|
|
||||||
int BRW_DEBUG = (0);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_destroy(struct pipe_context *pipe)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
if(brw->winsys->destroy)
|
|
||||||
brw->winsys->destroy(brw->winsys);
|
|
||||||
|
|
||||||
FREE(brw);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_clear(struct pipe_context *pipe, struct pipe_surface *ps,
|
|
||||||
unsigned clearValue)
|
|
||||||
{
|
|
||||||
int x, y, w, h;
|
|
||||||
/* FIXME: corny... */
|
|
||||||
|
|
||||||
x = 0;
|
|
||||||
y = 0;
|
|
||||||
w = ps->width;
|
|
||||||
h = ps->height;
|
|
||||||
|
|
||||||
pipe->surface_fill(pipe, ps, x, y, w, h, clearValue);
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned int
|
|
||||||
brw_is_texture_referenced( struct pipe_context *pipe,
|
|
||||||
struct pipe_texture *texture,
|
|
||||||
unsigned face, unsigned level)
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* FIXME: Optimize.
|
|
||||||
*/
|
|
||||||
|
|
||||||
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned int
|
|
||||||
brw_is_buffer_referenced( struct pipe_context *pipe,
|
|
||||||
struct pipe_buffer *buf)
|
|
||||||
{
|
|
||||||
/**
|
|
||||||
* FIXME: Optimize.
|
|
||||||
*/
|
|
||||||
|
|
||||||
return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE;
|
|
||||||
}
|
|
||||||
|
|
||||||
struct pipe_context *brw_create(struct pipe_screen *screen,
|
|
||||||
struct brw_winsys *brw_winsys,
|
|
||||||
unsigned pci_id)
|
|
||||||
{
|
|
||||||
struct brw_context *brw;
|
|
||||||
|
|
||||||
debug_printf("%s: creating brw_context with pci id 0x%x\n",
|
|
||||||
__FUNCTION__, pci_id);
|
|
||||||
|
|
||||||
brw = CALLOC_STRUCT(brw_context);
|
|
||||||
if (brw == NULL)
|
|
||||||
return NULL;
|
|
||||||
|
|
||||||
brw->winsys = brw_winsys;
|
|
||||||
brw->pipe.winsys = screen->winsys;
|
|
||||||
brw->pipe.screen = screen;
|
|
||||||
|
|
||||||
brw->pipe.destroy = brw_destroy;
|
|
||||||
brw->pipe.clear = brw_clear;
|
|
||||||
|
|
||||||
brw->pipe.is_texture_referenced = brw_is_texture_referenced;
|
|
||||||
brw->pipe.is_buffer_referenced = brw_is_buffer_referenced;
|
|
||||||
|
|
||||||
brw_init_surface_functions(brw);
|
|
||||||
brw_init_texture_functions(brw);
|
|
||||||
brw_init_state_functions(brw);
|
|
||||||
brw_init_flush_functions(brw);
|
|
||||||
brw_init_draw_functions( brw );
|
|
||||||
|
|
||||||
|
|
||||||
brw_init_state( brw );
|
|
||||||
|
|
||||||
brw->pci_id = pci_id;
|
|
||||||
brw->dirty = ~0;
|
|
||||||
brw->hardware_dirty = ~0;
|
|
||||||
|
|
||||||
memset(&brw->wm.bind, ~0, sizeof(brw->wm.bind));
|
|
||||||
|
|
||||||
return &brw->pipe;
|
|
||||||
}
|
|
||||||
|
|
|
@ -1,684 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRWCONTEXT_INC
|
|
||||||
#define BRWCONTEXT_INC
|
|
||||||
|
|
||||||
|
|
||||||
#include "pipe/p_context.h"
|
|
||||||
#include "pipe/p_defines.h"
|
|
||||||
#include "pipe/p_state.h"
|
|
||||||
|
|
||||||
#include "tgsi/tgsi_scan.h"
|
|
||||||
|
|
||||||
#include "brw_structs.h"
|
|
||||||
#include "brw_winsys.h"
|
|
||||||
|
|
||||||
|
|
||||||
/* Glossary:
|
|
||||||
*
|
|
||||||
* URB - uniform resource buffer. A mid-sized buffer which is
|
|
||||||
* partitioned between the fixed function units and used for passing
|
|
||||||
* values (vertices, primitives, constants) between them.
|
|
||||||
*
|
|
||||||
* CURBE - constant URB entry. An urb region (entry) used to hold
|
|
||||||
* constant values which the fixed function units can be instructed to
|
|
||||||
* preload into the GRF when spawining a thread.
|
|
||||||
*
|
|
||||||
* VUE - vertex URB entry. An urb entry holding a vertex and usually
|
|
||||||
* a vertex header. The header contains control information and
|
|
||||||
* things like primitive type, Begin/end flags and clip codes.
|
|
||||||
*
|
|
||||||
* PUE - primitive URB entry. An urb entry produced by the setup (SF)
|
|
||||||
* unit holding rasterization and interpolation parameters.
|
|
||||||
*
|
|
||||||
* GRF - general register file. One of several register files
|
|
||||||
* addressable by programmed threads. The inputs (r0, payload, curbe,
|
|
||||||
* urb) of the thread are preloaded to this area before the thread is
|
|
||||||
* spawned. The registers are individually 8 dwords wide and suitable
|
|
||||||
* for general usage. Registers holding thread input values are not
|
|
||||||
* special and may be overwritten.
|
|
||||||
*
|
|
||||||
* MRF - message register file. Threads communicate (and terminate)
|
|
||||||
* by sending messages. Message parameters are placed in contigous
|
|
||||||
* MRF registers. All program output is via these messages. URB
|
|
||||||
* entries are populated by sending a message to the shared URB
|
|
||||||
* function containing the new data, together with a control word,
|
|
||||||
* often an unmodified copy of R0.
|
|
||||||
*
|
|
||||||
* R0 - GRF register 0. Typically holds control information used when
|
|
||||||
* sending messages to other threads.
|
|
||||||
*
|
|
||||||
* EU or GEN4 EU: The name of the programmable subsystem of the
|
|
||||||
* i965 hardware. Threads are executed by the EU, the registers
|
|
||||||
* described above are part of the EU architecture.
|
|
||||||
*
|
|
||||||
* Fixed function units:
|
|
||||||
*
|
|
||||||
* CS - Command streamer. Notional first unit, little software
|
|
||||||
* interaction. Holds the URB entries used for constant data, ie the
|
|
||||||
* CURBEs.
|
|
||||||
*
|
|
||||||
* VF/VS - Vertex Fetch / Vertex Shader. The fixed function part of
|
|
||||||
* this unit is responsible for pulling vertices out of vertex buffers
|
|
||||||
* in vram and injecting them into the processing pipe as VUEs. If
|
|
||||||
* enabled, it first passes them to a VS thread which is a good place
|
|
||||||
* for the driver to implement any active vertex shader.
|
|
||||||
*
|
|
||||||
* GS - Geometry Shader. This corresponds to a new DX10 concept. If
|
|
||||||
* enabled, incoming strips etc are passed to GS threads in individual
|
|
||||||
* line/triangle/point units. The GS thread may perform arbitary
|
|
||||||
* computation and emit whatever primtives with whatever vertices it
|
|
||||||
* chooses. This makes GS an excellent place to implement GL's
|
|
||||||
* unfilled polygon modes, though of course it is capable of much
|
|
||||||
* more. Additionally, GS is used to translate away primitives not
|
|
||||||
* handled by latter units, including Quads and Lineloops.
|
|
||||||
*
|
|
||||||
* CS - Clipper. Mesa's clipping algorithms are imported to run on
|
|
||||||
* this unit. The fixed function part performs cliptesting against
|
|
||||||
* the 6 fixed clipplanes and makes descisions on whether or not the
|
|
||||||
* incoming primitive needs to be passed to a thread for clipping.
|
|
||||||
* User clip planes are handled via cooperation with the VS thread.
|
|
||||||
*
|
|
||||||
* SF - Strips Fans or Setup: Triangles are prepared for
|
|
||||||
* rasterization. Interpolation coefficients are calculated.
|
|
||||||
* Flatshading and two-side lighting usually performed here.
|
|
||||||
*
|
|
||||||
* WM - Windower. Interpolation of vertex attributes performed here.
|
|
||||||
* Fragment shader implemented here. SIMD aspects of EU taken full
|
|
||||||
* advantage of, as pixels are processed in blocks of 16.
|
|
||||||
*
|
|
||||||
* CC - Color Calculator. No EU threads associated with this unit.
|
|
||||||
* Handles blending and (presumably) depth and stencil testing.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define BRW_MAX_CURBE (32*16)
|
|
||||||
|
|
||||||
struct brw_context;
|
|
||||||
struct brw_winsys;
|
|
||||||
|
|
||||||
|
|
||||||
/* Raised when we receive new state across the pipe interface:
|
|
||||||
*/
|
|
||||||
#define BRW_NEW_VIEWPORT 0x1
|
|
||||||
#define BRW_NEW_RASTERIZER 0x2
|
|
||||||
#define BRW_NEW_FS 0x4
|
|
||||||
#define BRW_NEW_BLEND 0x8
|
|
||||||
#define BRW_NEW_CLIP 0x10
|
|
||||||
#define BRW_NEW_SCISSOR 0x20
|
|
||||||
#define BRW_NEW_STIPPLE 0x40
|
|
||||||
#define BRW_NEW_FRAMEBUFFER 0x80
|
|
||||||
#define BRW_NEW_ALPHA_TEST 0x100
|
|
||||||
#define BRW_NEW_DEPTH_STENCIL 0x200
|
|
||||||
#define BRW_NEW_SAMPLER 0x400
|
|
||||||
#define BRW_NEW_TEXTURE 0x800
|
|
||||||
#define BRW_NEW_CONSTANTS 0x1000
|
|
||||||
#define BRW_NEW_VBO 0x2000
|
|
||||||
#define BRW_NEW_VS 0x4000
|
|
||||||
|
|
||||||
/* Raised for other internal events:
|
|
||||||
*/
|
|
||||||
#define BRW_NEW_URB_FENCE 0x10000
|
|
||||||
#define BRW_NEW_PSP 0x20000
|
|
||||||
#define BRW_NEW_CURBE_OFFSETS 0x40000
|
|
||||||
#define BRW_NEW_REDUCED_PRIMITIVE 0x80000
|
|
||||||
#define BRW_NEW_PRIMITIVE 0x100000
|
|
||||||
#define BRW_NEW_SCENE 0x200000
|
|
||||||
#define BRW_NEW_SF_LINKAGE 0x400000
|
|
||||||
|
|
||||||
extern int BRW_DEBUG;
|
|
||||||
|
|
||||||
#define DEBUG_TEXTURE 0x1
|
|
||||||
#define DEBUG_STATE 0x2
|
|
||||||
#define DEBUG_IOCTL 0x4
|
|
||||||
#define DEBUG_PRIMS 0x8
|
|
||||||
#define DEBUG_VERTS 0x10
|
|
||||||
#define DEBUG_FALLBACKS 0x20
|
|
||||||
#define DEBUG_VERBOSE 0x40
|
|
||||||
#define DEBUG_DRI 0x80
|
|
||||||
#define DEBUG_DMA 0x100
|
|
||||||
#define DEBUG_SANITY 0x200
|
|
||||||
#define DEBUG_SYNC 0x400
|
|
||||||
#define DEBUG_SLEEP 0x800
|
|
||||||
#define DEBUG_PIXEL 0x1000
|
|
||||||
#define DEBUG_STATS 0x2000
|
|
||||||
#define DEBUG_TILE 0x4000
|
|
||||||
#define DEBUG_SINGLE_THREAD 0x8000
|
|
||||||
#define DEBUG_WM 0x10000
|
|
||||||
#define DEBUG_URB 0x20000
|
|
||||||
#define DEBUG_VS 0x40000
|
|
||||||
#define DEBUG_BATCH 0x80000
|
|
||||||
#define DEBUG_BUFMGR 0x100000
|
|
||||||
#define DEBUG_BLIT 0x200000
|
|
||||||
#define DEBUG_REGION 0x400000
|
|
||||||
#define DEBUG_MIPTREE 0x800000
|
|
||||||
|
|
||||||
#define DBG(...) do { \
|
|
||||||
if (BRW_DEBUG & FILE_DEBUG_FLAG) \
|
|
||||||
debug_printf(__VA_ARGS__); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define PRINT(...) do { \
|
|
||||||
debug_printf(__VA_ARGS__); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
struct brw_state_flags {
|
|
||||||
unsigned cache;
|
|
||||||
unsigned brw;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_vertex_program {
|
|
||||||
struct pipe_shader_state program;
|
|
||||||
struct tgsi_shader_info info;
|
|
||||||
int id;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_fragment_program {
|
|
||||||
struct pipe_shader_state program;
|
|
||||||
struct tgsi_shader_info info;
|
|
||||||
|
|
||||||
boolean UsesDepth; /* XXX add this to tgsi_shader_info? */
|
|
||||||
int id;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct pipe_setup_linkage {
|
|
||||||
struct {
|
|
||||||
unsigned vp_output:5;
|
|
||||||
unsigned interp_mode:4;
|
|
||||||
unsigned bf_vp_output:5;
|
|
||||||
} fp_input[PIPE_MAX_SHADER_INPUTS];
|
|
||||||
|
|
||||||
unsigned fp_input_count:5;
|
|
||||||
unsigned max_vp_output:5;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_texture {
|
|
||||||
struct pipe_texture base;
|
|
||||||
|
|
||||||
/* Derived from the above:
|
|
||||||
*/
|
|
||||||
unsigned stride;
|
|
||||||
unsigned depth_pitch; /* per-image on i945? */
|
|
||||||
unsigned total_nblocksy;
|
|
||||||
|
|
||||||
unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS];
|
|
||||||
|
|
||||||
/* Explicitly store the offset of each image for each cube face or
|
|
||||||
* depth value. Pretty much have to accept that hardware formats
|
|
||||||
* are going to be so diverse that there is no unified way to
|
|
||||||
* compute the offsets of depth/cube images within a mipmap level,
|
|
||||||
* so have to store them as a lookup table:
|
|
||||||
*/
|
|
||||||
unsigned *image_offset[PIPE_MAX_TEXTURE_LEVELS]; /**< array [depth] of offsets */
|
|
||||||
|
|
||||||
/* Includes image offset tables:
|
|
||||||
*/
|
|
||||||
unsigned level_offset[PIPE_MAX_TEXTURE_LEVELS];
|
|
||||||
|
|
||||||
/* The data is held here:
|
|
||||||
*/
|
|
||||||
struct pipe_buffer *buffer;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Data about a particular attempt to compile a program. Note that
|
|
||||||
* there can be many of these, each in a different GL state
|
|
||||||
* corresponding to a different brw_wm_prog_key struct, with different
|
|
||||||
* compiled programs:
|
|
||||||
*/
|
|
||||||
/* Data about a particular attempt to compile a program. Note that
|
|
||||||
* there can be many of these, each in a different GL state
|
|
||||||
* corresponding to a different brw_wm_prog_key struct, with different
|
|
||||||
* compiled programs:
|
|
||||||
*/
|
|
||||||
|
|
||||||
struct brw_wm_prog_data {
|
|
||||||
unsigned curb_read_length;
|
|
||||||
unsigned urb_read_length;
|
|
||||||
|
|
||||||
unsigned first_curbe_grf;
|
|
||||||
unsigned total_grf;
|
|
||||||
unsigned total_scratch;
|
|
||||||
|
|
||||||
/* Internally generated constants for the CURBE. These are loaded
|
|
||||||
* ahead of the data from the constant buffer.
|
|
||||||
*/
|
|
||||||
const float internal_const[8];
|
|
||||||
unsigned nr_internal_consts;
|
|
||||||
unsigned max_const;
|
|
||||||
|
|
||||||
boolean error;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_sf_prog_data {
|
|
||||||
unsigned urb_read_length;
|
|
||||||
unsigned total_grf;
|
|
||||||
|
|
||||||
/* Each vertex may have upto 12 attributes, 4 components each,
|
|
||||||
* except WPOS which requires only 2. (11*4 + 2) == 44 ==> 11
|
|
||||||
* rows.
|
|
||||||
*
|
|
||||||
* Actually we use 4 for each, so call it 12 rows.
|
|
||||||
*/
|
|
||||||
unsigned urb_entry_size;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_clip_prog_data {
|
|
||||||
unsigned curb_read_length; /* user planes? */
|
|
||||||
unsigned clip_mode;
|
|
||||||
unsigned urb_read_length;
|
|
||||||
unsigned total_grf;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_gs_prog_data {
|
|
||||||
unsigned urb_read_length;
|
|
||||||
unsigned total_grf;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_vs_prog_data {
|
|
||||||
unsigned curb_read_length;
|
|
||||||
unsigned urb_read_length;
|
|
||||||
unsigned total_grf;
|
|
||||||
unsigned outputs_written;
|
|
||||||
|
|
||||||
unsigned inputs_read;
|
|
||||||
|
|
||||||
unsigned max_const;
|
|
||||||
|
|
||||||
float imm_buf[PIPE_MAX_CONSTANT][4];
|
|
||||||
unsigned num_imm;
|
|
||||||
unsigned num_consts;
|
|
||||||
|
|
||||||
/* Used for calculating urb partitions:
|
|
||||||
*/
|
|
||||||
unsigned urb_entry_size;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#define BRW_MAX_TEX_UNIT 8
|
|
||||||
#define BRW_WM_MAX_SURF BRW_MAX_TEX_UNIT + 1
|
|
||||||
|
|
||||||
/* Create a fixed sized struct for caching binding tables:
|
|
||||||
*/
|
|
||||||
struct brw_surface_binding_table {
|
|
||||||
unsigned surf_ss_offset[BRW_WM_MAX_SURF];
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_cache;
|
|
||||||
|
|
||||||
struct brw_mem_pool {
|
|
||||||
struct pipe_buffer *buffer;
|
|
||||||
|
|
||||||
unsigned size;
|
|
||||||
unsigned offset; /* offset of first free byte */
|
|
||||||
|
|
||||||
struct brw_context *brw;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_cache_item {
|
|
||||||
unsigned hash;
|
|
||||||
unsigned key_size; /* for variable-sized keys */
|
|
||||||
const void *key;
|
|
||||||
|
|
||||||
unsigned offset; /* offset within pool's buffer */
|
|
||||||
unsigned data_size;
|
|
||||||
|
|
||||||
struct brw_cache_item *next;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_cache {
|
|
||||||
unsigned id;
|
|
||||||
|
|
||||||
const char *name;
|
|
||||||
|
|
||||||
struct brw_context *brw;
|
|
||||||
struct brw_mem_pool *pool;
|
|
||||||
|
|
||||||
struct brw_cache_item **items;
|
|
||||||
unsigned size, n_items;
|
|
||||||
|
|
||||||
unsigned key_size; /* for fixed-size keys */
|
|
||||||
unsigned aux_size;
|
|
||||||
|
|
||||||
unsigned last_addr; /* offset of active item */
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Considered adding a member to this struct to document which flags
|
|
||||||
* an update might raise so that ordering of the state atoms can be
|
|
||||||
* checked or derived at runtime. Dropped the idea in favor of having
|
|
||||||
* a debug mode where the state is monitored for flags which are
|
|
||||||
* raised that have already been tested against.
|
|
||||||
*/
|
|
||||||
struct brw_tracked_state {
|
|
||||||
struct brw_state_flags dirty;
|
|
||||||
void (*update)( struct brw_context *brw );
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/* Flags for brw->state.cache.
|
|
||||||
*/
|
|
||||||
#define CACHE_NEW_CC_VP (1<<BRW_CC_VP)
|
|
||||||
#define CACHE_NEW_CC_UNIT (1<<BRW_CC_UNIT)
|
|
||||||
#define CACHE_NEW_WM_PROG (1<<BRW_WM_PROG)
|
|
||||||
#define CACHE_NEW_SAMPLER_DEFAULT_COLOR (1<<BRW_SAMPLER_DEFAULT_COLOR)
|
|
||||||
#define CACHE_NEW_SAMPLER (1<<BRW_SAMPLER)
|
|
||||||
#define CACHE_NEW_WM_UNIT (1<<BRW_WM_UNIT)
|
|
||||||
#define CACHE_NEW_SF_PROG (1<<BRW_SF_PROG)
|
|
||||||
#define CACHE_NEW_SF_VP (1<<BRW_SF_VP)
|
|
||||||
#define CACHE_NEW_SF_UNIT (1<<BRW_SF_UNIT)
|
|
||||||
#define CACHE_NEW_VS_UNIT (1<<BRW_VS_UNIT)
|
|
||||||
#define CACHE_NEW_VS_PROG (1<<BRW_VS_PROG)
|
|
||||||
#define CACHE_NEW_GS_UNIT (1<<BRW_GS_UNIT)
|
|
||||||
#define CACHE_NEW_GS_PROG (1<<BRW_GS_PROG)
|
|
||||||
#define CACHE_NEW_CLIP_VP (1<<BRW_CLIP_VP)
|
|
||||||
#define CACHE_NEW_CLIP_UNIT (1<<BRW_CLIP_UNIT)
|
|
||||||
#define CACHE_NEW_CLIP_PROG (1<<BRW_CLIP_PROG)
|
|
||||||
#define CACHE_NEW_SURFACE (1<<BRW_SS_SURFACE)
|
|
||||||
#define CACHE_NEW_SURF_BIND (1<<BRW_SS_SURF_BIND)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
enum brw_mempool_id {
|
|
||||||
BRW_GS_POOL,
|
|
||||||
BRW_SS_POOL,
|
|
||||||
BRW_MAX_POOL
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_cached_batch_item {
|
|
||||||
struct header *header;
|
|
||||||
unsigned sz;
|
|
||||||
struct brw_cached_batch_item *next;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Protect against a future where PIPE_MAX_ATTRIBS > 32. Wouldn't life
|
|
||||||
* be easier if C allowed arrays of packed elements?
|
|
||||||
*/
|
|
||||||
#define ATTRIB_BIT_DWORDS ((PIPE_MAX_ATTRIBS+31)/32)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_vertex_info {
|
|
||||||
unsigned varying; /* varying:1[PIPE_MAX_ATTRIBS] */
|
|
||||||
unsigned sizes[ATTRIB_BIT_DWORDS * 2]; /* sizes:2[PIPE_MAX_ATTRIBS] */
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_context
|
|
||||||
{
|
|
||||||
struct pipe_context pipe;
|
|
||||||
struct brw_winsys *winsys;
|
|
||||||
|
|
||||||
unsigned primitive;
|
|
||||||
unsigned reduced_primitive;
|
|
||||||
|
|
||||||
boolean emit_state_always;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_state_flags dirty;
|
|
||||||
} state;
|
|
||||||
|
|
||||||
|
|
||||||
struct {
|
|
||||||
const struct pipe_blend_state *Blend;
|
|
||||||
const struct pipe_depth_stencil_alpha_state *DepthStencil;
|
|
||||||
const struct pipe_poly_stipple *PolygonStipple;
|
|
||||||
const struct pipe_rasterizer_state *Raster;
|
|
||||||
const struct pipe_sampler_state *Samplers[PIPE_MAX_SAMPLERS];
|
|
||||||
const struct brw_vertex_program *VertexProgram;
|
|
||||||
const struct brw_fragment_program *FragmentProgram;
|
|
||||||
|
|
||||||
struct pipe_clip_state Clip;
|
|
||||||
struct pipe_blend_color BlendColor;
|
|
||||||
struct pipe_scissor_state Scissor;
|
|
||||||
struct pipe_viewport_state Viewport;
|
|
||||||
struct pipe_framebuffer_state FrameBuffer;
|
|
||||||
|
|
||||||
const struct pipe_constant_buffer *Constants[2];
|
|
||||||
const struct brw_texture *Texture[PIPE_MAX_SAMPLERS];
|
|
||||||
} attribs;
|
|
||||||
|
|
||||||
unsigned num_samplers;
|
|
||||||
unsigned num_textures;
|
|
||||||
|
|
||||||
struct brw_mem_pool pool[BRW_MAX_POOL];
|
|
||||||
struct brw_cache cache[BRW_MAX_CACHE];
|
|
||||||
struct brw_cached_batch_item *cached_batch_items;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
|
|
||||||
/* Arrays with buffer objects to copy non-bufferobj arrays into
|
|
||||||
* for upload:
|
|
||||||
*/
|
|
||||||
const struct pipe_vertex_buffer *vbo_array[PIPE_MAX_ATTRIBS];
|
|
||||||
|
|
||||||
struct brw_vertex_element_state inputs[PIPE_MAX_ATTRIBS];
|
|
||||||
|
|
||||||
#define BRW_NR_UPLOAD_BUFS 17
|
|
||||||
#define BRW_UPLOAD_INIT_SIZE (128*1024)
|
|
||||||
|
|
||||||
/* Summary of size and varying of active arrays, so we can check
|
|
||||||
* for changes to this state:
|
|
||||||
*/
|
|
||||||
struct brw_vertex_info info;
|
|
||||||
} vb;
|
|
||||||
|
|
||||||
|
|
||||||
unsigned hardware_dirty;
|
|
||||||
unsigned dirty;
|
|
||||||
unsigned pci_id;
|
|
||||||
/* BRW_NEW_URB_ALLOCATIONS:
|
|
||||||
*/
|
|
||||||
struct {
|
|
||||||
unsigned vsize; /* vertex size plus header in urb registers */
|
|
||||||
unsigned csize; /* constant buffer size in urb registers */
|
|
||||||
unsigned sfsize; /* setup data size in urb registers */
|
|
||||||
|
|
||||||
boolean constrained;
|
|
||||||
|
|
||||||
unsigned nr_vs_entries;
|
|
||||||
unsigned nr_gs_entries;
|
|
||||||
unsigned nr_clip_entries;
|
|
||||||
unsigned nr_sf_entries;
|
|
||||||
unsigned nr_cs_entries;
|
|
||||||
|
|
||||||
/* unsigned vs_size; */
|
|
||||||
/* unsigned gs_size; */
|
|
||||||
/* unsigned clip_size; */
|
|
||||||
/* unsigned sf_size; */
|
|
||||||
/* unsigned cs_size; */
|
|
||||||
|
|
||||||
unsigned vs_start;
|
|
||||||
unsigned gs_start;
|
|
||||||
unsigned clip_start;
|
|
||||||
unsigned sf_start;
|
|
||||||
unsigned cs_start;
|
|
||||||
} urb;
|
|
||||||
|
|
||||||
|
|
||||||
/* BRW_NEW_CURBE_OFFSETS:
|
|
||||||
*/
|
|
||||||
struct {
|
|
||||||
unsigned wm_start;
|
|
||||||
unsigned wm_size;
|
|
||||||
unsigned clip_start;
|
|
||||||
unsigned clip_size;
|
|
||||||
unsigned vs_start;
|
|
||||||
unsigned vs_size;
|
|
||||||
unsigned total_size;
|
|
||||||
|
|
||||||
unsigned gs_offset;
|
|
||||||
|
|
||||||
float *last_buf;
|
|
||||||
unsigned last_bufsz;
|
|
||||||
} curbe;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_vs_prog_data *prog_data;
|
|
||||||
|
|
||||||
unsigned prog_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} vs;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_gs_prog_data *prog_data;
|
|
||||||
|
|
||||||
boolean prog_active;
|
|
||||||
unsigned prog_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} gs;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_clip_prog_data *prog_data;
|
|
||||||
|
|
||||||
unsigned prog_gs_offset;
|
|
||||||
unsigned vp_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} clip;
|
|
||||||
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_sf_prog_data *prog_data;
|
|
||||||
|
|
||||||
struct pipe_setup_linkage linkage;
|
|
||||||
|
|
||||||
unsigned prog_gs_offset;
|
|
||||||
unsigned vp_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} sf;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_wm_prog_data *prog_data;
|
|
||||||
|
|
||||||
// struct brw_wm_compiler *compile_data;
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Array of sampler state uploaded at sampler_gs_offset of BRW_SAMPLER
|
|
||||||
* cache
|
|
||||||
*/
|
|
||||||
struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
|
|
||||||
|
|
||||||
unsigned render_surf;
|
|
||||||
unsigned nr_surfaces;
|
|
||||||
|
|
||||||
unsigned max_threads;
|
|
||||||
struct pipe_buffer *scratch_buffer;
|
|
||||||
unsigned scratch_buffer_size;
|
|
||||||
|
|
||||||
unsigned sampler_count;
|
|
||||||
unsigned sampler_gs_offset;
|
|
||||||
|
|
||||||
struct brw_surface_binding_table bind;
|
|
||||||
unsigned bind_ss_offset;
|
|
||||||
|
|
||||||
unsigned prog_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} wm;
|
|
||||||
|
|
||||||
|
|
||||||
struct {
|
|
||||||
unsigned vp_gs_offset;
|
|
||||||
unsigned state_gs_offset;
|
|
||||||
} cc;
|
|
||||||
|
|
||||||
|
|
||||||
/* Used to give every program string a unique id
|
|
||||||
*/
|
|
||||||
unsigned program_id;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#define BRW_PACKCOLOR8888(r,g,b,a) ((r<<24) | (g<<16) | (b<<8) | a)
|
|
||||||
|
|
||||||
|
|
||||||
/*======================================================================
|
|
||||||
* brw_vtbl.c
|
|
||||||
*/
|
|
||||||
void brw_do_flush( struct brw_context *brw,
|
|
||||||
unsigned flags );
|
|
||||||
|
|
||||||
|
|
||||||
/*======================================================================
|
|
||||||
* brw_state.c
|
|
||||||
*/
|
|
||||||
void brw_validate_state(struct brw_context *brw);
|
|
||||||
void brw_init_state(struct brw_context *brw);
|
|
||||||
void brw_destroy_state(struct brw_context *brw);
|
|
||||||
|
|
||||||
|
|
||||||
/*======================================================================
|
|
||||||
* brw_tex.c
|
|
||||||
*/
|
|
||||||
void brwUpdateTextureState( struct brw_context *brw );
|
|
||||||
|
|
||||||
|
|
||||||
/* brw_urb.c
|
|
||||||
*/
|
|
||||||
void brw_upload_urb_fence(struct brw_context *brw);
|
|
||||||
|
|
||||||
void brw_upload_constant_buffer_state(struct brw_context *brw);
|
|
||||||
|
|
||||||
void brw_init_surface_functions(struct brw_context *brw);
|
|
||||||
void brw_init_state_functions(struct brw_context *brw);
|
|
||||||
void brw_init_flush_functions(struct brw_context *brw);
|
|
||||||
void brw_init_string_functions(struct brw_context *brw);
|
|
||||||
|
|
||||||
/*======================================================================
|
|
||||||
* Inline conversion functions. These are better-typed than the
|
|
||||||
* macros used previously:
|
|
||||||
*/
|
|
||||||
static inline struct brw_context *
|
|
||||||
brw_context( struct pipe_context *ctx )
|
|
||||||
{
|
|
||||||
return (struct brw_context *)ctx;
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
|
@ -1,369 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_batch.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_wm.h"
|
|
||||||
#include "pipe/p_state.h"
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
#include "util/u_math.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
|
|
||||||
#define FILE_DEBUG_FLAG DEBUG_FALLBACKS
|
|
||||||
|
|
||||||
/* Partition the CURBE between the various users of constant values:
|
|
||||||
*/
|
|
||||||
static void calculate_curbe_offsets( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
/* CACHE_NEW_WM_PROG */
|
|
||||||
unsigned nr_fp_regs = align(brw->wm.prog_data->max_const, 16);
|
|
||||||
|
|
||||||
/* BRW_NEW_VERTEX_PROGRAM */
|
|
||||||
unsigned nr_vp_regs = align(brw->vs.prog_data->max_const, 16);
|
|
||||||
unsigned nr_clip_regs = 0;
|
|
||||||
unsigned total_regs;
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* BRW_NEW_CLIP ? */
|
|
||||||
if (brw->attribs.Transform->ClipPlanesEnabled) {
|
|
||||||
unsigned nr_planes = 6 + brw_count_bits(brw->attribs.Transform->ClipPlanesEnabled);
|
|
||||||
nr_clip_regs = align(nr_planes * 4, 16);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
total_regs = nr_fp_regs + nr_vp_regs + nr_clip_regs;
|
|
||||||
|
|
||||||
/* This can happen - what to do? Probably rather than falling
|
|
||||||
* back, the best thing to do is emit programs which code the
|
|
||||||
* constants as immediate values. Could do this either as a static
|
|
||||||
* cap on WM and VS, or adaptively.
|
|
||||||
*
|
|
||||||
* Unfortunately, this is currently dependent on the results of the
|
|
||||||
* program generation process (in the case of wm), so this would
|
|
||||||
* introduce the need to re-generate programs in the event of a
|
|
||||||
* curbe allocation failure.
|
|
||||||
*/
|
|
||||||
/* Max size is 32 - just large enough to
|
|
||||||
* hold the 128 parameters allowed by
|
|
||||||
* the fragment and vertex program
|
|
||||||
* api's. It's not clear what happens
|
|
||||||
* when both VP and FP want to use 128
|
|
||||||
* parameters, though.
|
|
||||||
*/
|
|
||||||
assert(total_regs <= 32);
|
|
||||||
|
|
||||||
/* Lazy resize:
|
|
||||||
*/
|
|
||||||
if (nr_fp_regs > brw->curbe.wm_size ||
|
|
||||||
nr_vp_regs > brw->curbe.vs_size ||
|
|
||||||
nr_clip_regs != brw->curbe.clip_size ||
|
|
||||||
(total_regs < brw->curbe.total_size / 4 &&
|
|
||||||
brw->curbe.total_size > 16)) {
|
|
||||||
|
|
||||||
unsigned reg = 0;
|
|
||||||
|
|
||||||
/* Calculate a new layout:
|
|
||||||
*/
|
|
||||||
reg = 0;
|
|
||||||
brw->curbe.wm_start = reg;
|
|
||||||
brw->curbe.wm_size = nr_fp_regs; reg += nr_fp_regs;
|
|
||||||
brw->curbe.clip_start = reg;
|
|
||||||
brw->curbe.clip_size = nr_clip_regs; reg += nr_clip_regs;
|
|
||||||
brw->curbe.vs_start = reg;
|
|
||||||
brw->curbe.vs_size = nr_vp_regs; reg += nr_vp_regs;
|
|
||||||
brw->curbe.total_size = reg;
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
if (0)
|
|
||||||
DBG("curbe wm %d+%d clip %d+%d vs %d+%d\n",
|
|
||||||
brw->curbe.wm_start,
|
|
||||||
brw->curbe.wm_size,
|
|
||||||
brw->curbe.clip_start,
|
|
||||||
brw->curbe.clip_size,
|
|
||||||
brw->curbe.vs_start,
|
|
||||||
brw->curbe.vs_size );
|
|
||||||
#endif
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_CURBE_OFFSETS;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_curbe_offsets = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_CLIP |
|
|
||||||
BRW_NEW_VS),
|
|
||||||
.cache = CACHE_NEW_WM_PROG
|
|
||||||
},
|
|
||||||
.update = calculate_curbe_offsets
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Define the number of curbes within CS's urb allocation. Multiple
|
|
||||||
* urb entries -> multiple curbes. These will be used by
|
|
||||||
* fixed-function hardware in a double-buffering scheme to avoid a
|
|
||||||
* pipeline stall each time the contents of the curbe is changed.
|
|
||||||
*/
|
|
||||||
void brw_upload_constant_buffer_state(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_constant_buffer_state cbs;
|
|
||||||
memset(&cbs, 0, sizeof(cbs));
|
|
||||||
|
|
||||||
/* It appears that this is the state packet for the CS unit, ie. the
|
|
||||||
* urb entries detailed here are housed in the CS range from the
|
|
||||||
* URB_FENCE command.
|
|
||||||
*/
|
|
||||||
cbs.header.opcode = CMD_CONST_BUFFER_STATE;
|
|
||||||
cbs.header.length = sizeof(cbs)/4 - 2;
|
|
||||||
|
|
||||||
/* BRW_NEW_URB_FENCE */
|
|
||||||
cbs.bits0.nr_urb_entries = brw->urb.nr_cs_entries;
|
|
||||||
cbs.bits0.urb_entry_size = brw->urb.csize - 1;
|
|
||||||
|
|
||||||
assert(brw->urb.nr_cs_entries);
|
|
||||||
BRW_CACHED_BATCH_STRUCT(brw, &cbs);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static float fixed_plane[6][4] = {
|
|
||||||
{ 0, 0, -1, 1 },
|
|
||||||
{ 0, 0, 1, 1 },
|
|
||||||
{ 0, -1, 0, 1 },
|
|
||||||
{ 0, 1, 0, 1 },
|
|
||||||
{-1, 0, 0, 1 },
|
|
||||||
{ 1, 0, 0, 1 }
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Upload a new set of constants. Too much variability to go into the
|
|
||||||
* cache mechanism, but maybe would benefit from a comparison against
|
|
||||||
* the current uploaded set of constants.
|
|
||||||
*/
|
|
||||||
static void upload_constant_buffer(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_mem_pool *pool = &brw->pool[BRW_GS_POOL];
|
|
||||||
unsigned sz = brw->curbe.total_size;
|
|
||||||
unsigned bufsz = sz * sizeof(float);
|
|
||||||
float *buf;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
|
|
||||||
if (sz == 0) {
|
|
||||||
struct brw_constant_buffer cb;
|
|
||||||
cb.header.opcode = CMD_CONST_BUFFER;
|
|
||||||
cb.header.length = sizeof(cb)/4 - 2;
|
|
||||||
cb.header.valid = 0;
|
|
||||||
cb.bits0.buffer_length = 0;
|
|
||||||
cb.bits0.buffer_address = 0;
|
|
||||||
BRW_BATCH_STRUCT(brw, &cb);
|
|
||||||
|
|
||||||
if (brw->curbe.last_buf) {
|
|
||||||
free(brw->curbe.last_buf);
|
|
||||||
brw->curbe.last_buf = NULL;
|
|
||||||
brw->curbe.last_bufsz = 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
buf = (float *)malloc(bufsz);
|
|
||||||
|
|
||||||
memset(buf, 0, bufsz);
|
|
||||||
|
|
||||||
if (brw->curbe.wm_size) {
|
|
||||||
unsigned offset = brw->curbe.wm_start * 16;
|
|
||||||
|
|
||||||
/* First the constant buffer constants:
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Then any internally generated constants:
|
|
||||||
*/
|
|
||||||
for (i = 0; i < brw->wm.prog_data->nr_internal_consts; i++)
|
|
||||||
buf[offset + i] = brw->wm.prog_data->internal_const[i];
|
|
||||||
|
|
||||||
assert(brw->wm.prog_data->max_const ==
|
|
||||||
brw->wm.prog_data->nr_internal_consts);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* The clipplanes are actually delivered to both CLIP and VS units.
|
|
||||||
* VS uses them to calculate the outcode bitmasks.
|
|
||||||
*/
|
|
||||||
if (brw->curbe.clip_size) {
|
|
||||||
unsigned offset = brw->curbe.clip_start * 16;
|
|
||||||
unsigned j;
|
|
||||||
|
|
||||||
/* If any planes are going this way, send them all this way:
|
|
||||||
*/
|
|
||||||
for (i = 0; i < 6; i++) {
|
|
||||||
buf[offset + i * 4 + 0] = fixed_plane[i][0];
|
|
||||||
buf[offset + i * 4 + 1] = fixed_plane[i][1];
|
|
||||||
buf[offset + i * 4 + 2] = fixed_plane[i][2];
|
|
||||||
buf[offset + i * 4 + 3] = fixed_plane[i][3];
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Clip planes: BRW_NEW_CLIP:
|
|
||||||
*/
|
|
||||||
for (j = 0; j < brw->attribs.Clip.nr; j++) {
|
|
||||||
buf[offset + i * 4 + 0] = brw->attribs.Clip.ucp[j][0];
|
|
||||||
buf[offset + i * 4 + 1] = brw->attribs.Clip.ucp[j][1];
|
|
||||||
buf[offset + i * 4 + 2] = brw->attribs.Clip.ucp[j][2];
|
|
||||||
buf[offset + i * 4 + 3] = brw->attribs.Clip.ucp[j][3];
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
if (brw->curbe.vs_size) {
|
|
||||||
unsigned offset = brw->curbe.vs_start * 16;
|
|
||||||
/*unsigned nr = vp->max_const;*/
|
|
||||||
const struct pipe_constant_buffer *cbuffer = brw->attribs.Constants[0];
|
|
||||||
struct pipe_winsys *ws = brw->pipe.winsys;
|
|
||||||
/* FIXME: buffer size is num_consts + num_immediates */
|
|
||||||
if (brw->vs.prog_data->num_consts) {
|
|
||||||
/* map the vertex constant buffer and copy to curbe: */
|
|
||||||
void *data = ws->buffer_map(ws, cbuffer->buffer, 0);
|
|
||||||
/* FIXME: this is wrong. the cbuffer->buffer->size currently
|
|
||||||
* represents size of consts + immediates. so if we'll
|
|
||||||
* have both we'll copy over the end of the buffer
|
|
||||||
* with the subsequent memcpy */
|
|
||||||
memcpy(&buf[offset], data, cbuffer->buffer->size);
|
|
||||||
ws->buffer_unmap(ws, cbuffer->buffer);
|
|
||||||
offset += cbuffer->buffer->size;
|
|
||||||
}
|
|
||||||
/*immediates*/
|
|
||||||
if (brw->vs.prog_data->num_imm) {
|
|
||||||
memcpy(&buf[offset], brw->vs.prog_data->imm_buf,
|
|
||||||
brw->vs.prog_data->num_imm * 4 * sizeof(float));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (1) {
|
|
||||||
for (i = 0; i < sz; i+=4)
|
|
||||||
debug_printf("curbe %d.%d: %f %f %f %f\n", i/8, i&4,
|
|
||||||
buf[i+0], buf[i+1], buf[i+2], buf[i+3]);
|
|
||||||
|
|
||||||
debug_printf("last_buf %p buf %p sz %d/%d cmp %d\n",
|
|
||||||
brw->curbe.last_buf, buf,
|
|
||||||
bufsz, brw->curbe.last_bufsz,
|
|
||||||
brw->curbe.last_buf ? memcmp(buf, brw->curbe.last_buf, bufsz) : -1);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (brw->curbe.last_buf &&
|
|
||||||
bufsz == brw->curbe.last_bufsz &&
|
|
||||||
memcmp(buf, brw->curbe.last_buf, bufsz) == 0) {
|
|
||||||
free(buf);
|
|
||||||
/* return; */
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
if (brw->curbe.last_buf)
|
|
||||||
free(brw->curbe.last_buf);
|
|
||||||
brw->curbe.last_buf = buf;
|
|
||||||
brw->curbe.last_bufsz = bufsz;
|
|
||||||
|
|
||||||
|
|
||||||
if (!brw_pool_alloc(pool,
|
|
||||||
bufsz,
|
|
||||||
1 << 6,
|
|
||||||
&brw->curbe.gs_offset)) {
|
|
||||||
debug_printf("out of GS memory for curbe\n");
|
|
||||||
assert(0);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Copy data to the buffer:
|
|
||||||
*/
|
|
||||||
brw->winsys->buffer_subdata_typed(brw->winsys,
|
|
||||||
pool->buffer,
|
|
||||||
brw->curbe.gs_offset,
|
|
||||||
bufsz,
|
|
||||||
buf,
|
|
||||||
BRW_CONSTANT_BUFFER );
|
|
||||||
}
|
|
||||||
|
|
||||||
/* TODO: only emit the constant_buffer packet when necessary, ie:
|
|
||||||
- contents have changed
|
|
||||||
- offset has changed
|
|
||||||
- hw requirements due to other packets emitted.
|
|
||||||
*/
|
|
||||||
{
|
|
||||||
struct brw_constant_buffer cb;
|
|
||||||
|
|
||||||
memset(&cb, 0, sizeof(cb));
|
|
||||||
|
|
||||||
cb.header.opcode = CMD_CONST_BUFFER;
|
|
||||||
cb.header.length = sizeof(cb)/4 - 2;
|
|
||||||
cb.header.valid = 1;
|
|
||||||
cb.bits0.buffer_length = sz - 1;
|
|
||||||
cb.bits0.buffer_address = brw->curbe.gs_offset >> 6;
|
|
||||||
|
|
||||||
/* Because this provokes an action (ie copy the constants into the
|
|
||||||
* URB), it shouldn't be shortcircuited if identical to the
|
|
||||||
* previous time - because eg. the urb destination may have
|
|
||||||
* changed, or the urb contents different to last time.
|
|
||||||
*
|
|
||||||
* Note that the data referred to is actually copied internally,
|
|
||||||
* not just used in place according to passed pointer.
|
|
||||||
*
|
|
||||||
* It appears that the CS unit takes care of using each available
|
|
||||||
* URB entry (Const URB Entry == CURBE) in turn, and issuing
|
|
||||||
* flushes as necessary when doublebuffering of CURBEs isn't
|
|
||||||
* possible.
|
|
||||||
*/
|
|
||||||
BRW_BATCH_STRUCT(brw, &cb);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* This tracked state is unique in that the state it monitors varies
|
|
||||||
* dynamically depending on the parameters tracked by the fragment and
|
|
||||||
* vertex programs. This is the template used as a starting point,
|
|
||||||
* each context will maintain a copy of this internally and update as
|
|
||||||
* required.
|
|
||||||
*/
|
|
||||||
const struct brw_tracked_state brw_constant_buffer = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_CLIP |
|
|
||||||
BRW_NEW_CONSTANTS |
|
|
||||||
BRW_NEW_URB_FENCE | /* Implicit - hardware requires this, not used above */
|
|
||||||
BRW_NEW_PSP | /* Implicit - hardware requires this, not used above */
|
|
||||||
BRW_NEW_CURBE_OFFSETS),
|
|
||||||
.cache = (CACHE_NEW_WM_PROG)
|
|
||||||
},
|
|
||||||
.update = upload_constant_buffer
|
|
||||||
};
|
|
||||||
|
|
|
@ -1,870 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_DEFINES_H
|
|
||||||
#define BRW_DEFINES_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
*/
|
|
||||||
#define MI_NOOP 0x00
|
|
||||||
#define MI_USER_INTERRUPT 0x02
|
|
||||||
#define MI_WAIT_FOR_EVENT 0x03
|
|
||||||
#define MI_FLUSH 0x04
|
|
||||||
#define MI_REPORT_HEAD 0x07
|
|
||||||
#define MI_ARB_ON_OFF 0x08
|
|
||||||
#define MI_BATCH_BUFFER_END 0x0A
|
|
||||||
#define MI_OVERLAY_FLIP 0x11
|
|
||||||
#define MI_LOAD_SCAN_LINES_INCL 0x12
|
|
||||||
#define MI_LOAD_SCAN_LINES_EXCL 0x13
|
|
||||||
#define MI_DISPLAY_BUFFER_INFO 0x14
|
|
||||||
#define MI_SET_CONTEXT 0x18
|
|
||||||
#define MI_STORE_DATA_IMM 0x20
|
|
||||||
#define MI_STORE_DATA_INDEX 0x21
|
|
||||||
#define MI_LOAD_REGISTER_IMM 0x22
|
|
||||||
#define MI_STORE_REGISTER_MEM 0x24
|
|
||||||
#define MI_BATCH_BUFFER_START 0x31
|
|
||||||
|
|
||||||
#define MI_SYNCHRONOUS_FLIP 0x0
|
|
||||||
#define MI_ASYNCHRONOUS_FLIP 0x1
|
|
||||||
|
|
||||||
#define MI_BUFFER_SECURE 0x0
|
|
||||||
#define MI_BUFFER_NONSECURE 0x1
|
|
||||||
|
|
||||||
#define MI_ARBITRATE_AT_CHAIN_POINTS 0x0
|
|
||||||
#define MI_ARBITRATE_BETWEEN_INSTS 0x1
|
|
||||||
#define MI_NO_ARBITRATION 0x3
|
|
||||||
|
|
||||||
#define MI_CONDITION_CODE_WAIT_DISABLED 0x0
|
|
||||||
#define MI_CONDITION_CODE_WAIT_0 0x1
|
|
||||||
#define MI_CONDITION_CODE_WAIT_1 0x2
|
|
||||||
#define MI_CONDITION_CODE_WAIT_2 0x3
|
|
||||||
#define MI_CONDITION_CODE_WAIT_3 0x4
|
|
||||||
#define MI_CONDITION_CODE_WAIT_4 0x5
|
|
||||||
|
|
||||||
#define MI_DISPLAY_PIPE_A 0x0
|
|
||||||
#define MI_DISPLAY_PIPE_B 0x1
|
|
||||||
|
|
||||||
#define MI_DISPLAY_PLANE_A 0x0
|
|
||||||
#define MI_DISPLAY_PLANE_B 0x1
|
|
||||||
#define MI_DISPLAY_PLANE_C 0x2
|
|
||||||
|
|
||||||
#define MI_STANDARD_FLIP 0x0
|
|
||||||
#define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1
|
|
||||||
#define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2
|
|
||||||
#define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3
|
|
||||||
|
|
||||||
#define MI_PHYSICAL_ADDRESS 0x0
|
|
||||||
#define MI_VIRTUAL_ADDRESS 0x1
|
|
||||||
|
|
||||||
#define MI_BUFFER_MEMORY_MAIN 0x0
|
|
||||||
#define MI_BUFFER_MEMORY_GTT 0x2
|
|
||||||
#define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3
|
|
||||||
|
|
||||||
#define MI_FLIP_CONTINUE 0x0
|
|
||||||
#define MI_FLIP_ON 0x1
|
|
||||||
#define MI_FLIP_OFF 0x2
|
|
||||||
|
|
||||||
#define MI_UNTRUSTED_REGISTER_SPACE 0x0
|
|
||||||
#define MI_TRUSTED_REGISTER_SPACE 0x1
|
|
||||||
|
|
||||||
/* 3D state:
|
|
||||||
*/
|
|
||||||
#define _3DOP_3DSTATE_PIPELINED 0x0
|
|
||||||
#define _3DOP_3DSTATE_NONPIPELINED 0x1
|
|
||||||
#define _3DOP_3DCONTROL 0x2
|
|
||||||
#define _3DOP_3DPRIMITIVE 0x3
|
|
||||||
|
|
||||||
#define _3DSTATE_PIPELINED_POINTERS 0x00
|
|
||||||
#define _3DSTATE_BINDING_TABLE_POINTERS 0x01
|
|
||||||
#define _3DSTATE_VERTEX_BUFFERS 0x08
|
|
||||||
#define _3DSTATE_VERTEX_ELEMENTS 0x09
|
|
||||||
#define _3DSTATE_INDEX_BUFFER 0x0A
|
|
||||||
#define _3DSTATE_VF_STATISTICS 0x0B
|
|
||||||
#define _3DSTATE_DRAWING_RECTANGLE 0x00
|
|
||||||
#define _3DSTATE_CONSTANT_COLOR 0x01
|
|
||||||
#define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02
|
|
||||||
#define _3DSTATE_CHROMA_KEY 0x04
|
|
||||||
#define _3DSTATE_DEPTH_BUFFER 0x05
|
|
||||||
#define _3DSTATE_POLY_STIPPLE_OFFSET 0x06
|
|
||||||
#define _3DSTATE_POLY_STIPPLE_PATTERN 0x07
|
|
||||||
#define _3DSTATE_LINE_STIPPLE 0x08
|
|
||||||
#define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09
|
|
||||||
#define _3DCONTROL 0x00
|
|
||||||
#define _3DPRIMITIVE 0x00
|
|
||||||
|
|
||||||
#define PIPE_CONTROL_NOWRITE 0x00
|
|
||||||
#define PIPE_CONTROL_WRITEIMMEDIATE 0x01
|
|
||||||
#define PIPE_CONTROL_WRITEDEPTH 0x02
|
|
||||||
#define PIPE_CONTROL_WRITETIMESTAMP 0x03
|
|
||||||
|
|
||||||
#define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00
|
|
||||||
#define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01
|
|
||||||
|
|
||||||
#define _3DPRIM_POINTLIST 0x01
|
|
||||||
#define _3DPRIM_LINELIST 0x02
|
|
||||||
#define _3DPRIM_LINESTRIP 0x03
|
|
||||||
#define _3DPRIM_TRILIST 0x04
|
|
||||||
#define _3DPRIM_TRISTRIP 0x05
|
|
||||||
#define _3DPRIM_TRIFAN 0x06
|
|
||||||
#define _3DPRIM_QUADLIST 0x07
|
|
||||||
#define _3DPRIM_QUADSTRIP 0x08
|
|
||||||
#define _3DPRIM_LINELIST_ADJ 0x09
|
|
||||||
#define _3DPRIM_LINESTRIP_ADJ 0x0A
|
|
||||||
#define _3DPRIM_TRILIST_ADJ 0x0B
|
|
||||||
#define _3DPRIM_TRISTRIP_ADJ 0x0C
|
|
||||||
#define _3DPRIM_TRISTRIP_REVERSE 0x0D
|
|
||||||
#define _3DPRIM_POLYGON 0x0E
|
|
||||||
#define _3DPRIM_RECTLIST 0x0F
|
|
||||||
#define _3DPRIM_LINELOOP 0x10
|
|
||||||
#define _3DPRIM_POINTLIST_BF 0x11
|
|
||||||
#define _3DPRIM_LINESTRIP_CONT 0x12
|
|
||||||
#define _3DPRIM_LINESTRIP_BF 0x13
|
|
||||||
#define _3DPRIM_LINESTRIP_CONT_BF 0x14
|
|
||||||
#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
|
|
||||||
|
|
||||||
#define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0
|
|
||||||
#define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1
|
|
||||||
|
|
||||||
#define BRW_ANISORATIO_2 0
|
|
||||||
#define BRW_ANISORATIO_4 1
|
|
||||||
#define BRW_ANISORATIO_6 2
|
|
||||||
#define BRW_ANISORATIO_8 3
|
|
||||||
#define BRW_ANISORATIO_10 4
|
|
||||||
#define BRW_ANISORATIO_12 5
|
|
||||||
#define BRW_ANISORATIO_14 6
|
|
||||||
#define BRW_ANISORATIO_16 7
|
|
||||||
|
|
||||||
#define BRW_BLENDFACTOR_ONE 0x1
|
|
||||||
#define BRW_BLENDFACTOR_SRC_COLOR 0x2
|
|
||||||
#define BRW_BLENDFACTOR_SRC_ALPHA 0x3
|
|
||||||
#define BRW_BLENDFACTOR_DST_ALPHA 0x4
|
|
||||||
#define BRW_BLENDFACTOR_DST_COLOR 0x5
|
|
||||||
#define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
|
|
||||||
#define BRW_BLENDFACTOR_CONST_COLOR 0x7
|
|
||||||
#define BRW_BLENDFACTOR_CONST_ALPHA 0x8
|
|
||||||
#define BRW_BLENDFACTOR_SRC1_COLOR 0x9
|
|
||||||
#define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A
|
|
||||||
#define BRW_BLENDFACTOR_ZERO 0x11
|
|
||||||
#define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12
|
|
||||||
#define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13
|
|
||||||
#define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14
|
|
||||||
#define BRW_BLENDFACTOR_INV_DST_COLOR 0x15
|
|
||||||
#define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17
|
|
||||||
#define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18
|
|
||||||
#define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19
|
|
||||||
#define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
|
|
||||||
|
|
||||||
#define BRW_BLENDFUNCTION_ADD 0
|
|
||||||
#define BRW_BLENDFUNCTION_SUBTRACT 1
|
|
||||||
#define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2
|
|
||||||
#define BRW_BLENDFUNCTION_MIN 3
|
|
||||||
#define BRW_BLENDFUNCTION_MAX 4
|
|
||||||
|
|
||||||
#define BRW_ALPHATEST_FORMAT_UNORM8 0
|
|
||||||
#define BRW_ALPHATEST_FORMAT_FLOAT32 1
|
|
||||||
|
|
||||||
#define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0
|
|
||||||
#define BRW_CHROMAKEY_REPLACE_BLACK 1
|
|
||||||
|
|
||||||
#define BRW_CLIP_API_OGL 0
|
|
||||||
#define BRW_CLIP_API_DX 1
|
|
||||||
|
|
||||||
#define BRW_CLIPMODE_NORMAL 0
|
|
||||||
#define BRW_CLIPMODE_CLIP_ALL 1
|
|
||||||
#define BRW_CLIPMODE_CLIP_NON_REJECTED 2
|
|
||||||
#define BRW_CLIPMODE_REJECT_ALL 3
|
|
||||||
#define BRW_CLIPMODE_ACCEPT_ALL 4
|
|
||||||
|
|
||||||
#define BRW_CLIP_NDCSPACE 0
|
|
||||||
#define BRW_CLIP_SCREENSPACE 1
|
|
||||||
|
|
||||||
#define BRW_COMPAREFUNCTION_ALWAYS 0
|
|
||||||
#define BRW_COMPAREFUNCTION_NEVER 1
|
|
||||||
#define BRW_COMPAREFUNCTION_LESS 2
|
|
||||||
#define BRW_COMPAREFUNCTION_EQUAL 3
|
|
||||||
#define BRW_COMPAREFUNCTION_LEQUAL 4
|
|
||||||
#define BRW_COMPAREFUNCTION_GREATER 5
|
|
||||||
#define BRW_COMPAREFUNCTION_NOTEQUAL 6
|
|
||||||
#define BRW_COMPAREFUNCTION_GEQUAL 7
|
|
||||||
|
|
||||||
#define BRW_COVERAGE_PIXELS_HALF 0
|
|
||||||
#define BRW_COVERAGE_PIXELS_1 1
|
|
||||||
#define BRW_COVERAGE_PIXELS_2 2
|
|
||||||
#define BRW_COVERAGE_PIXELS_4 3
|
|
||||||
|
|
||||||
#define BRW_CULLMODE_BOTH 0
|
|
||||||
#define BRW_CULLMODE_NONE 1
|
|
||||||
#define BRW_CULLMODE_FRONT 2
|
|
||||||
#define BRW_CULLMODE_BACK 3
|
|
||||||
|
|
||||||
#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0
|
|
||||||
#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
|
|
||||||
|
|
||||||
#define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0
|
|
||||||
#define BRW_DEPTHFORMAT_D32_FLOAT 1
|
|
||||||
#define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2
|
|
||||||
#define BRW_DEPTHFORMAT_D16_UNORM 5
|
|
||||||
|
|
||||||
#define BRW_FLOATING_POINT_IEEE_754 0
|
|
||||||
#define BRW_FLOATING_POINT_NON_IEEE_754 1
|
|
||||||
|
|
||||||
#define BRW_FRONTWINDING_CW 0
|
|
||||||
#define BRW_FRONTWINDING_CCW 1
|
|
||||||
|
|
||||||
#define BRW_SPRITE_POINT_ENABLE 16
|
|
||||||
|
|
||||||
#define BRW_INDEX_BYTE 0
|
|
||||||
#define BRW_INDEX_WORD 1
|
|
||||||
#define BRW_INDEX_DWORD 2
|
|
||||||
|
|
||||||
#define BRW_LOGICOPFUNCTION_CLEAR 0
|
|
||||||
#define BRW_LOGICOPFUNCTION_NOR 1
|
|
||||||
#define BRW_LOGICOPFUNCTION_AND_INVERTED 2
|
|
||||||
#define BRW_LOGICOPFUNCTION_COPY_INVERTED 3
|
|
||||||
#define BRW_LOGICOPFUNCTION_AND_REVERSE 4
|
|
||||||
#define BRW_LOGICOPFUNCTION_INVERT 5
|
|
||||||
#define BRW_LOGICOPFUNCTION_XOR 6
|
|
||||||
#define BRW_LOGICOPFUNCTION_NAND 7
|
|
||||||
#define BRW_LOGICOPFUNCTION_AND 8
|
|
||||||
#define BRW_LOGICOPFUNCTION_EQUIV 9
|
|
||||||
#define BRW_LOGICOPFUNCTION_NOOP 10
|
|
||||||
#define BRW_LOGICOPFUNCTION_OR_INVERTED 11
|
|
||||||
#define BRW_LOGICOPFUNCTION_COPY 12
|
|
||||||
#define BRW_LOGICOPFUNCTION_OR_REVERSE 13
|
|
||||||
#define BRW_LOGICOPFUNCTION_OR 14
|
|
||||||
#define BRW_LOGICOPFUNCTION_SET 15
|
|
||||||
|
|
||||||
#define BRW_MAPFILTER_NEAREST 0x0
|
|
||||||
#define BRW_MAPFILTER_LINEAR 0x1
|
|
||||||
#define BRW_MAPFILTER_ANISOTROPIC 0x2
|
|
||||||
|
|
||||||
#define BRW_MIPFILTER_NONE 0
|
|
||||||
#define BRW_MIPFILTER_NEAREST 1
|
|
||||||
#define BRW_MIPFILTER_LINEAR 3
|
|
||||||
|
|
||||||
#define BRW_POLYGON_FRONT_FACING 0
|
|
||||||
#define BRW_POLYGON_BACK_FACING 1
|
|
||||||
|
|
||||||
#define BRW_PREFILTER_ALWAYS 0x0
|
|
||||||
#define BRW_PREFILTER_NEVER 0x1
|
|
||||||
#define BRW_PREFILTER_LESS 0x2
|
|
||||||
#define BRW_PREFILTER_EQUAL 0x3
|
|
||||||
#define BRW_PREFILTER_LEQUAL 0x4
|
|
||||||
#define BRW_PREFILTER_GREATER 0x5
|
|
||||||
#define BRW_PREFILTER_NOTEQUAL 0x6
|
|
||||||
#define BRW_PREFILTER_GEQUAL 0x7
|
|
||||||
|
|
||||||
#define BRW_PROVOKING_VERTEX_0 0
|
|
||||||
#define BRW_PROVOKING_VERTEX_1 1
|
|
||||||
#define BRW_PROVOKING_VERTEX_2 2
|
|
||||||
|
|
||||||
#define BRW_RASTRULE_UPPER_LEFT 0
|
|
||||||
#define BRW_RASTRULE_UPPER_RIGHT 1
|
|
||||||
/* These are listed as "Reserved, but not seen as useful"
|
|
||||||
* in Intel documentation (page 212, "Point Rasterization Rule",
|
|
||||||
* section 7.4 "SF Pipeline State Summary", of document
|
|
||||||
* "Intel® 965 Express Chipset Family and Intel® G35 Express
|
|
||||||
* Chipset Graphics Controller Programmer's Reference Manual,
|
|
||||||
* Volume 2: 3D/Media", Revision 1.0b as of January 2008,
|
|
||||||
* available at
|
|
||||||
* http://intellinuxgraphics.org/documentation.html
|
|
||||||
* at the time of this writing).
|
|
||||||
*
|
|
||||||
* These appear to be supported on at least some
|
|
||||||
* i965-family devices, and the BRW_RASTRULE_LOWER_RIGHT
|
|
||||||
* is useful when using OpenGL to render to a FBO
|
|
||||||
* (which has the pixel coordinate Y orientation inverted
|
|
||||||
* with respect to the normal OpenGL pixel coordinate system).
|
|
||||||
*/
|
|
||||||
#define BRW_RASTRULE_LOWER_LEFT 2
|
|
||||||
#define BRW_RASTRULE_LOWER_RIGHT 3
|
|
||||||
|
|
||||||
#define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0
|
|
||||||
#define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1
|
|
||||||
#define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2
|
|
||||||
|
|
||||||
#define BRW_STENCILOP_KEEP 0
|
|
||||||
#define BRW_STENCILOP_ZERO 1
|
|
||||||
#define BRW_STENCILOP_REPLACE 2
|
|
||||||
#define BRW_STENCILOP_INCRSAT 3
|
|
||||||
#define BRW_STENCILOP_DECRSAT 4
|
|
||||||
#define BRW_STENCILOP_INCR 5
|
|
||||||
#define BRW_STENCILOP_DECR 6
|
|
||||||
#define BRW_STENCILOP_INVERT 7
|
|
||||||
|
|
||||||
#define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0
|
|
||||||
#define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1
|
|
||||||
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004
|
|
||||||
#define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_SINT 0x086
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_UINT 0x087
|
|
||||||
#define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088
|
|
||||||
#define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089
|
|
||||||
#define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C
|
|
||||||
#define BRW_SURFACEFORMAT_R64_FLOAT 0x08D
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F
|
|
||||||
#define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090
|
|
||||||
#define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091
|
|
||||||
#define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095
|
|
||||||
#define BRW_SURFACEFORMAT_R32G32_USCALED 0x096
|
|
||||||
#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0
|
|
||||||
#define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1
|
|
||||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2
|
|
||||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3
|
|
||||||
#define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4
|
|
||||||
#define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0
|
|
||||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1
|
|
||||||
#define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2
|
|
||||||
#define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3
|
|
||||||
#define BRW_SURFACEFORMAT_R32_SINT 0x0D6
|
|
||||||
#define BRW_SURFACEFORMAT_R32_UINT 0x0D7
|
|
||||||
#define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8
|
|
||||||
#define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9
|
|
||||||
#define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA
|
|
||||||
#define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF
|
|
||||||
#define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0
|
|
||||||
#define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1
|
|
||||||
#define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2
|
|
||||||
#define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3
|
|
||||||
#define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4
|
|
||||||
#define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5
|
|
||||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9
|
|
||||||
#define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC
|
|
||||||
#define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED
|
|
||||||
#define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE
|
|
||||||
#define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0
|
|
||||||
#define BRW_SURFACEFORMAT_R32_UNORM 0x0F1
|
|
||||||
#define BRW_SURFACEFORMAT_R32_SNORM 0x0F2
|
|
||||||
#define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7
|
|
||||||
#define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8
|
|
||||||
#define BRW_SURFACEFORMAT_R32_USCALED 0x0F9
|
|
||||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100
|
|
||||||
#define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101
|
|
||||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102
|
|
||||||
#define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103
|
|
||||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104
|
|
||||||
#define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_UNORM 0x106
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_SNORM 0x107
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_SINT 0x108
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_UINT 0x109
|
|
||||||
#define BRW_SURFACEFORMAT_R16_UNORM 0x10A
|
|
||||||
#define BRW_SURFACEFORMAT_R16_SNORM 0x10B
|
|
||||||
#define BRW_SURFACEFORMAT_R16_SINT 0x10C
|
|
||||||
#define BRW_SURFACEFORMAT_R16_UINT 0x10D
|
|
||||||
#define BRW_SURFACEFORMAT_R16_FLOAT 0x10E
|
|
||||||
#define BRW_SURFACEFORMAT_I16_UNORM 0x111
|
|
||||||
#define BRW_SURFACEFORMAT_L16_UNORM 0x112
|
|
||||||
#define BRW_SURFACEFORMAT_A16_UNORM 0x113
|
|
||||||
#define BRW_SURFACEFORMAT_L8A8_UNORM 0x114
|
|
||||||
#define BRW_SURFACEFORMAT_I16_FLOAT 0x115
|
|
||||||
#define BRW_SURFACEFORMAT_L16_FLOAT 0x116
|
|
||||||
#define BRW_SURFACEFORMAT_A16_FLOAT 0x117
|
|
||||||
#define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119
|
|
||||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A
|
|
||||||
#define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D
|
|
||||||
#define BRW_SURFACEFORMAT_R16_SSCALED 0x11E
|
|
||||||
#define BRW_SURFACEFORMAT_R16_USCALED 0x11F
|
|
||||||
#define BRW_SURFACEFORMAT_R8_UNORM 0x140
|
|
||||||
#define BRW_SURFACEFORMAT_R8_SNORM 0x141
|
|
||||||
#define BRW_SURFACEFORMAT_R8_SINT 0x142
|
|
||||||
#define BRW_SURFACEFORMAT_R8_UINT 0x143
|
|
||||||
#define BRW_SURFACEFORMAT_A8_UNORM 0x144
|
|
||||||
#define BRW_SURFACEFORMAT_I8_UNORM 0x145
|
|
||||||
#define BRW_SURFACEFORMAT_L8_UNORM 0x146
|
|
||||||
#define BRW_SURFACEFORMAT_P4A4_UNORM 0x147
|
|
||||||
#define BRW_SURFACEFORMAT_A4P4_UNORM 0x148
|
|
||||||
#define BRW_SURFACEFORMAT_R8_SSCALED 0x149
|
|
||||||
#define BRW_SURFACEFORMAT_R8_USCALED 0x14A
|
|
||||||
#define BRW_SURFACEFORMAT_R1_UINT 0x181
|
|
||||||
#define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182
|
|
||||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183
|
|
||||||
#define BRW_SURFACEFORMAT_BC1_UNORM 0x186
|
|
||||||
#define BRW_SURFACEFORMAT_BC2_UNORM 0x187
|
|
||||||
#define BRW_SURFACEFORMAT_BC3_UNORM 0x188
|
|
||||||
#define BRW_SURFACEFORMAT_BC4_UNORM 0x189
|
|
||||||
#define BRW_SURFACEFORMAT_BC5_UNORM 0x18A
|
|
||||||
#define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B
|
|
||||||
#define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C
|
|
||||||
#define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D
|
|
||||||
#define BRW_SURFACEFORMAT_MONO8 0x18E
|
|
||||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F
|
|
||||||
#define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190
|
|
||||||
#define BRW_SURFACEFORMAT_DXT1_RGB 0x191
|
|
||||||
#define BRW_SURFACEFORMAT_FXT1 0x192
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195
|
|
||||||
#define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196
|
|
||||||
#define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197
|
|
||||||
#define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198
|
|
||||||
#define BRW_SURFACEFORMAT_BC4_SNORM 0x199
|
|
||||||
#define BRW_SURFACEFORMAT_BC5_SNORM 0x19A
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E
|
|
||||||
#define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F
|
|
||||||
|
|
||||||
#define BRW_SURFACERETURNFORMAT_FLOAT32 0
|
|
||||||
#define BRW_SURFACERETURNFORMAT_S1 1
|
|
||||||
|
|
||||||
#define BRW_SURFACE_1D 0
|
|
||||||
#define BRW_SURFACE_2D 1
|
|
||||||
#define BRW_SURFACE_3D 2
|
|
||||||
#define BRW_SURFACE_CUBE 3
|
|
||||||
#define BRW_SURFACE_BUFFER 4
|
|
||||||
#define BRW_SURFACE_NULL 7
|
|
||||||
|
|
||||||
#define BRW_TEXCOORDMODE_WRAP 0
|
|
||||||
#define BRW_TEXCOORDMODE_MIRROR 1
|
|
||||||
#define BRW_TEXCOORDMODE_CLAMP 2
|
|
||||||
#define BRW_TEXCOORDMODE_CUBE 3
|
|
||||||
#define BRW_TEXCOORDMODE_CLAMP_BORDER 4
|
|
||||||
#define BRW_TEXCOORDMODE_MIRROR_ONCE 5
|
|
||||||
|
|
||||||
#define BRW_THREAD_PRIORITY_NORMAL 0
|
|
||||||
#define BRW_THREAD_PRIORITY_HIGH 1
|
|
||||||
|
|
||||||
#define BRW_TILEWALK_XMAJOR 0
|
|
||||||
#define BRW_TILEWALK_YMAJOR 1
|
|
||||||
|
|
||||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0
|
|
||||||
#define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1
|
|
||||||
|
|
||||||
#define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0
|
|
||||||
#define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1
|
|
||||||
|
|
||||||
#define BRW_VFCOMPONENT_NOSTORE 0
|
|
||||||
#define BRW_VFCOMPONENT_STORE_SRC 1
|
|
||||||
#define BRW_VFCOMPONENT_STORE_0 2
|
|
||||||
#define BRW_VFCOMPONENT_STORE_1_FLT 3
|
|
||||||
#define BRW_VFCOMPONENT_STORE_1_INT 4
|
|
||||||
#define BRW_VFCOMPONENT_STORE_VID 5
|
|
||||||
#define BRW_VFCOMPONENT_STORE_IID 6
|
|
||||||
#define BRW_VFCOMPONENT_STORE_PID 7
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Execution Unit (EU) defines
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define BRW_ALIGN_1 0
|
|
||||||
#define BRW_ALIGN_16 1
|
|
||||||
|
|
||||||
#define BRW_ADDRESS_DIRECT 0
|
|
||||||
#define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1
|
|
||||||
|
|
||||||
#define BRW_CHANNEL_X 0
|
|
||||||
#define BRW_CHANNEL_Y 1
|
|
||||||
#define BRW_CHANNEL_Z 2
|
|
||||||
#define BRW_CHANNEL_W 3
|
|
||||||
|
|
||||||
#define BRW_COMPRESSION_NONE 0
|
|
||||||
#define BRW_COMPRESSION_2NDHALF 1
|
|
||||||
#define BRW_COMPRESSION_COMPRESSED 2
|
|
||||||
|
|
||||||
#define BRW_CONDITIONAL_NONE 0
|
|
||||||
#define BRW_CONDITIONAL_Z 1
|
|
||||||
#define BRW_CONDITIONAL_NZ 2
|
|
||||||
#define BRW_CONDITIONAL_EQ 1 /* Z */
|
|
||||||
#define BRW_CONDITIONAL_NEQ 2 /* NZ */
|
|
||||||
#define BRW_CONDITIONAL_G 3
|
|
||||||
#define BRW_CONDITIONAL_GE 4
|
|
||||||
#define BRW_CONDITIONAL_L 5
|
|
||||||
#define BRW_CONDITIONAL_LE 6
|
|
||||||
#define BRW_CONDITIONAL_C 7
|
|
||||||
#define BRW_CONDITIONAL_O 8
|
|
||||||
|
|
||||||
#define BRW_DEBUG_NONE 0
|
|
||||||
#define BRW_DEBUG_BREAKPOINT 1
|
|
||||||
|
|
||||||
#define BRW_DEPENDENCY_NORMAL 0
|
|
||||||
#define BRW_DEPENDENCY_NOTCLEARED 1
|
|
||||||
#define BRW_DEPENDENCY_NOTCHECKED 2
|
|
||||||
#define BRW_DEPENDENCY_DISABLE 3
|
|
||||||
|
|
||||||
#define BRW_EXECUTE_1 0
|
|
||||||
#define BRW_EXECUTE_2 1
|
|
||||||
#define BRW_EXECUTE_4 2
|
|
||||||
#define BRW_EXECUTE_8 3
|
|
||||||
#define BRW_EXECUTE_16 4
|
|
||||||
#define BRW_EXECUTE_32 5
|
|
||||||
|
|
||||||
#define BRW_HORIZONTAL_STRIDE_0 0
|
|
||||||
#define BRW_HORIZONTAL_STRIDE_1 1
|
|
||||||
#define BRW_HORIZONTAL_STRIDE_2 2
|
|
||||||
#define BRW_HORIZONTAL_STRIDE_4 3
|
|
||||||
|
|
||||||
#define BRW_INSTRUCTION_NORMAL 0
|
|
||||||
#define BRW_INSTRUCTION_SATURATE 1
|
|
||||||
|
|
||||||
#define BRW_MASK_ENABLE 0
|
|
||||||
#define BRW_MASK_DISABLE 1
|
|
||||||
|
|
||||||
#define BRW_OPCODE_MOV 1
|
|
||||||
#define BRW_OPCODE_SEL 2
|
|
||||||
#define BRW_OPCODE_NOT 4
|
|
||||||
#define BRW_OPCODE_AND 5
|
|
||||||
#define BRW_OPCODE_OR 6
|
|
||||||
#define BRW_OPCODE_XOR 7
|
|
||||||
#define BRW_OPCODE_SHR 8
|
|
||||||
#define BRW_OPCODE_SHL 9
|
|
||||||
#define BRW_OPCODE_RSR 10
|
|
||||||
#define BRW_OPCODE_RSL 11
|
|
||||||
#define BRW_OPCODE_ASR 12
|
|
||||||
#define BRW_OPCODE_CMP 16
|
|
||||||
#define BRW_OPCODE_JMPI 32
|
|
||||||
#define BRW_OPCODE_IF 34
|
|
||||||
#define BRW_OPCODE_IFF 35
|
|
||||||
#define BRW_OPCODE_ELSE 36
|
|
||||||
#define BRW_OPCODE_ENDIF 37
|
|
||||||
#define BRW_OPCODE_DO 38
|
|
||||||
#define BRW_OPCODE_WHILE 39
|
|
||||||
#define BRW_OPCODE_BREAK 40
|
|
||||||
#define BRW_OPCODE_CONTINUE 41
|
|
||||||
#define BRW_OPCODE_HALT 42
|
|
||||||
#define BRW_OPCODE_MSAVE 44
|
|
||||||
#define BRW_OPCODE_MRESTORE 45
|
|
||||||
#define BRW_OPCODE_PUSH 46
|
|
||||||
#define BRW_OPCODE_POP 47
|
|
||||||
#define BRW_OPCODE_WAIT 48
|
|
||||||
#define BRW_OPCODE_SEND 49
|
|
||||||
#define BRW_OPCODE_ADD 64
|
|
||||||
#define BRW_OPCODE_MUL 65
|
|
||||||
#define BRW_OPCODE_AVG 66
|
|
||||||
#define BRW_OPCODE_FRC 67
|
|
||||||
#define BRW_OPCODE_RNDU 68
|
|
||||||
#define BRW_OPCODE_RNDD 69
|
|
||||||
#define BRW_OPCODE_RNDE 70
|
|
||||||
#define BRW_OPCODE_RNDZ 71
|
|
||||||
#define BRW_OPCODE_MAC 72
|
|
||||||
#define BRW_OPCODE_MACH 73
|
|
||||||
#define BRW_OPCODE_LZD 74
|
|
||||||
#define BRW_OPCODE_SAD2 80
|
|
||||||
#define BRW_OPCODE_SADA2 81
|
|
||||||
#define BRW_OPCODE_DP4 84
|
|
||||||
#define BRW_OPCODE_DPH 85
|
|
||||||
#define BRW_OPCODE_DP3 86
|
|
||||||
#define BRW_OPCODE_DP2 87
|
|
||||||
#define BRW_OPCODE_DPA2 88
|
|
||||||
#define BRW_OPCODE_LINE 89
|
|
||||||
#define BRW_OPCODE_NOP 126
|
|
||||||
|
|
||||||
#define BRW_PREDICATE_NONE 0
|
|
||||||
#define BRW_PREDICATE_NORMAL 1
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ANYV 2
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ALLV 3
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ANY2H 4
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ALL2H 5
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ANY4H 6
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ALL4H 7
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ANY8H 8
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ALL8H 9
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ANY16H 10
|
|
||||||
#define BRW_PREDICATE_ALIGN1_ALL16H 11
|
|
||||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_X 2
|
|
||||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3
|
|
||||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4
|
|
||||||
#define BRW_PREDICATE_ALIGN16_REPLICATE_W 5
|
|
||||||
#define BRW_PREDICATE_ALIGN16_ANY4H 6
|
|
||||||
#define BRW_PREDICATE_ALIGN16_ALL4H 7
|
|
||||||
|
|
||||||
#define BRW_ARCHITECTURE_REGISTER_FILE 0
|
|
||||||
#define BRW_GENERAL_REGISTER_FILE 1
|
|
||||||
#define BRW_MESSAGE_REGISTER_FILE 2
|
|
||||||
#define BRW_IMMEDIATE_VALUE 3
|
|
||||||
|
|
||||||
#define BRW_REGISTER_TYPE_UD 0
|
|
||||||
#define BRW_REGISTER_TYPE_D 1
|
|
||||||
#define BRW_REGISTER_TYPE_UW 2
|
|
||||||
#define BRW_REGISTER_TYPE_W 3
|
|
||||||
#define BRW_REGISTER_TYPE_UB 4
|
|
||||||
#define BRW_REGISTER_TYPE_B 5
|
|
||||||
#define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */
|
|
||||||
#define BRW_REGISTER_TYPE_HF 6
|
|
||||||
#define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */
|
|
||||||
#define BRW_REGISTER_TYPE_F 7
|
|
||||||
|
|
||||||
#define BRW_ARF_NULL 0x00
|
|
||||||
#define BRW_ARF_ADDRESS 0x10
|
|
||||||
#define BRW_ARF_ACCUMULATOR 0x20
|
|
||||||
#define BRW_ARF_FLAG 0x30
|
|
||||||
#define BRW_ARF_MASK 0x40
|
|
||||||
#define BRW_ARF_MASK_STACK 0x50
|
|
||||||
#define BRW_ARF_MASK_STACK_DEPTH 0x60
|
|
||||||
#define BRW_ARF_STATE 0x70
|
|
||||||
#define BRW_ARF_CONTROL 0x80
|
|
||||||
#define BRW_ARF_NOTIFICATION_COUNT 0x90
|
|
||||||
#define BRW_ARF_IP 0xA0
|
|
||||||
|
|
||||||
#define BRW_AMASK 0
|
|
||||||
#define BRW_IMASK 1
|
|
||||||
#define BRW_LMASK 2
|
|
||||||
#define BRW_CMASK 3
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define BRW_THREAD_NORMAL 0
|
|
||||||
#define BRW_THREAD_ATOMIC 1
|
|
||||||
#define BRW_THREAD_SWITCH 2
|
|
||||||
|
|
||||||
#define BRW_VERTICAL_STRIDE_0 0
|
|
||||||
#define BRW_VERTICAL_STRIDE_1 1
|
|
||||||
#define BRW_VERTICAL_STRIDE_2 2
|
|
||||||
#define BRW_VERTICAL_STRIDE_4 3
|
|
||||||
#define BRW_VERTICAL_STRIDE_8 4
|
|
||||||
#define BRW_VERTICAL_STRIDE_16 5
|
|
||||||
#define BRW_VERTICAL_STRIDE_32 6
|
|
||||||
#define BRW_VERTICAL_STRIDE_64 7
|
|
||||||
#define BRW_VERTICAL_STRIDE_128 8
|
|
||||||
#define BRW_VERTICAL_STRIDE_256 9
|
|
||||||
#define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF
|
|
||||||
|
|
||||||
#define BRW_WIDTH_1 0
|
|
||||||
#define BRW_WIDTH_2 1
|
|
||||||
#define BRW_WIDTH_4 2
|
|
||||||
#define BRW_WIDTH_8 3
|
|
||||||
#define BRW_WIDTH_16 4
|
|
||||||
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1K 0
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2K 1
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_4K 2
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_8K 3
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_16K 4
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_32K 5
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_64K 6
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_128K 7
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_256K 8
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_512K 9
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_1M 10
|
|
||||||
#define BRW_STATELESS_BUFFER_BOUNDARY_2M 11
|
|
||||||
|
|
||||||
#define BRW_POLYGON_FACING_FRONT 0
|
|
||||||
#define BRW_POLYGON_FACING_BACK 1
|
|
||||||
|
|
||||||
#define BRW_MESSAGE_TARGET_NULL 0
|
|
||||||
#define BRW_MESSAGE_TARGET_MATH 1
|
|
||||||
#define BRW_MESSAGE_TARGET_SAMPLER 2
|
|
||||||
#define BRW_MESSAGE_TARGET_GATEWAY 3
|
|
||||||
#define BRW_MESSAGE_TARGET_DATAPORT_READ 4
|
|
||||||
#define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5
|
|
||||||
#define BRW_MESSAGE_TARGET_URB 6
|
|
||||||
#define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7
|
|
||||||
|
|
||||||
#define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0
|
|
||||||
#define BRW_SAMPLER_RETURN_FORMAT_UINT32 2
|
|
||||||
#define BRW_SAMPLER_RETURN_FORMAT_SINT32 3
|
|
||||||
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD8_LD 3
|
|
||||||
#define BRW_SAMPLER_MESSAGE_SIMD16_LD 3
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0
|
|
||||||
#define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1
|
|
||||||
#define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2
|
|
||||||
#define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3
|
|
||||||
#define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0
|
|
||||||
#define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2
|
|
||||||
#define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0
|
|
||||||
#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1
|
|
||||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2
|
|
||||||
#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0
|
|
||||||
#define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1
|
|
||||||
#define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0
|
|
||||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1
|
|
||||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2
|
|
||||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3
|
|
||||||
#define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4
|
|
||||||
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5
|
|
||||||
#define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7
|
|
||||||
|
|
||||||
#define BRW_MATH_FUNCTION_INV 1
|
|
||||||
#define BRW_MATH_FUNCTION_LOG 2
|
|
||||||
#define BRW_MATH_FUNCTION_EXP 3
|
|
||||||
#define BRW_MATH_FUNCTION_SQRT 4
|
|
||||||
#define BRW_MATH_FUNCTION_RSQ 5
|
|
||||||
#define BRW_MATH_FUNCTION_SIN 6 /* was 7 */
|
|
||||||
#define BRW_MATH_FUNCTION_COS 7 /* was 8 */
|
|
||||||
#define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */
|
|
||||||
#define BRW_MATH_FUNCTION_TAN 9
|
|
||||||
#define BRW_MATH_FUNCTION_POW 10
|
|
||||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11
|
|
||||||
#define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12
|
|
||||||
#define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13
|
|
||||||
|
|
||||||
#define BRW_MATH_INTEGER_UNSIGNED 0
|
|
||||||
#define BRW_MATH_INTEGER_SIGNED 1
|
|
||||||
|
|
||||||
#define BRW_MATH_PRECISION_FULL 0
|
|
||||||
#define BRW_MATH_PRECISION_PARTIAL 1
|
|
||||||
|
|
||||||
#define BRW_MATH_SATURATE_NONE 0
|
|
||||||
#define BRW_MATH_SATURATE_SATURATE 1
|
|
||||||
|
|
||||||
#define BRW_MATH_DATA_VECTOR 0
|
|
||||||
#define BRW_MATH_DATA_SCALAR 1
|
|
||||||
|
|
||||||
#define BRW_URB_OPCODE_WRITE 0
|
|
||||||
|
|
||||||
#define BRW_URB_SWIZZLE_NONE 0
|
|
||||||
#define BRW_URB_SWIZZLE_INTERLEAVE 1
|
|
||||||
#define BRW_URB_SWIZZLE_TRANSPOSE 2
|
|
||||||
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_1K 0
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_2K 1
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_4K 2
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_8K 3
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_16K 4
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_32K 5
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_64K 6
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_128K 7
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_256K 8
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_512K 9
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_1M 10
|
|
||||||
#define BRW_SCRATCH_SPACE_SIZE_2M 11
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define CMD_URB_FENCE 0x6000
|
|
||||||
#define CMD_CONST_BUFFER_STATE 0x6001
|
|
||||||
#define CMD_CONST_BUFFER 0x6002
|
|
||||||
|
|
||||||
#define CMD_STATE_BASE_ADDRESS 0x6101
|
|
||||||
#define CMD_STATE_INSN_POINTER 0x6102
|
|
||||||
#define CMD_PIPELINE_SELECT 0x6104
|
|
||||||
|
|
||||||
#define CMD_PIPELINED_STATE_POINTERS 0x7800
|
|
||||||
#define CMD_BINDING_TABLE_PTRS 0x7801
|
|
||||||
#define CMD_VERTEX_BUFFER 0x7808
|
|
||||||
#define CMD_VERTEX_ELEMENT 0x7809
|
|
||||||
#define CMD_INDEX_BUFFER 0x780a
|
|
||||||
#define CMD_VF_STATISTICS 0x780b
|
|
||||||
|
|
||||||
#define CMD_DRAW_RECT 0x7900
|
|
||||||
#define CMD_BLEND_CONSTANT_COLOR 0x7901
|
|
||||||
#define CMD_CHROMA_KEY 0x7904
|
|
||||||
#define CMD_DEPTH_BUFFER 0x7905
|
|
||||||
#define CMD_POLY_STIPPLE_OFFSET 0x7906
|
|
||||||
#define CMD_POLY_STIPPLE_PATTERN 0x7907
|
|
||||||
#define CMD_LINE_STIPPLE_PATTERN 0x7908
|
|
||||||
#define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7909
|
|
||||||
|
|
||||||
#define CMD_PIPE_CONTROL 0x7a00
|
|
||||||
|
|
||||||
#define CMD_3D_PRIM 0x7b00
|
|
||||||
|
|
||||||
#define CMD_MI_FLUSH 0x0200
|
|
||||||
|
|
||||||
|
|
||||||
/* Various values from the R0 vertex header:
|
|
||||||
*/
|
|
||||||
#define R02_PRIM_END 0x1
|
|
||||||
#define R02_PRIM_START 0x2
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,226 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
#include <stdlib.h>
|
|
||||||
|
|
||||||
#include "brw_batch.h"
|
|
||||||
#include "brw_draw.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
|
|
||||||
#include "pipe/p_context.h"
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
#include "util/u_prim.h"
|
|
||||||
|
|
||||||
static unsigned hw_prim[PIPE_PRIM_POLYGON+1] = {
|
|
||||||
_3DPRIM_POINTLIST,
|
|
||||||
_3DPRIM_LINELIST,
|
|
||||||
_3DPRIM_LINELOOP,
|
|
||||||
_3DPRIM_LINESTRIP,
|
|
||||||
_3DPRIM_TRILIST,
|
|
||||||
_3DPRIM_TRISTRIP,
|
|
||||||
_3DPRIM_TRIFAN,
|
|
||||||
_3DPRIM_QUADLIST,
|
|
||||||
_3DPRIM_QUADSTRIP,
|
|
||||||
_3DPRIM_POLYGON
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/* When the primitive changes, set a state bit and re-validate. Not
|
|
||||||
* the nicest and would rather deal with this by having all the
|
|
||||||
* programs be immune to the active primitive (ie. cope with all
|
|
||||||
* possibilities). That may not be realistic however.
|
|
||||||
*/
|
|
||||||
static void brw_set_prim(struct brw_context *brw, int prim)
|
|
||||||
{
|
|
||||||
PRINT("PRIM: %d\n", prim);
|
|
||||||
|
|
||||||
/* Slight optimization to avoid the GS program when not needed:
|
|
||||||
*/
|
|
||||||
if (prim == PIPE_PRIM_QUAD_STRIP &&
|
|
||||||
brw->attribs.Raster->flatshade &&
|
|
||||||
brw->attribs.Raster->fill_cw == PIPE_POLYGON_MODE_FILL &&
|
|
||||||
brw->attribs.Raster->fill_ccw == PIPE_POLYGON_MODE_FILL)
|
|
||||||
prim = PIPE_PRIM_TRIANGLE_STRIP;
|
|
||||||
|
|
||||||
if (prim != brw->primitive) {
|
|
||||||
brw->primitive = prim;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_PRIMITIVE;
|
|
||||||
|
|
||||||
if (u_reduced_prim(prim) != brw->reduced_primitive) {
|
|
||||||
brw->reduced_primitive = u_reduced_prim(prim);
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_REDUCED_PRIMITIVE;
|
|
||||||
}
|
|
||||||
|
|
||||||
brw_validate_state(brw);
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static unsigned trim(int prim, unsigned length)
|
|
||||||
{
|
|
||||||
if (prim == PIPE_PRIM_QUAD_STRIP)
|
|
||||||
return length > 3 ? (length - length % 2) : 0;
|
|
||||||
else if (prim == PIPE_PRIM_QUADS)
|
|
||||||
return length - length % 4;
|
|
||||||
else
|
|
||||||
return length;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static boolean brw_emit_prim( struct brw_context *brw,
|
|
||||||
boolean indexed,
|
|
||||||
unsigned start,
|
|
||||||
unsigned count )
|
|
||||||
|
|
||||||
{
|
|
||||||
struct brw_3d_primitive prim_packet;
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_PRIMS)
|
|
||||||
PRINT("PRIM: %d %d %d\n", brw->primitive, start, count);
|
|
||||||
|
|
||||||
prim_packet.header.opcode = CMD_3D_PRIM;
|
|
||||||
prim_packet.header.length = sizeof(prim_packet)/4 - 2;
|
|
||||||
prim_packet.header.pad = 0;
|
|
||||||
prim_packet.header.topology = hw_prim[brw->primitive];
|
|
||||||
prim_packet.header.indexed = indexed;
|
|
||||||
|
|
||||||
prim_packet.verts_per_instance = trim(brw->primitive, count);
|
|
||||||
prim_packet.start_vert_location = start;
|
|
||||||
prim_packet.instance_count = 1;
|
|
||||||
prim_packet.start_instance_location = 0;
|
|
||||||
prim_packet.base_vert_location = 0;
|
|
||||||
|
|
||||||
if (prim_packet.verts_per_instance == 0)
|
|
||||||
return TRUE;
|
|
||||||
|
|
||||||
return brw_batchbuffer_data( brw->winsys,
|
|
||||||
&prim_packet,
|
|
||||||
sizeof(prim_packet) );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* May fail if out of video memory for texture or vbo upload, or on
|
|
||||||
* fallback conditions.
|
|
||||||
*/
|
|
||||||
static boolean brw_try_draw_elements( struct pipe_context *pipe,
|
|
||||||
struct pipe_buffer *index_buffer,
|
|
||||||
unsigned index_size,
|
|
||||||
unsigned mode,
|
|
||||||
unsigned start,
|
|
||||||
unsigned count )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
/* Set the first primitive ahead of validate_state:
|
|
||||||
*/
|
|
||||||
brw_set_prim(brw, mode);
|
|
||||||
|
|
||||||
/* Upload index, vertex data:
|
|
||||||
*/
|
|
||||||
if (index_buffer &&
|
|
||||||
!brw_upload_indices( brw, index_buffer, index_size, start, count ))
|
|
||||||
return FALSE;
|
|
||||||
|
|
||||||
if (!brw_upload_vertex_buffers(brw))
|
|
||||||
return FALSE;
|
|
||||||
|
|
||||||
if (!brw_upload_vertex_elements( brw ))
|
|
||||||
return FALSE;
|
|
||||||
|
|
||||||
/* XXX: Need to separate validate and upload of state.
|
|
||||||
*/
|
|
||||||
if (brw->state.dirty.brw)
|
|
||||||
brw_validate_state( brw );
|
|
||||||
|
|
||||||
if (!brw_emit_prim(brw, index_buffer != NULL,
|
|
||||||
start, count))
|
|
||||||
return FALSE;
|
|
||||||
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static boolean brw_draw_elements( struct pipe_context *pipe,
|
|
||||||
struct pipe_buffer *indexBuffer,
|
|
||||||
unsigned indexSize,
|
|
||||||
unsigned mode,
|
|
||||||
unsigned start,
|
|
||||||
unsigned count )
|
|
||||||
{
|
|
||||||
if (!brw_try_draw_elements( pipe,
|
|
||||||
indexBuffer,
|
|
||||||
indexSize,
|
|
||||||
mode, start, count ))
|
|
||||||
{
|
|
||||||
/* flush ? */
|
|
||||||
|
|
||||||
if (!brw_try_draw_elements( pipe,
|
|
||||||
indexBuffer,
|
|
||||||
indexSize,
|
|
||||||
mode, start,
|
|
||||||
count )) {
|
|
||||||
assert(0);
|
|
||||||
return FALSE;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static boolean brw_draw_arrays( struct pipe_context *pipe,
|
|
||||||
unsigned mode,
|
|
||||||
unsigned start,
|
|
||||||
unsigned count )
|
|
||||||
{
|
|
||||||
if (!brw_try_draw_elements( pipe, NULL, 0, mode, start, count )) {
|
|
||||||
/* flush ? */
|
|
||||||
|
|
||||||
if (!brw_try_draw_elements( pipe, NULL, 0, mode, start, count )) {
|
|
||||||
assert(0);
|
|
||||||
return FALSE;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_init_draw_functions( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
brw->pipe.draw_arrays = brw_draw_arrays;
|
|
||||||
brw->pipe.draw_elements = brw_draw_elements;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
|
@ -1,55 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
#ifndef BRW_DRAW_H
|
|
||||||
#define BRW_DRAW_H
|
|
||||||
|
|
||||||
#include "pipe/p_context.h"
|
|
||||||
|
|
||||||
struct brw_context;
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_init_draw_functions( struct brw_context *brw );
|
|
||||||
|
|
||||||
|
|
||||||
boolean brw_upload_vertices( struct brw_context *brw,
|
|
||||||
unsigned min_index,
|
|
||||||
unsigned max_index );
|
|
||||||
|
|
||||||
boolean brw_upload_indices(struct brw_context *brw,
|
|
||||||
const struct pipe_buffer *index_buffer,
|
|
||||||
int ib_size, int start, int count);
|
|
||||||
|
|
||||||
boolean brw_upload_vertex_buffers( struct brw_context *brw );
|
|
||||||
boolean brw_upload_vertex_elements( struct brw_context *brw );
|
|
||||||
|
|
||||||
unsigned brw_translate_surface_format( unsigned id );
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,300 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
#include <stdlib.h>
|
|
||||||
|
|
||||||
#include "brw_batch.h"
|
|
||||||
#include "brw_draw.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_array_state {
|
|
||||||
union header_union header;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
union {
|
|
||||||
struct {
|
|
||||||
unsigned pitch:11;
|
|
||||||
unsigned pad:15;
|
|
||||||
unsigned access_type:1;
|
|
||||||
unsigned vb_index:5;
|
|
||||||
} bits;
|
|
||||||
unsigned dword;
|
|
||||||
} vb0;
|
|
||||||
|
|
||||||
struct pipe_buffer *buffer;
|
|
||||||
unsigned offset;
|
|
||||||
|
|
||||||
unsigned max_index;
|
|
||||||
unsigned instance_data_step_rate;
|
|
||||||
|
|
||||||
} vb[BRW_VBP_MAX];
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
unsigned brw_translate_surface_format( unsigned id )
|
|
||||||
{
|
|
||||||
switch (id) {
|
|
||||||
case PIPE_FORMAT_R64_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R64_FLOAT;
|
|
||||||
case PIPE_FORMAT_R64G64_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R64G64_FLOAT;
|
|
||||||
case PIPE_FORMAT_R64G64B64_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R64G64B64_FLOAT;
|
|
||||||
case PIPE_FORMAT_R64G64B64A64_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R32_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R32_FLOAT;
|
|
||||||
case PIPE_FORMAT_R32G32_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32_FLOAT;
|
|
||||||
case PIPE_FORMAT_R32G32B32_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32_FLOAT;
|
|
||||||
case PIPE_FORMAT_R32G32B32A32_FLOAT:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R32_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32_UNORM;
|
|
||||||
case PIPE_FORMAT_R32G32_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32_UNORM;
|
|
||||||
case PIPE_FORMAT_R32G32B32_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32_UNORM;
|
|
||||||
case PIPE_FORMAT_R32G32B32A32_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32A32_UNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R32_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32_USCALED;
|
|
||||||
case PIPE_FORMAT_R32G32_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32_USCALED;
|
|
||||||
case PIPE_FORMAT_R32G32B32_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32_USCALED;
|
|
||||||
case PIPE_FORMAT_R32G32B32A32_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32A32_USCALED;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R32_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32_SNORM;
|
|
||||||
case PIPE_FORMAT_R32G32_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32_SNORM;
|
|
||||||
case PIPE_FORMAT_R32G32B32_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32_SNORM;
|
|
||||||
case PIPE_FORMAT_R32G32B32A32_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32A32_SNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R32_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32_SSCALED;
|
|
||||||
case PIPE_FORMAT_R32G32_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32_SSCALED;
|
|
||||||
case PIPE_FORMAT_R32G32B32_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32_SSCALED;
|
|
||||||
case PIPE_FORMAT_R32G32B32A32_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R16_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16_UNORM;
|
|
||||||
case PIPE_FORMAT_R16G16_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16_UNORM;
|
|
||||||
case PIPE_FORMAT_R16G16B16_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16_UNORM;
|
|
||||||
case PIPE_FORMAT_R16G16B16A16_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16A16_UNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R16_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16_USCALED;
|
|
||||||
case PIPE_FORMAT_R16G16_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16_USCALED;
|
|
||||||
case PIPE_FORMAT_R16G16B16_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16_USCALED;
|
|
||||||
case PIPE_FORMAT_R16G16B16A16_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16A16_USCALED;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R16_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16_SNORM;
|
|
||||||
case PIPE_FORMAT_R16G16_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16_SNORM;
|
|
||||||
case PIPE_FORMAT_R16G16B16_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16_SNORM;
|
|
||||||
case PIPE_FORMAT_R16G16B16A16_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16A16_SNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R16_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16_SSCALED;
|
|
||||||
case PIPE_FORMAT_R16G16_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16_SSCALED;
|
|
||||||
case PIPE_FORMAT_R16G16B16_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16_SSCALED;
|
|
||||||
case PIPE_FORMAT_R16G16B16A16_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R8_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8_UNORM;
|
|
||||||
case PIPE_FORMAT_R8G8_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8_UNORM;
|
|
||||||
case PIPE_FORMAT_R8G8B8_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8_UNORM;
|
|
||||||
case PIPE_FORMAT_R8G8B8A8_UNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R8_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8_USCALED;
|
|
||||||
case PIPE_FORMAT_R8G8_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8_USCALED;
|
|
||||||
case PIPE_FORMAT_R8G8B8_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8_USCALED;
|
|
||||||
case PIPE_FORMAT_R8G8B8A8_USCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8A8_USCALED;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R8_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8_SNORM;
|
|
||||||
case PIPE_FORMAT_R8G8_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8_SNORM;
|
|
||||||
case PIPE_FORMAT_R8G8B8_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8_SNORM;
|
|
||||||
case PIPE_FORMAT_R8G8B8A8_SNORM:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8A8_SNORM;
|
|
||||||
|
|
||||||
case PIPE_FORMAT_R8_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8_SSCALED;
|
|
||||||
case PIPE_FORMAT_R8G8_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8_SSCALED;
|
|
||||||
case PIPE_FORMAT_R8G8B8_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8_SSCALED;
|
|
||||||
case PIPE_FORMAT_R8G8B8A8_SSCALED:
|
|
||||||
return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED;
|
|
||||||
|
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned get_index_type(int type)
|
|
||||||
{
|
|
||||||
switch (type) {
|
|
||||||
case 1: return BRW_INDEX_BYTE;
|
|
||||||
case 2: return BRW_INDEX_WORD;
|
|
||||||
case 4: return BRW_INDEX_DWORD;
|
|
||||||
default: assert(0); return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
boolean brw_upload_vertex_buffers( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_array_state vbp;
|
|
||||||
unsigned nr_enabled = 0;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
memset(&vbp, 0, sizeof(vbp));
|
|
||||||
|
|
||||||
/* This is a hardware limit:
|
|
||||||
*/
|
|
||||||
|
|
||||||
for (i = 0; i < BRW_VEP_MAX; i++)
|
|
||||||
{
|
|
||||||
if (brw->vb.vbo_array[i] == NULL) {
|
|
||||||
nr_enabled = i;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
vbp.vb[i].vb0.bits.pitch = brw->vb.vbo_array[i]->stride;
|
|
||||||
vbp.vb[i].vb0.bits.pad = 0;
|
|
||||||
vbp.vb[i].vb0.bits.access_type = BRW_VERTEXBUFFER_ACCESS_VERTEXDATA;
|
|
||||||
vbp.vb[i].vb0.bits.vb_index = i;
|
|
||||||
vbp.vb[i].offset = brw->vb.vbo_array[i]->buffer_offset;
|
|
||||||
vbp.vb[i].buffer = brw->vb.vbo_array[i]->buffer;
|
|
||||||
vbp.vb[i].max_index = brw->vb.vbo_array[i]->max_index;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
vbp.header.bits.length = (1 + nr_enabled * 4) - 2;
|
|
||||||
vbp.header.bits.opcode = CMD_VERTEX_BUFFER;
|
|
||||||
|
|
||||||
BEGIN_BATCH(vbp.header.bits.length+2, 0);
|
|
||||||
OUT_BATCH( vbp.header.dword );
|
|
||||||
|
|
||||||
for (i = 0; i < nr_enabled; i++) {
|
|
||||||
OUT_BATCH( vbp.vb[i].vb0.dword );
|
|
||||||
OUT_RELOC( vbp.vb[i].buffer, PIPE_BUFFER_USAGE_GPU_READ,
|
|
||||||
vbp.vb[i].offset);
|
|
||||||
OUT_BATCH( vbp.vb[i].max_index );
|
|
||||||
OUT_BATCH( vbp.vb[i].instance_data_step_rate );
|
|
||||||
}
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
boolean brw_upload_vertex_elements( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_vertex_element_packet vep;
|
|
||||||
|
|
||||||
unsigned i;
|
|
||||||
unsigned nr_enabled = brw->attribs.VertexProgram->info.num_inputs;
|
|
||||||
|
|
||||||
memset(&vep, 0, sizeof(vep));
|
|
||||||
|
|
||||||
for (i = 0; i < nr_enabled; i++)
|
|
||||||
vep.ve[i] = brw->vb.inputs[i];
|
|
||||||
|
|
||||||
|
|
||||||
vep.header.length = (1 + nr_enabled * sizeof(vep.ve[0])/4) - 2;
|
|
||||||
vep.header.opcode = CMD_VERTEX_ELEMENT;
|
|
||||||
brw_cached_batch_struct(brw, &vep, 4 + nr_enabled * sizeof(vep.ve[0]));
|
|
||||||
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
||||||
|
|
||||||
boolean brw_upload_indices( struct brw_context *brw,
|
|
||||||
const struct pipe_buffer *index_buffer,
|
|
||||||
int ib_size, int start, int count)
|
|
||||||
{
|
|
||||||
/* Emit the indexbuffer packet:
|
|
||||||
*/
|
|
||||||
{
|
|
||||||
struct brw_indexbuffer ib;
|
|
||||||
|
|
||||||
memset(&ib, 0, sizeof(ib));
|
|
||||||
|
|
||||||
ib.header.bits.opcode = CMD_INDEX_BUFFER;
|
|
||||||
ib.header.bits.length = sizeof(ib)/4 - 2;
|
|
||||||
ib.header.bits.index_format = get_index_type(ib_size);
|
|
||||||
ib.header.bits.cut_index_enable = 0;
|
|
||||||
|
|
||||||
|
|
||||||
BEGIN_BATCH(4, 0);
|
|
||||||
OUT_BATCH( ib.header.dword );
|
|
||||||
OUT_RELOC( index_buffer, PIPE_BUFFER_USAGE_GPU_READ, start);
|
|
||||||
OUT_RELOC( index_buffer, PIPE_BUFFER_USAGE_GPU_READ, start + count);
|
|
||||||
OUT_BATCH( 0 );
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
return TRUE;
|
|
||||||
}
|
|
|
@ -1,130 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* How does predicate control work when execution_size != 8? Do I
|
|
||||||
* need to test/set for 0xffff when execution_size is 16?
|
|
||||||
*/
|
|
||||||
void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value )
|
|
||||||
{
|
|
||||||
p->current->header.predicate_control = BRW_PREDICATE_NONE;
|
|
||||||
|
|
||||||
if (value != 0xff) {
|
|
||||||
if (value != p->flag_value) {
|
|
||||||
brw_push_insn_state(p);
|
|
||||||
brw_MOV(p, brw_flag_reg(), brw_imm_uw(value));
|
|
||||||
p->flag_value = value;
|
|
||||||
brw_pop_insn_state(p);
|
|
||||||
}
|
|
||||||
|
|
||||||
p->current->header.predicate_control = BRW_PREDICATE_NORMAL;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_predicate_control( struct brw_compile *p, unsigned pc )
|
|
||||||
{
|
|
||||||
p->current->header.predicate_control = pc;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional )
|
|
||||||
{
|
|
||||||
p->current->header.destreg__conditonalmod = conditional;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_access_mode( struct brw_compile *p, unsigned access_mode )
|
|
||||||
{
|
|
||||||
p->current->header.access_mode = access_mode;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_compression_control( struct brw_compile *p, boolean compression_control )
|
|
||||||
{
|
|
||||||
p->current->header.compression_control = compression_control;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_mask_control( struct brw_compile *p, unsigned value )
|
|
||||||
{
|
|
||||||
p->current->header.mask_control = value;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_set_saturate( struct brw_compile *p, unsigned value )
|
|
||||||
{
|
|
||||||
p->current->header.saturate = value;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_push_insn_state( struct brw_compile *p )
|
|
||||||
{
|
|
||||||
assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]);
|
|
||||||
memcpy(p->current+1, p->current, sizeof(struct brw_instruction));
|
|
||||||
p->current++;
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_pop_insn_state( struct brw_compile *p )
|
|
||||||
{
|
|
||||||
assert(p->current != p->stack);
|
|
||||||
p->current--;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
*/
|
|
||||||
void brw_init_compile( struct brw_compile *p )
|
|
||||||
{
|
|
||||||
p->nr_insn = 0;
|
|
||||||
p->current = p->stack;
|
|
||||||
memset(p->current, 0, sizeof(p->current[0]));
|
|
||||||
|
|
||||||
/* Some defaults?
|
|
||||||
*/
|
|
||||||
brw_set_mask_control(p, BRW_MASK_ENABLE); /* what does this do? */
|
|
||||||
brw_set_saturate(p, 0);
|
|
||||||
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
|
|
||||||
brw_set_predicate_control_flag_value(p, 0xff);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const unsigned *brw_get_program( struct brw_compile *p,
|
|
||||||
unsigned *sz )
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
for (i = 0; i < 8; i++)
|
|
||||||
brw_NOP(p);
|
|
||||||
|
|
||||||
*sz = p->nr_insn * sizeof(struct brw_instruction);
|
|
||||||
return (const unsigned *)p->store;
|
|
||||||
}
|
|
||||||
|
|
|
@ -1,888 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_EU_H
|
|
||||||
#define BRW_EU_H
|
|
||||||
|
|
||||||
#include "brw_structs.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
|
|
||||||
#include "pipe/p_compiler.h"
|
|
||||||
#include "pipe/p_shader_tokens.h"
|
|
||||||
|
|
||||||
#define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6))
|
|
||||||
#define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3)
|
|
||||||
|
|
||||||
#define BRW_SWIZZLE_NOOP BRW_SWIZZLE4(0,1,2,3)
|
|
||||||
#define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3)
|
|
||||||
#define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0)
|
|
||||||
#define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1)
|
|
||||||
|
|
||||||
|
|
||||||
#define REG_SIZE (8*4)
|
|
||||||
|
|
||||||
|
|
||||||
/* These aren't hardware structs, just something useful for us to pass around:
|
|
||||||
*
|
|
||||||
* Align1 operation has a lot of control over input ranges. Used in
|
|
||||||
* WM programs to implement shaders decomposed into "channel serial"
|
|
||||||
* or "structure of array" form:
|
|
||||||
*/
|
|
||||||
struct brw_reg
|
|
||||||
{
|
|
||||||
unsigned type:4;
|
|
||||||
unsigned file:2;
|
|
||||||
unsigned nr:8;
|
|
||||||
unsigned subnr:5; /* :1 in align16 */
|
|
||||||
unsigned negate:1; /* source only */
|
|
||||||
unsigned abs:1; /* source only */
|
|
||||||
unsigned vstride:4; /* source only */
|
|
||||||
unsigned width:3; /* src only, align1 only */
|
|
||||||
unsigned hstride:2; /* src only, align1 only */
|
|
||||||
unsigned address_mode:1; /* relative addressing, hopefully! */
|
|
||||||
unsigned pad0:1;
|
|
||||||
|
|
||||||
union {
|
|
||||||
struct {
|
|
||||||
unsigned swizzle:8; /* src only, align16 only */
|
|
||||||
unsigned writemask:4; /* dest only, align16 only */
|
|
||||||
int indirect_offset:10; /* relative addressing offset */
|
|
||||||
unsigned pad1:10; /* two dwords total */
|
|
||||||
} bits;
|
|
||||||
|
|
||||||
float f;
|
|
||||||
int d;
|
|
||||||
unsigned ud;
|
|
||||||
} dw1;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_indirect {
|
|
||||||
unsigned addr_subnr:4;
|
|
||||||
int addr_offset:10;
|
|
||||||
unsigned pad:18;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#define BRW_EU_MAX_INSN_STACK 5
|
|
||||||
#define BRW_EU_MAX_INSN 1200
|
|
||||||
|
|
||||||
struct brw_compile {
|
|
||||||
struct brw_instruction store[BRW_EU_MAX_INSN];
|
|
||||||
unsigned nr_insn;
|
|
||||||
|
|
||||||
/* Allow clients to push/pop instruction state:
|
|
||||||
*/
|
|
||||||
struct brw_instruction stack[BRW_EU_MAX_INSN_STACK];
|
|
||||||
struct brw_instruction *current;
|
|
||||||
|
|
||||||
unsigned flag_value;
|
|
||||||
boolean single_program_flow;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static __inline int type_sz( unsigned type )
|
|
||||||
{
|
|
||||||
switch( type ) {
|
|
||||||
case BRW_REGISTER_TYPE_UD:
|
|
||||||
case BRW_REGISTER_TYPE_D:
|
|
||||||
case BRW_REGISTER_TYPE_F:
|
|
||||||
return 4;
|
|
||||||
case BRW_REGISTER_TYPE_HF:
|
|
||||||
case BRW_REGISTER_TYPE_UW:
|
|
||||||
case BRW_REGISTER_TYPE_W:
|
|
||||||
return 2;
|
|
||||||
case BRW_REGISTER_TYPE_UB:
|
|
||||||
case BRW_REGISTER_TYPE_B:
|
|
||||||
return 1;
|
|
||||||
default:
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr,
|
|
||||||
unsigned type,
|
|
||||||
unsigned vstride,
|
|
||||||
unsigned width,
|
|
||||||
unsigned hstride,
|
|
||||||
unsigned swizzle,
|
|
||||||
unsigned writemask)
|
|
||||||
{
|
|
||||||
|
|
||||||
struct brw_reg reg;
|
|
||||||
reg.type = type;
|
|
||||||
reg.file = file;
|
|
||||||
reg.nr = nr;
|
|
||||||
reg.subnr = subnr * type_sz(type);
|
|
||||||
reg.negate = 0;
|
|
||||||
reg.abs = 0;
|
|
||||||
reg.vstride = vstride;
|
|
||||||
reg.width = width;
|
|
||||||
reg.hstride = hstride;
|
|
||||||
reg.address_mode = BRW_ADDRESS_DIRECT;
|
|
||||||
reg.pad0 = 0;
|
|
||||||
|
|
||||||
/* Could do better: If the reg is r5.3<0;1,0>, we probably want to
|
|
||||||
* set swizzle and writemask to W, as the lower bits of subnr will
|
|
||||||
* be lost when converted to align16. This is probably too much to
|
|
||||||
* keep track of as you'd want it adjusted by suboffset(), etc.
|
|
||||||
* Perhaps fix up when converting to align16?
|
|
||||||
*/
|
|
||||||
reg.dw1.bits.swizzle = swizzle;
|
|
||||||
reg.dw1.bits.writemask = writemask;
|
|
||||||
reg.dw1.bits.indirect_offset = 0;
|
|
||||||
reg.dw1.bits.pad1 = 0;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec16_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_reg(file,
|
|
||||||
nr,
|
|
||||||
subnr,
|
|
||||||
BRW_REGISTER_TYPE_F,
|
|
||||||
BRW_VERTICAL_STRIDE_16,
|
|
||||||
BRW_WIDTH_16,
|
|
||||||
BRW_HORIZONTAL_STRIDE_1,
|
|
||||||
BRW_SWIZZLE_XYZW,
|
|
||||||
TGSI_WRITEMASK_XYZW);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec8_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_reg(file,
|
|
||||||
nr,
|
|
||||||
subnr,
|
|
||||||
BRW_REGISTER_TYPE_F,
|
|
||||||
BRW_VERTICAL_STRIDE_8,
|
|
||||||
BRW_WIDTH_8,
|
|
||||||
BRW_HORIZONTAL_STRIDE_1,
|
|
||||||
BRW_SWIZZLE_XYZW,
|
|
||||||
TGSI_WRITEMASK_XYZW);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec4_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_reg(file,
|
|
||||||
nr,
|
|
||||||
subnr,
|
|
||||||
BRW_REGISTER_TYPE_F,
|
|
||||||
BRW_VERTICAL_STRIDE_4,
|
|
||||||
BRW_WIDTH_4,
|
|
||||||
BRW_HORIZONTAL_STRIDE_1,
|
|
||||||
BRW_SWIZZLE_XYZW,
|
|
||||||
TGSI_WRITEMASK_XYZW);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec2_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_reg(file,
|
|
||||||
nr,
|
|
||||||
subnr,
|
|
||||||
BRW_REGISTER_TYPE_F,
|
|
||||||
BRW_VERTICAL_STRIDE_2,
|
|
||||||
BRW_WIDTH_2,
|
|
||||||
BRW_HORIZONTAL_STRIDE_1,
|
|
||||||
BRW_SWIZZLE_XYXY,
|
|
||||||
TGSI_WRITEMASK_XY);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec1_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_reg(file,
|
|
||||||
nr,
|
|
||||||
subnr,
|
|
||||||
BRW_REGISTER_TYPE_F,
|
|
||||||
BRW_VERTICAL_STRIDE_0,
|
|
||||||
BRW_WIDTH_1,
|
|
||||||
BRW_HORIZONTAL_STRIDE_0,
|
|
||||||
BRW_SWIZZLE_XXXX,
|
|
||||||
TGSI_WRITEMASK_X);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg retype( struct brw_reg reg,
|
|
||||||
unsigned type )
|
|
||||||
{
|
|
||||||
reg.type = type;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg suboffset( struct brw_reg reg,
|
|
||||||
unsigned delta )
|
|
||||||
{
|
|
||||||
reg.subnr += delta * type_sz(reg.type);
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg offset( struct brw_reg reg,
|
|
||||||
unsigned delta )
|
|
||||||
{
|
|
||||||
reg.nr += delta;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg byte_offset( struct brw_reg reg,
|
|
||||||
unsigned bytes )
|
|
||||||
{
|
|
||||||
unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes;
|
|
||||||
reg.nr = newoffset / REG_SIZE;
|
|
||||||
reg.subnr = newoffset % REG_SIZE;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_uw16_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_uw8_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_uw1_reg( unsigned file,
|
|
||||||
unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return suboffset(retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_reg( unsigned type )
|
|
||||||
{
|
|
||||||
return brw_reg( BRW_IMMEDIATE_VALUE,
|
|
||||||
0,
|
|
||||||
0,
|
|
||||||
type,
|
|
||||||
BRW_VERTICAL_STRIDE_0,
|
|
||||||
BRW_WIDTH_1,
|
|
||||||
BRW_HORIZONTAL_STRIDE_0,
|
|
||||||
0,
|
|
||||||
0);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_f( float f )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F);
|
|
||||||
imm.dw1.f = f;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_d( int d )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D);
|
|
||||||
imm.dw1.d = d;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_ud( unsigned ud )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD);
|
|
||||||
imm.dw1.ud = ud;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_uw( ushort uw )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW);
|
|
||||||
imm.dw1.ud = uw;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_w( short w )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W);
|
|
||||||
imm.dw1.d = w;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* brw_imm_b and brw_imm_ub aren't supported by hardware - the type
|
|
||||||
* numbers alias with _V and _VF below:
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Vector of eight signed half-byte values:
|
|
||||||
*/
|
|
||||||
static __inline struct brw_reg brw_imm_v( unsigned v )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V);
|
|
||||||
imm.vstride = BRW_VERTICAL_STRIDE_0;
|
|
||||||
imm.width = BRW_WIDTH_8;
|
|
||||||
imm.hstride = BRW_HORIZONTAL_STRIDE_1;
|
|
||||||
imm.dw1.ud = v;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Vector of four 8-bit float values:
|
|
||||||
*/
|
|
||||||
static __inline struct brw_reg brw_imm_vf( unsigned v )
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF);
|
|
||||||
imm.vstride = BRW_VERTICAL_STRIDE_0;
|
|
||||||
imm.width = BRW_WIDTH_4;
|
|
||||||
imm.hstride = BRW_HORIZONTAL_STRIDE_1;
|
|
||||||
imm.dw1.ud = v;
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define VF_ZERO 0x0
|
|
||||||
#define VF_ONE 0x30
|
|
||||||
#define VF_NEG (1<<7)
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_imm_vf4( unsigned v0,
|
|
||||||
unsigned v1,
|
|
||||||
unsigned v2,
|
|
||||||
unsigned v3)
|
|
||||||
{
|
|
||||||
struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF);
|
|
||||||
imm.vstride = BRW_VERTICAL_STRIDE_0;
|
|
||||||
imm.width = BRW_WIDTH_4;
|
|
||||||
imm.hstride = BRW_HORIZONTAL_STRIDE_1;
|
|
||||||
imm.dw1.ud = ((v0 << 0) |
|
|
||||||
(v1 << 8) |
|
|
||||||
(v2 << 16) |
|
|
||||||
(v3 << 24));
|
|
||||||
return imm;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_address( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec1_grf( unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec8_grf( unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec4_grf( unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec2_grf( unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_uw8_grf( unsigned nr,
|
|
||||||
unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_null_reg( void )
|
|
||||||
{
|
|
||||||
return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_NULL,
|
|
||||||
0);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_address_reg( unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_ADDRESS,
|
|
||||||
subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* If/else instructions break in align16 mode if writemask & swizzle
|
|
||||||
* aren't xyzw. This goes against the convention for other scalar
|
|
||||||
* regs:
|
|
||||||
*/
|
|
||||||
static __inline struct brw_reg brw_ip_reg( void )
|
|
||||||
{
|
|
||||||
return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_IP,
|
|
||||||
0,
|
|
||||||
BRW_REGISTER_TYPE_UD,
|
|
||||||
BRW_VERTICAL_STRIDE_4, /* ? */
|
|
||||||
BRW_WIDTH_1,
|
|
||||||
BRW_HORIZONTAL_STRIDE_0,
|
|
||||||
BRW_SWIZZLE_XYZW, /* NOTE! */
|
|
||||||
TGSI_WRITEMASK_XYZW); /* NOTE! */
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_acc_reg( void )
|
|
||||||
{
|
|
||||||
return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_ACCUMULATOR,
|
|
||||||
0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_flag_reg( void )
|
|
||||||
{
|
|
||||||
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_FLAG,
|
|
||||||
0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_mask_reg( unsigned subnr )
|
|
||||||
{
|
|
||||||
return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
|
|
||||||
BRW_ARF_MASK,
|
|
||||||
subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_message_reg( unsigned nr )
|
|
||||||
{
|
|
||||||
return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE,
|
|
||||||
nr,
|
|
||||||
0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* This is almost always called with a numeric constant argument, so
|
|
||||||
* make things easy to evaluate at compile time:
|
|
||||||
*/
|
|
||||||
static __inline unsigned cvt( unsigned val )
|
|
||||||
{
|
|
||||||
switch (val) {
|
|
||||||
case 0: return 0;
|
|
||||||
case 1: return 1;
|
|
||||||
case 2: return 2;
|
|
||||||
case 4: return 3;
|
|
||||||
case 8: return 4;
|
|
||||||
case 16: return 5;
|
|
||||||
case 32: return 6;
|
|
||||||
}
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg stride( struct brw_reg reg,
|
|
||||||
unsigned vstride,
|
|
||||||
unsigned width,
|
|
||||||
unsigned hstride )
|
|
||||||
{
|
|
||||||
|
|
||||||
reg.vstride = cvt(vstride);
|
|
||||||
reg.width = cvt(width) - 1;
|
|
||||||
reg.hstride = cvt(hstride);
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg vec16( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return stride(reg, 16,16,1);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg vec8( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return stride(reg, 8,8,1);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg vec4( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return stride(reg, 4,4,1);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg vec2( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return stride(reg, 2,2,1);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg vec1( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
return stride(reg, 0,1,0);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg get_element( struct brw_reg reg, unsigned elt )
|
|
||||||
{
|
|
||||||
return vec1(suboffset(reg, elt));
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg get_element_ud( struct brw_reg reg, unsigned elt )
|
|
||||||
{
|
|
||||||
return vec1(suboffset(retype(reg, BRW_REGISTER_TYPE_UD), elt));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_swizzle( struct brw_reg reg,
|
|
||||||
unsigned x,
|
|
||||||
unsigned y,
|
|
||||||
unsigned z,
|
|
||||||
unsigned w)
|
|
||||||
{
|
|
||||||
reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x),
|
|
||||||
BRW_GET_SWZ(reg.dw1.bits.swizzle, y),
|
|
||||||
BRW_GET_SWZ(reg.dw1.bits.swizzle, z),
|
|
||||||
BRW_GET_SWZ(reg.dw1.bits.swizzle, w));
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_swizzle1( struct brw_reg reg,
|
|
||||||
unsigned x )
|
|
||||||
{
|
|
||||||
return brw_swizzle(reg, x, x, x, x);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_writemask( struct brw_reg reg,
|
|
||||||
unsigned mask )
|
|
||||||
{
|
|
||||||
reg.dw1.bits.writemask &= mask;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_set_writemask( struct brw_reg reg,
|
|
||||||
unsigned mask )
|
|
||||||
{
|
|
||||||
reg.dw1.bits.writemask = mask;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg negate( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
reg.negate ^= 1;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_abs( struct brw_reg reg )
|
|
||||||
{
|
|
||||||
reg.abs = 1;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
*/
|
|
||||||
static __inline struct brw_reg brw_vec4_indirect( unsigned subnr,
|
|
||||||
int offset )
|
|
||||||
{
|
|
||||||
struct brw_reg reg = brw_vec4_grf(0, 0);
|
|
||||||
reg.subnr = subnr;
|
|
||||||
reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
|
|
||||||
reg.dw1.bits.indirect_offset = offset;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg brw_vec1_indirect( unsigned subnr,
|
|
||||||
int offset )
|
|
||||||
{
|
|
||||||
struct brw_reg reg = brw_vec1_grf(0, 0);
|
|
||||||
reg.subnr = subnr;
|
|
||||||
reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
|
|
||||||
reg.dw1.bits.indirect_offset = offset;
|
|
||||||
return reg;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg deref_4f(struct brw_indirect ptr, int offset)
|
|
||||||
{
|
|
||||||
return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg deref_1f(struct brw_indirect ptr, int offset)
|
|
||||||
{
|
|
||||||
return brw_vec1_indirect(ptr.addr_subnr, ptr.addr_offset + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg deref_4b(struct brw_indirect ptr, int offset)
|
|
||||||
{
|
|
||||||
return retype(deref_4f(ptr, offset), BRW_REGISTER_TYPE_B);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg deref_1uw(struct brw_indirect ptr, int offset)
|
|
||||||
{
|
|
||||||
return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UW);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg deref_1ud(struct brw_indirect ptr, int offset)
|
|
||||||
{
|
|
||||||
return retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UD);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_reg get_addr_reg(struct brw_indirect ptr)
|
|
||||||
{
|
|
||||||
return brw_address_reg(ptr.addr_subnr);
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_indirect brw_indirect_offset( struct brw_indirect ptr, int offset )
|
|
||||||
{
|
|
||||||
ptr.addr_offset += offset;
|
|
||||||
return ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_indirect brw_indirect( unsigned addr_subnr, int offset )
|
|
||||||
{
|
|
||||||
struct brw_indirect ptr;
|
|
||||||
ptr.addr_subnr = addr_subnr;
|
|
||||||
ptr.addr_offset = offset;
|
|
||||||
ptr.pad = 0;
|
|
||||||
return ptr;
|
|
||||||
}
|
|
||||||
|
|
||||||
static __inline struct brw_instruction *current_insn( struct brw_compile *p)
|
|
||||||
{
|
|
||||||
return &p->store[p->nr_insn];
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_pop_insn_state( struct brw_compile *p );
|
|
||||||
void brw_push_insn_state( struct brw_compile *p );
|
|
||||||
void brw_set_mask_control( struct brw_compile *p, unsigned value );
|
|
||||||
void brw_set_saturate( struct brw_compile *p, unsigned value );
|
|
||||||
void brw_set_access_mode( struct brw_compile *p, unsigned access_mode );
|
|
||||||
void brw_set_compression_control( struct brw_compile *p, boolean control );
|
|
||||||
void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value );
|
|
||||||
void brw_set_predicate_control( struct brw_compile *p, unsigned pc );
|
|
||||||
void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional );
|
|
||||||
|
|
||||||
void brw_init_compile( struct brw_compile *p );
|
|
||||||
const unsigned *brw_get_program( struct brw_compile *p, unsigned *sz );
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_instruction *brw_alu1( struct brw_compile *p,
|
|
||||||
unsigned opcode,
|
|
||||||
struct brw_reg dest,
|
|
||||||
struct brw_reg src );
|
|
||||||
|
|
||||||
struct brw_instruction *brw_alu2(struct brw_compile *p,
|
|
||||||
unsigned opcode,
|
|
||||||
struct brw_reg dest,
|
|
||||||
struct brw_reg src0,
|
|
||||||
struct brw_reg src1 );
|
|
||||||
|
|
||||||
/* Helpers for regular instructions:
|
|
||||||
*/
|
|
||||||
#define ALU1(OP) \
|
|
||||||
struct brw_instruction *brw_##OP(struct brw_compile *p, \
|
|
||||||
struct brw_reg dest, \
|
|
||||||
struct brw_reg src0);
|
|
||||||
|
|
||||||
#define ALU2(OP) \
|
|
||||||
struct brw_instruction *brw_##OP(struct brw_compile *p, \
|
|
||||||
struct brw_reg dest, \
|
|
||||||
struct brw_reg src0, \
|
|
||||||
struct brw_reg src1);
|
|
||||||
|
|
||||||
ALU1(MOV)
|
|
||||||
ALU2(SEL)
|
|
||||||
ALU1(NOT)
|
|
||||||
ALU2(AND)
|
|
||||||
ALU2(OR)
|
|
||||||
ALU2(XOR)
|
|
||||||
ALU2(SHR)
|
|
||||||
ALU2(SHL)
|
|
||||||
ALU2(RSR)
|
|
||||||
ALU2(RSL)
|
|
||||||
ALU2(ASR)
|
|
||||||
ALU2(JMPI)
|
|
||||||
ALU2(ADD)
|
|
||||||
ALU2(MUL)
|
|
||||||
ALU1(FRC)
|
|
||||||
ALU1(RNDD)
|
|
||||||
ALU2(MAC)
|
|
||||||
ALU2(MACH)
|
|
||||||
ALU1(LZD)
|
|
||||||
ALU2(DP4)
|
|
||||||
ALU2(DPH)
|
|
||||||
ALU2(DP3)
|
|
||||||
ALU2(DP2)
|
|
||||||
ALU2(LINE)
|
|
||||||
|
|
||||||
#undef ALU1
|
|
||||||
#undef ALU2
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Helpers for SEND instruction:
|
|
||||||
*/
|
|
||||||
void brw_urb_WRITE(struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
struct brw_reg src0,
|
|
||||||
boolean allocate,
|
|
||||||
boolean used,
|
|
||||||
unsigned msg_length,
|
|
||||||
unsigned response_length,
|
|
||||||
boolean eot,
|
|
||||||
boolean writes_complete,
|
|
||||||
unsigned offset,
|
|
||||||
unsigned swizzle);
|
|
||||||
|
|
||||||
void brw_fb_WRITE(struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
struct brw_reg src0,
|
|
||||||
unsigned binding_table_index,
|
|
||||||
unsigned msg_length,
|
|
||||||
unsigned response_length,
|
|
||||||
boolean eot);
|
|
||||||
|
|
||||||
void brw_SAMPLE(struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
struct brw_reg src0,
|
|
||||||
unsigned binding_table_index,
|
|
||||||
unsigned sampler,
|
|
||||||
unsigned writemask,
|
|
||||||
unsigned msg_type,
|
|
||||||
unsigned response_length,
|
|
||||||
unsigned msg_length,
|
|
||||||
boolean eot);
|
|
||||||
|
|
||||||
void brw_math_16( struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned function,
|
|
||||||
unsigned saturate,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned precision );
|
|
||||||
|
|
||||||
void brw_math( struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned function,
|
|
||||||
unsigned saturate,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned data_type,
|
|
||||||
unsigned precision );
|
|
||||||
|
|
||||||
void brw_dp_READ_16( struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
unsigned scratch_offset );
|
|
||||||
|
|
||||||
void brw_dp_WRITE_16( struct brw_compile *p,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned msg_reg_nr,
|
|
||||||
unsigned scratch_offset );
|
|
||||||
|
|
||||||
/* If/else/endif. Works by manipulating the execution flags on each
|
|
||||||
* channel.
|
|
||||||
*/
|
|
||||||
struct brw_instruction *brw_IF(struct brw_compile *p,
|
|
||||||
unsigned execute_size);
|
|
||||||
|
|
||||||
struct brw_instruction *brw_ELSE(struct brw_compile *p,
|
|
||||||
struct brw_instruction *if_insn);
|
|
||||||
|
|
||||||
void brw_ENDIF(struct brw_compile *p,
|
|
||||||
struct brw_instruction *if_or_else_insn);
|
|
||||||
|
|
||||||
|
|
||||||
/* DO/WHILE loops:
|
|
||||||
*/
|
|
||||||
struct brw_instruction *brw_DO(struct brw_compile *p,
|
|
||||||
unsigned execute_size);
|
|
||||||
|
|
||||||
struct brw_instruction *brw_WHILE(struct brw_compile *p,
|
|
||||||
struct brw_instruction *patch_insn);
|
|
||||||
|
|
||||||
struct brw_instruction *brw_BREAK(struct brw_compile *p);
|
|
||||||
struct brw_instruction *brw_CONT(struct brw_compile *p);
|
|
||||||
/* Forward jumps:
|
|
||||||
*/
|
|
||||||
void brw_land_fwd_jump(struct brw_compile *p,
|
|
||||||
struct brw_instruction *jmp_insn);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_NOP(struct brw_compile *p);
|
|
||||||
|
|
||||||
/* Special case: there is never a destination, execution size will be
|
|
||||||
* taken from src0:
|
|
||||||
*/
|
|
||||||
void brw_CMP(struct brw_compile *p,
|
|
||||||
struct brw_reg dest,
|
|
||||||
unsigned conditional,
|
|
||||||
struct brw_reg src0,
|
|
||||||
struct brw_reg src1);
|
|
||||||
|
|
||||||
void brw_print_reg( struct brw_reg reg );
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* brw_eu_util.c:
|
|
||||||
*/
|
|
||||||
|
|
||||||
void brw_copy_indirect_to_indirect(struct brw_compile *p,
|
|
||||||
struct brw_indirect dst_ptr,
|
|
||||||
struct brw_indirect src_ptr,
|
|
||||||
unsigned count);
|
|
||||||
|
|
||||||
void brw_copy_from_indirect(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_indirect ptr,
|
|
||||||
unsigned count);
|
|
||||||
|
|
||||||
void brw_copy4(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned count);
|
|
||||||
|
|
||||||
void brw_copy8(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned count);
|
|
||||||
|
|
||||||
void brw_math_invert( struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src);
|
|
||||||
|
|
||||||
void brw_set_src1( struct brw_instruction *insn,
|
|
||||||
struct brw_reg reg );
|
|
||||||
#endif
|
|
|
@ -1,90 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "util/u_debug.h"
|
|
||||||
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
void brw_print_reg( struct brw_reg hwreg )
|
|
||||||
{
|
|
||||||
static const char *file[] = {
|
|
||||||
"arf",
|
|
||||||
"grf",
|
|
||||||
"msg",
|
|
||||||
"imm"
|
|
||||||
};
|
|
||||||
|
|
||||||
static const char *type[] = {
|
|
||||||
"ud",
|
|
||||||
"d",
|
|
||||||
"uw",
|
|
||||||
"w",
|
|
||||||
"ub",
|
|
||||||
"vf",
|
|
||||||
"hf",
|
|
||||||
"f"
|
|
||||||
};
|
|
||||||
|
|
||||||
debug_printf("%s%s",
|
|
||||||
hwreg.abs ? "abs/" : "",
|
|
||||||
hwreg.negate ? "-" : "");
|
|
||||||
|
|
||||||
if (hwreg.file == BRW_GENERAL_REGISTER_FILE &&
|
|
||||||
hwreg.nr % 2 == 0 &&
|
|
||||||
hwreg.subnr == 0 &&
|
|
||||||
hwreg.vstride == BRW_VERTICAL_STRIDE_8 &&
|
|
||||||
hwreg.width == BRW_WIDTH_8 &&
|
|
||||||
hwreg.hstride == BRW_HORIZONTAL_STRIDE_1 &&
|
|
||||||
hwreg.type == BRW_REGISTER_TYPE_F) {
|
|
||||||
debug_printf("vec%d", hwreg.nr);
|
|
||||||
}
|
|
||||||
else if (hwreg.file == BRW_GENERAL_REGISTER_FILE &&
|
|
||||||
hwreg.vstride == BRW_VERTICAL_STRIDE_0 &&
|
|
||||||
hwreg.width == BRW_WIDTH_1 &&
|
|
||||||
hwreg.hstride == BRW_HORIZONTAL_STRIDE_0 &&
|
|
||||||
hwreg.type == BRW_REGISTER_TYPE_F) {
|
|
||||||
debug_printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4);
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
debug_printf("%s%d.%d<%d;%d,%d>:%s",
|
|
||||||
file[hwreg.file],
|
|
||||||
hwreg.nr,
|
|
||||||
hwreg.subnr / type_sz(hwreg.type),
|
|
||||||
hwreg.vstride ? (1<<(hwreg.vstride-1)) : 0,
|
|
||||||
1<<hwreg.width,
|
|
||||||
hwreg.hstride ? (1<<(hwreg.hstride-1)) : 0,
|
|
||||||
type[hwreg.type]);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,126 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
|
|
||||||
void brw_math_invert( struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src)
|
|
||||||
{
|
|
||||||
brw_math( p,
|
|
||||||
dst,
|
|
||||||
BRW_MATH_FUNCTION_INV,
|
|
||||||
BRW_MATH_SATURATE_NONE,
|
|
||||||
0,
|
|
||||||
src,
|
|
||||||
BRW_MATH_PRECISION_FULL,
|
|
||||||
BRW_MATH_DATA_VECTOR );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_copy4(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned count)
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
dst = vec4(dst);
|
|
||||||
src = vec4(src);
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++)
|
|
||||||
{
|
|
||||||
unsigned delta = i*32;
|
|
||||||
brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta));
|
|
||||||
brw_MOV(p, byte_offset(dst, delta+16), byte_offset(src, delta+16));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_copy8(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_reg src,
|
|
||||||
unsigned count)
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
dst = vec8(dst);
|
|
||||||
src = vec8(src);
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++)
|
|
||||||
{
|
|
||||||
unsigned delta = i*32;
|
|
||||||
brw_MOV(p, byte_offset(dst, delta), byte_offset(src, delta));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_copy_indirect_to_indirect(struct brw_compile *p,
|
|
||||||
struct brw_indirect dst_ptr,
|
|
||||||
struct brw_indirect src_ptr,
|
|
||||||
unsigned count)
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++)
|
|
||||||
{
|
|
||||||
unsigned delta = i*32;
|
|
||||||
brw_MOV(p, deref_4f(dst_ptr, delta), deref_4f(src_ptr, delta));
|
|
||||||
brw_MOV(p, deref_4f(dst_ptr, delta+16), deref_4f(src_ptr, delta+16));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void brw_copy_from_indirect(struct brw_compile *p,
|
|
||||||
struct brw_reg dst,
|
|
||||||
struct brw_indirect ptr,
|
|
||||||
unsigned count)
|
|
||||||
{
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
dst = vec4(dst);
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++)
|
|
||||||
{
|
|
||||||
unsigned delta = i*32;
|
|
||||||
brw_MOV(p, byte_offset(dst, delta), deref_4f(ptr, delta));
|
|
||||||
brw_MOV(p, byte_offset(dst, delta+16), deref_4f(ptr, delta+16));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,73 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
/* Author:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "pipe/p_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_batch.h"
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_flush( struct pipe_context *pipe,
|
|
||||||
unsigned flags,
|
|
||||||
struct pipe_fence_handle **fence )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
/* Do we need to emit an MI_FLUSH command to flush the hardware
|
|
||||||
* caches?
|
|
||||||
*/
|
|
||||||
if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
|
|
||||||
struct brw_mi_flush flush;
|
|
||||||
|
|
||||||
memset(&flush, 0, sizeof(flush));
|
|
||||||
flush.opcode = CMD_MI_FLUSH;
|
|
||||||
|
|
||||||
if (!(flags & PIPE_FLUSH_RENDER_CACHE))
|
|
||||||
flush.flags |= BRW_INHIBIT_FLUSH_RENDER_CACHE;
|
|
||||||
|
|
||||||
if (flags & PIPE_FLUSH_TEXTURE_CACHE)
|
|
||||||
flush.flags |= BRW_FLUSH_READ_CACHE;
|
|
||||||
|
|
||||||
BRW_BATCH_STRUCT(brw, &flush);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* If there are no flags, just flush pending commands to hardware:
|
|
||||||
*/
|
|
||||||
FLUSH_BATCH( fence );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_init_flush_functions( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
brw->pipe.flush = brw_flush;
|
|
||||||
}
|
|
|
@ -1,196 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_gs.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void compile_gs_prog( struct brw_context *brw,
|
|
||||||
struct brw_gs_prog_key *key )
|
|
||||||
{
|
|
||||||
struct brw_gs_compile c;
|
|
||||||
const unsigned *program;
|
|
||||||
unsigned program_size;
|
|
||||||
|
|
||||||
memset(&c, 0, sizeof(c));
|
|
||||||
|
|
||||||
c.key = *key;
|
|
||||||
|
|
||||||
/* Need to locate the two positions present in vertex + header.
|
|
||||||
* These are currently hardcoded:
|
|
||||||
*/
|
|
||||||
c.nr_attrs = brw_count_bits(c.key.attrs);
|
|
||||||
c.nr_regs = (c.nr_attrs + 1) / 2 + 1; /* are vertices packed, or reg-aligned? */
|
|
||||||
c.nr_bytes = c.nr_regs * REG_SIZE;
|
|
||||||
|
|
||||||
|
|
||||||
/* Begin the compilation:
|
|
||||||
*/
|
|
||||||
brw_init_compile(&c.func);
|
|
||||||
|
|
||||||
c.func.single_program_flow = 1;
|
|
||||||
|
|
||||||
/* For some reason the thread is spawned with only 4 channels
|
|
||||||
* unmasked.
|
|
||||||
*/
|
|
||||||
brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
|
|
||||||
|
|
||||||
|
|
||||||
/* Note that primitives which don't require a GS program have
|
|
||||||
* already been weeded out by this stage:
|
|
||||||
*/
|
|
||||||
switch (key->primitive) {
|
|
||||||
case PIPE_PRIM_QUADS:
|
|
||||||
brw_gs_quads( &c );
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_QUAD_STRIP:
|
|
||||||
brw_gs_quad_strip( &c );
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_LINE_LOOP:
|
|
||||||
brw_gs_lines( &c );
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_LINES:
|
|
||||||
if (key->hint_gs_always)
|
|
||||||
brw_gs_lines( &c );
|
|
||||||
else {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_TRIANGLES:
|
|
||||||
if (key->hint_gs_always)
|
|
||||||
brw_gs_tris( &c );
|
|
||||||
else {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_POINTS:
|
|
||||||
if (key->hint_gs_always)
|
|
||||||
brw_gs_points( &c );
|
|
||||||
else {
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* get the program
|
|
||||||
*/
|
|
||||||
program = brw_get_program(&c.func, &program_size);
|
|
||||||
|
|
||||||
/* Upload
|
|
||||||
*/
|
|
||||||
brw->gs.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_GS_PROG],
|
|
||||||
&c.key,
|
|
||||||
sizeof(c.key),
|
|
||||||
program,
|
|
||||||
program_size,
|
|
||||||
&c.prog_data,
|
|
||||||
&brw->gs.prog_data );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static boolean search_cache( struct brw_context *brw,
|
|
||||||
struct brw_gs_prog_key *key )
|
|
||||||
{
|
|
||||||
return brw_search_cache(&brw->cache[BRW_GS_PROG],
|
|
||||||
key, sizeof(*key),
|
|
||||||
&brw->gs.prog_data,
|
|
||||||
&brw->gs.prog_gs_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static const int gs_prim[PIPE_PRIM_POLYGON+1] = {
|
|
||||||
PIPE_PRIM_POINTS,
|
|
||||||
PIPE_PRIM_LINES,
|
|
||||||
PIPE_PRIM_LINE_LOOP,
|
|
||||||
PIPE_PRIM_LINES,
|
|
||||||
PIPE_PRIM_TRIANGLES,
|
|
||||||
PIPE_PRIM_TRIANGLES,
|
|
||||||
PIPE_PRIM_TRIANGLES,
|
|
||||||
PIPE_PRIM_QUADS,
|
|
||||||
PIPE_PRIM_QUAD_STRIP,
|
|
||||||
PIPE_PRIM_TRIANGLES
|
|
||||||
};
|
|
||||||
|
|
||||||
static void populate_key( struct brw_context *brw,
|
|
||||||
struct brw_gs_prog_key *key )
|
|
||||||
{
|
|
||||||
memset(key, 0, sizeof(*key));
|
|
||||||
|
|
||||||
/* CACHE_NEW_VS_PROG */
|
|
||||||
key->attrs = brw->vs.prog_data->outputs_written;
|
|
||||||
|
|
||||||
/* BRW_NEW_PRIMITIVE */
|
|
||||||
key->primitive = gs_prim[brw->primitive];
|
|
||||||
|
|
||||||
key->hint_gs_always = 0; /* debug code? */
|
|
||||||
|
|
||||||
key->need_gs_prog = (key->hint_gs_always ||
|
|
||||||
brw->primitive == PIPE_PRIM_QUADS ||
|
|
||||||
brw->primitive == PIPE_PRIM_QUAD_STRIP ||
|
|
||||||
brw->primitive == PIPE_PRIM_LINE_LOOP);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Calculate interpolants for triangle and line rasterization.
|
|
||||||
*/
|
|
||||||
static void upload_gs_prog( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_gs_prog_key key;
|
|
||||||
|
|
||||||
/* Populate the key:
|
|
||||||
*/
|
|
||||||
populate_key(brw, &key);
|
|
||||||
|
|
||||||
if (brw->gs.prog_active != key.need_gs_prog) {
|
|
||||||
brw->state.dirty.cache |= CACHE_NEW_GS_PROG;
|
|
||||||
brw->gs.prog_active = key.need_gs_prog;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (brw->gs.prog_active) {
|
|
||||||
if (!search_cache(brw, &key))
|
|
||||||
compile_gs_prog( brw, &key );
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_gs_prog = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_PRIMITIVE,
|
|
||||||
.cache = CACHE_NEW_VS_PROG
|
|
||||||
},
|
|
||||||
.update = upload_gs_prog
|
|
||||||
};
|
|
|
@ -1,75 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_GS_H
|
|
||||||
#define BRW_GS_H
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
#define MAX_GS_VERTS (4)
|
|
||||||
|
|
||||||
struct brw_gs_prog_key {
|
|
||||||
unsigned attrs:32;
|
|
||||||
unsigned primitive:4;
|
|
||||||
unsigned hint_gs_always:1;
|
|
||||||
unsigned need_gs_prog:1;
|
|
||||||
unsigned pad:26;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_gs_compile {
|
|
||||||
struct brw_compile func;
|
|
||||||
struct brw_gs_prog_key key;
|
|
||||||
struct brw_gs_prog_data prog_data;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
struct brw_reg R0;
|
|
||||||
struct brw_reg vertex[MAX_GS_VERTS];
|
|
||||||
} reg;
|
|
||||||
|
|
||||||
/* 3 different ways of expressing vertex size:
|
|
||||||
*/
|
|
||||||
unsigned nr_attrs;
|
|
||||||
unsigned nr_regs;
|
|
||||||
unsigned nr_bytes;
|
|
||||||
};
|
|
||||||
|
|
||||||
#define ATTR_SIZE (4*4)
|
|
||||||
|
|
||||||
void brw_gs_quads( struct brw_gs_compile *c );
|
|
||||||
void brw_gs_quad_strip( struct brw_gs_compile *c );
|
|
||||||
void brw_gs_tris( struct brw_gs_compile *c );
|
|
||||||
void brw_gs_lines( struct brw_gs_compile *c );
|
|
||||||
void brw_gs_points( struct brw_gs_compile *c );
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,148 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_gs.h"
|
|
||||||
|
|
||||||
static void brw_gs_alloc_regs( struct brw_gs_compile *c,
|
|
||||||
unsigned nr_verts )
|
|
||||||
{
|
|
||||||
unsigned i = 0,j;
|
|
||||||
|
|
||||||
/* Register usage is static, precompute here:
|
|
||||||
*/
|
|
||||||
c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
|
|
||||||
|
|
||||||
/* Payload vertices plus space for more generated vertices:
|
|
||||||
*/
|
|
||||||
for (j = 0; j < nr_verts; j++) {
|
|
||||||
c->reg.vertex[j] = brw_vec4_grf(i, 0);
|
|
||||||
i += c->nr_regs;
|
|
||||||
}
|
|
||||||
|
|
||||||
c->prog_data.urb_read_length = c->nr_regs;
|
|
||||||
c->prog_data.total_grf = i;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_gs_emit_vue(struct brw_gs_compile *c,
|
|
||||||
struct brw_reg vert,
|
|
||||||
boolean last,
|
|
||||||
unsigned header)
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
boolean allocate = !last;
|
|
||||||
|
|
||||||
/* Overwrite PrimType and PrimStart in the message header, for
|
|
||||||
* each vertex in turn:
|
|
||||||
*/
|
|
||||||
brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
|
|
||||||
|
|
||||||
/* Copy the vertex from vertn into m1..mN+1:
|
|
||||||
*/
|
|
||||||
brw_copy8(p, brw_message_reg(1), vert, c->nr_regs);
|
|
||||||
|
|
||||||
/* Send each vertex as a seperate write to the urb. This is
|
|
||||||
* different to the concept in brw_sf_emit.c, where subsequent
|
|
||||||
* writes are used to build up a single urb entry. Each of these
|
|
||||||
* writes instantiates a seperate urb entry, and a new one must be
|
|
||||||
* allocated each time.
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
|
|
||||||
0,
|
|
||||||
c->reg.R0,
|
|
||||||
allocate,
|
|
||||||
1, /* used */
|
|
||||||
c->nr_regs + 1, /* msg length */
|
|
||||||
allocate ? 1 : 0, /* response length */
|
|
||||||
allocate ? 0 : 1, /* eot */
|
|
||||||
1, /* writes_complete */
|
|
||||||
0, /* urb offset */
|
|
||||||
BRW_URB_SWIZZLE_NONE);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_gs_quads( struct brw_gs_compile *c )
|
|
||||||
{
|
|
||||||
brw_gs_alloc_regs(c, 4);
|
|
||||||
|
|
||||||
/* Use polygons for correct edgeflag behaviour. Note that vertex 3
|
|
||||||
* is the PV for quads, but vertex 0 for polygons:
|
|
||||||
*/
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[3], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_gs_quad_strip( struct brw_gs_compile *c )
|
|
||||||
{
|
|
||||||
brw_gs_alloc_regs(c, 4);
|
|
||||||
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_gs_tris( struct brw_gs_compile *c )
|
|
||||||
{
|
|
||||||
brw_gs_alloc_regs(c, 3);
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_TRILIST << 2) | R02_PRIM_START));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_TRILIST << 2));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_TRILIST << 2) | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_gs_lines( struct brw_gs_compile *c )
|
|
||||||
{
|
|
||||||
brw_gs_alloc_regs(c, 2);
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_START));
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
|
|
||||||
void brw_gs_points( struct brw_gs_compile *c )
|
|
||||||
{
|
|
||||||
brw_gs_alloc_regs(c, 1);
|
|
||||||
brw_gs_emit_vue(c, c->reg.vertex[0], 1, ((_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END));
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -1,90 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "util/u_math.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
static void upload_gs_unit( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_gs_unit_state gs;
|
|
||||||
|
|
||||||
memset(&gs, 0, sizeof(gs));
|
|
||||||
|
|
||||||
/* CACHE_NEW_GS_PROG */
|
|
||||||
if (brw->gs.prog_active) {
|
|
||||||
gs.thread0.grf_reg_count =
|
|
||||||
align(brw->gs.prog_data->total_grf, 16) / 16 - 1;
|
|
||||||
gs.thread0.kernel_start_pointer = brw->gs.prog_gs_offset >> 6;
|
|
||||||
gs.thread3.urb_entry_read_length = brw->gs.prog_data->urb_read_length;
|
|
||||||
}
|
|
||||||
else {
|
|
||||||
gs.thread0.grf_reg_count = 0;
|
|
||||||
gs.thread0.kernel_start_pointer = 0;
|
|
||||||
gs.thread3.urb_entry_read_length = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* BRW_NEW_URB_FENCE */
|
|
||||||
gs.thread4.nr_urb_entries = brw->urb.nr_gs_entries;
|
|
||||||
gs.thread4.urb_entry_allocation_size = brw->urb.vsize - 1;
|
|
||||||
|
|
||||||
gs.thread4.max_threads = 0; /* Hardware requirement */
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_STATS)
|
|
||||||
gs.thread4.stats_enable = 1;
|
|
||||||
|
|
||||||
/* CONSTANT */
|
|
||||||
gs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
|
|
||||||
gs.thread1.single_program_flow = 1;
|
|
||||||
gs.thread3.dispatch_grf_start_reg = 1;
|
|
||||||
gs.thread3.const_urb_entry_read_offset = 0;
|
|
||||||
gs.thread3.const_urb_entry_read_length = 0;
|
|
||||||
gs.thread3.urb_entry_read_offset = 0;
|
|
||||||
|
|
||||||
|
|
||||||
brw->gs.state_gs_offset = brw_cache_data( &brw->cache[BRW_GS_UNIT], &gs );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_gs_unit = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_CURBE_OFFSETS |
|
|
||||||
BRW_NEW_URB_FENCE),
|
|
||||||
.cache = CACHE_NEW_GS_PROG
|
|
||||||
},
|
|
||||||
.update = upload_gs_unit
|
|
||||||
};
|
|
|
@ -1,488 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "brw_batch.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Blend color
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void upload_blend_constant_color(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_blend_constant_color bcc;
|
|
||||||
|
|
||||||
memset(&bcc, 0, sizeof(bcc));
|
|
||||||
bcc.header.opcode = CMD_BLEND_CONSTANT_COLOR;
|
|
||||||
bcc.header.length = sizeof(bcc)/4-2;
|
|
||||||
bcc.blend_constant_color[0] = brw->attribs.BlendColor.color[0];
|
|
||||||
bcc.blend_constant_color[1] = brw->attribs.BlendColor.color[1];
|
|
||||||
bcc.blend_constant_color[2] = brw->attribs.BlendColor.color[2];
|
|
||||||
bcc.blend_constant_color[3] = brw->attribs.BlendColor.color[3];
|
|
||||||
|
|
||||||
BRW_CACHED_BATCH_STRUCT(brw, &bcc);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_blend_constant_color = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_BLEND,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_blend_constant_color
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Drawing rectangle
|
|
||||||
*/
|
|
||||||
static void upload_drawing_rect(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_drawrect bdr;
|
|
||||||
|
|
||||||
memset(&bdr, 0, sizeof(bdr));
|
|
||||||
bdr.header.opcode = CMD_DRAW_RECT;
|
|
||||||
bdr.header.length = sizeof(bdr)/4 - 2;
|
|
||||||
bdr.xmin = 0;
|
|
||||||
bdr.ymin = 0;
|
|
||||||
bdr.xmax = brw->attribs.FrameBuffer.cbufs[0]->width;
|
|
||||||
bdr.ymax = brw->attribs.FrameBuffer.cbufs[0]->height;
|
|
||||||
bdr.xorg = 0;
|
|
||||||
bdr.yorg = 0;
|
|
||||||
|
|
||||||
/* Can't use BRW_CACHED_BATCH_STRUCT because this is also emitted
|
|
||||||
* uncached in brw_draw.c:
|
|
||||||
*/
|
|
||||||
BRW_BATCH_STRUCT(brw, &bdr);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_drawing_rect = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_drawing_rect
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Upload the binding table pointers, which point each stage's array of surface
|
|
||||||
* state pointers.
|
|
||||||
*
|
|
||||||
* The binding table pointers are relative to the surface state base address,
|
|
||||||
* which is the BRW_SS_POOL cache buffer.
|
|
||||||
*/
|
|
||||||
static void upload_binding_table_pointers(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_binding_table_pointers btp;
|
|
||||||
memset(&btp, 0, sizeof(btp));
|
|
||||||
|
|
||||||
btp.header.opcode = CMD_BINDING_TABLE_PTRS;
|
|
||||||
btp.header.length = sizeof(btp)/4 - 2;
|
|
||||||
btp.vs = 0;
|
|
||||||
btp.gs = 0;
|
|
||||||
btp.clp = 0;
|
|
||||||
btp.sf = 0;
|
|
||||||
btp.wm = brw->wm.bind_ss_offset;
|
|
||||||
|
|
||||||
BRW_CACHED_BATCH_STRUCT(brw, &btp);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_binding_table_pointers = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = 0,
|
|
||||||
.cache = CACHE_NEW_SURF_BIND
|
|
||||||
},
|
|
||||||
.update = upload_binding_table_pointers,
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Upload pointers to the per-stage state.
|
|
||||||
*
|
|
||||||
* The state pointers in this packet are all relative to the general state
|
|
||||||
* base address set by CMD_STATE_BASE_ADDRESS, which is the BRW_GS_POOL buffer.
|
|
||||||
*/
|
|
||||||
static void upload_pipelined_state_pointers(struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_pipelined_state_pointers psp;
|
|
||||||
memset(&psp, 0, sizeof(psp));
|
|
||||||
|
|
||||||
psp.header.opcode = CMD_PIPELINED_STATE_POINTERS;
|
|
||||||
psp.header.length = sizeof(psp)/4 - 2;
|
|
||||||
|
|
||||||
psp.vs.offset = brw->vs.state_gs_offset >> 5;
|
|
||||||
psp.sf.offset = brw->sf.state_gs_offset >> 5;
|
|
||||||
psp.wm.offset = brw->wm.state_gs_offset >> 5;
|
|
||||||
psp.cc.offset = brw->cc.state_gs_offset >> 5;
|
|
||||||
|
|
||||||
/* GS gets turned on and off regularly. Need to re-emit URB fence
|
|
||||||
* after this occurs.
|
|
||||||
*/
|
|
||||||
if (brw->gs.prog_active) {
|
|
||||||
psp.gs.offset = brw->gs.state_gs_offset >> 5;
|
|
||||||
psp.gs.enable = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (0) {
|
|
||||||
psp.clp.offset = brw->clip.state_gs_offset >> 5;
|
|
||||||
psp.clp.enable = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
if (BRW_CACHED_BATCH_STRUCT(brw, &psp))
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_PSP;
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_pipelined_state_pointers = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = 0,
|
|
||||||
.cache = (CACHE_NEW_VS_UNIT |
|
|
||||||
CACHE_NEW_GS_UNIT |
|
|
||||||
CACHE_NEW_GS_PROG |
|
|
||||||
CACHE_NEW_CLIP_UNIT |
|
|
||||||
CACHE_NEW_SF_UNIT |
|
|
||||||
CACHE_NEW_WM_UNIT |
|
|
||||||
CACHE_NEW_CC_UNIT)
|
|
||||||
},
|
|
||||||
.update = upload_pipelined_state_pointers
|
|
||||||
};
|
|
||||||
|
|
||||||
static void upload_psp_urb_cbs(struct brw_context *brw )
|
|
||||||
{
|
|
||||||
upload_pipelined_state_pointers(brw);
|
|
||||||
brw_upload_urb_fence(brw);
|
|
||||||
brw_upload_constant_buffer_state(brw);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_psp_urb_cbs = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_URB_FENCE,
|
|
||||||
.cache = (CACHE_NEW_VS_UNIT |
|
|
||||||
CACHE_NEW_GS_UNIT |
|
|
||||||
CACHE_NEW_GS_PROG |
|
|
||||||
CACHE_NEW_CLIP_UNIT |
|
|
||||||
CACHE_NEW_SF_UNIT |
|
|
||||||
CACHE_NEW_WM_UNIT |
|
|
||||||
CACHE_NEW_CC_UNIT)
|
|
||||||
},
|
|
||||||
.update = upload_psp_urb_cbs
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Upload the depthbuffer offset and format.
|
|
||||||
*
|
|
||||||
* We have to do this per state validation as we need to emit the relocation
|
|
||||||
* in the batch buffer.
|
|
||||||
*/
|
|
||||||
static void upload_depthbuffer(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct pipe_surface *depth_surface = brw->attribs.FrameBuffer.zsbuf;
|
|
||||||
|
|
||||||
BEGIN_BATCH(5, INTEL_BATCH_NO_CLIPRECTS);
|
|
||||||
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (5 - 2));
|
|
||||||
if (depth_surface == NULL) {
|
|
||||||
OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) |
|
|
||||||
(BRW_SURFACE_NULL << 29));
|
|
||||||
OUT_BATCH(0);
|
|
||||||
OUT_BATCH(0);
|
|
||||||
OUT_BATCH(0);
|
|
||||||
} else {
|
|
||||||
unsigned int format;
|
|
||||||
struct brw_texture *tex = (struct brw_texture *)depth_surface->texture;
|
|
||||||
assert(depth_surface->block.width == 1);
|
|
||||||
assert(depth_surface->block.height == 1);
|
|
||||||
switch (depth_surface->block.size) {
|
|
||||||
case 2:
|
|
||||||
format = BRW_DEPTHFORMAT_D16_UNORM;
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
if (depth_surface->format == PIPE_FORMAT_Z32_FLOAT)
|
|
||||||
format = BRW_DEPTHFORMAT_D32_FLOAT;
|
|
||||||
else
|
|
||||||
format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
OUT_BATCH((depth_surface->stride - 1) |
|
|
||||||
(format << 18) |
|
|
||||||
(BRW_TILEWALK_YMAJOR << 26) |
|
|
||||||
// (depth_surface->region->tiled << 27) |
|
|
||||||
(BRW_SURFACE_2D << 29));
|
|
||||||
OUT_RELOC(tex->buffer,
|
|
||||||
PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE, 0);
|
|
||||||
OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
|
|
||||||
((depth_surface->stride/depth_surface->block.size - 1) << 6) |
|
|
||||||
((depth_surface->height - 1) << 19));
|
|
||||||
OUT_BATCH(0);
|
|
||||||
}
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_depthbuffer = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_depthbuffer,
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Polygon stipple packet
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void upload_polygon_stipple(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_polygon_stipple bps;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
memset(&bps, 0, sizeof(bps));
|
|
||||||
bps.header.opcode = CMD_POLY_STIPPLE_PATTERN;
|
|
||||||
bps.header.length = sizeof(bps)/4-2;
|
|
||||||
|
|
||||||
/* XXX: state tracker should send *all* state down initially!
|
|
||||||
*/
|
|
||||||
if (brw->attribs.PolygonStipple)
|
|
||||||
for (i = 0; i < 32; i++)
|
|
||||||
bps.stipple[i] = brw->attribs.PolygonStipple->stipple[31 - i]; /* invert */
|
|
||||||
|
|
||||||
BRW_CACHED_BATCH_STRUCT(brw, &bps);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_polygon_stipple = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_STIPPLE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_polygon_stipple
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Line stipple packet
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void upload_line_stipple(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_line_stipple bls;
|
|
||||||
float tmp;
|
|
||||||
int tmpi;
|
|
||||||
|
|
||||||
memset(&bls, 0, sizeof(bls));
|
|
||||||
bls.header.opcode = CMD_LINE_STIPPLE_PATTERN;
|
|
||||||
bls.header.length = sizeof(bls)/4 - 2;
|
|
||||||
|
|
||||||
bls.bits0.pattern = brw->attribs.Raster->line_stipple_pattern;
|
|
||||||
bls.bits1.repeat_count = brw->attribs.Raster->line_stipple_factor;
|
|
||||||
|
|
||||||
tmp = 1.0 / (float) brw->attribs.Raster->line_stipple_factor;
|
|
||||||
tmpi = tmp * (1<<13);
|
|
||||||
|
|
||||||
|
|
||||||
bls.bits1.inverse_repeat_count = tmpi;
|
|
||||||
|
|
||||||
BRW_CACHED_BATCH_STRUCT(brw, &bls);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_line_stipple = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_STIPPLE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_line_stipple
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Misc constant state packets
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void upload_pipe_control(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_pipe_control pc;
|
|
||||||
|
|
||||||
return;
|
|
||||||
|
|
||||||
memset(&pc, 0, sizeof(pc));
|
|
||||||
|
|
||||||
pc.header.opcode = CMD_PIPE_CONTROL;
|
|
||||||
pc.header.length = sizeof(pc)/4 - 2;
|
|
||||||
pc.header.post_sync_operation = PIPE_CONTROL_NOWRITE;
|
|
||||||
|
|
||||||
pc.header.instruction_state_cache_flush_enable = 1;
|
|
||||||
|
|
||||||
pc.bits1.dest_addr_type = PIPE_CONTROL_GTTWRITE_GLOBAL;
|
|
||||||
|
|
||||||
BRW_BATCH_STRUCT(brw, &pc);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_pipe_control = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_pipe_control
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Misc invarient state packets
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void upload_invarient_state( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
{
|
|
||||||
struct brw_mi_flush flush;
|
|
||||||
|
|
||||||
memset(&flush, 0, sizeof(flush));
|
|
||||||
flush.opcode = CMD_MI_FLUSH;
|
|
||||||
flush.flags = BRW_FLUSH_STATE_CACHE | BRW_FLUSH_READ_CACHE;
|
|
||||||
BRW_BATCH_STRUCT(brw, &flush);
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
/* 0x61040000 Pipeline Select */
|
|
||||||
/* PipelineSelect : 0 */
|
|
||||||
struct brw_pipeline_select ps;
|
|
||||||
|
|
||||||
memset(&ps, 0, sizeof(ps));
|
|
||||||
ps.header.opcode = CMD_PIPELINE_SELECT;
|
|
||||||
ps.header.pipeline_select = 0;
|
|
||||||
BRW_BATCH_STRUCT(brw, &ps);
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
struct brw_global_depth_offset_clamp gdo;
|
|
||||||
memset(&gdo, 0, sizeof(gdo));
|
|
||||||
|
|
||||||
/* Disable depth offset clamping.
|
|
||||||
*/
|
|
||||||
gdo.header.opcode = CMD_GLOBAL_DEPTH_OFFSET_CLAMP;
|
|
||||||
gdo.header.length = sizeof(gdo)/4 - 2;
|
|
||||||
gdo.depth_offset_clamp = 0.0;
|
|
||||||
|
|
||||||
BRW_BATCH_STRUCT(brw, &gdo);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* 0x61020000 State Instruction Pointer */
|
|
||||||
{
|
|
||||||
struct brw_system_instruction_pointer sip;
|
|
||||||
memset(&sip, 0, sizeof(sip));
|
|
||||||
|
|
||||||
sip.header.opcode = CMD_STATE_INSN_POINTER;
|
|
||||||
sip.header.length = 0;
|
|
||||||
sip.bits0.pad = 0;
|
|
||||||
sip.bits0.system_instruction_pointer = 0;
|
|
||||||
BRW_BATCH_STRUCT(brw, &sip);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
{
|
|
||||||
struct brw_vf_statistics vfs;
|
|
||||||
memset(&vfs, 0, sizeof(vfs));
|
|
||||||
|
|
||||||
vfs.opcode = CMD_VF_STATISTICS;
|
|
||||||
if (BRW_DEBUG & DEBUG_STATS)
|
|
||||||
vfs.statistics_enable = 1;
|
|
||||||
|
|
||||||
BRW_BATCH_STRUCT(brw, &vfs);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
{
|
|
||||||
struct brw_polygon_stipple_offset bpso;
|
|
||||||
|
|
||||||
memset(&bpso, 0, sizeof(bpso));
|
|
||||||
bpso.header.opcode = CMD_POLY_STIPPLE_OFFSET;
|
|
||||||
bpso.header.length = sizeof(bpso)/4-2;
|
|
||||||
bpso.bits0.x_offset = 0;
|
|
||||||
bpso.bits0.y_offset = 0;
|
|
||||||
|
|
||||||
BRW_BATCH_STRUCT(brw, &bpso);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_invarient_state = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_invarient_state
|
|
||||||
};
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Define the base addresses which some state is referenced from.
|
|
||||||
*
|
|
||||||
* This allows us to avoid having to emit relocations in many places for
|
|
||||||
* cached state, and instead emit pointers inside of large, mostly-static
|
|
||||||
* state pools. This comes at the expense of memory, and more expensive cache
|
|
||||||
* misses.
|
|
||||||
*/
|
|
||||||
static void upload_state_base_address( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
/* Output the structure (brw_state_base_address) directly to the
|
|
||||||
* batchbuffer, so we can emit relocations inline.
|
|
||||||
*/
|
|
||||||
BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
|
|
||||||
OUT_BATCH(CMD_STATE_BASE_ADDRESS << 16 | (6 - 2));
|
|
||||||
OUT_RELOC(brw->pool[BRW_GS_POOL].buffer,
|
|
||||||
PIPE_BUFFER_USAGE_GPU_READ,
|
|
||||||
1); /* General state base address */
|
|
||||||
OUT_RELOC(brw->pool[BRW_SS_POOL].buffer,
|
|
||||||
PIPE_BUFFER_USAGE_GPU_READ,
|
|
||||||
1); /* Surface state base address */
|
|
||||||
OUT_BATCH(1); /* Indirect object base address */
|
|
||||||
OUT_BATCH(1); /* General state upper bound */
|
|
||||||
OUT_BATCH(1); /* Indirect object upper bound */
|
|
||||||
ADVANCE_BATCH();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_state_base_address = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = BRW_NEW_SCENE,
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_state_base_address
|
|
||||||
};
|
|
|
@ -1,76 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
#define CMD_MI (0x0 << 29)
|
|
||||||
#define CMD_2D (0x2 << 29)
|
|
||||||
#define CMD_3D (0x3 << 29)
|
|
||||||
|
|
||||||
#define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
|
|
||||||
|
|
||||||
/* Stalls command execution waiting for the given events to have occurred. */
|
|
||||||
#define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23))
|
|
||||||
#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6)
|
|
||||||
#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2)
|
|
||||||
|
|
||||||
/* Primitive dispatch on 830-945 */
|
|
||||||
#define _3DPRIMITIVE (CMD_3D | (0x1f << 24))
|
|
||||||
#define PRIM_INDIRECT (1<<23)
|
|
||||||
#define PRIM_INLINE (0<<23)
|
|
||||||
#define PRIM_INDIRECT_SEQUENTIAL (0<<17)
|
|
||||||
#define PRIM_INDIRECT_ELTS (1<<17)
|
|
||||||
|
|
||||||
#define PRIM3D_TRILIST (0x0<<18)
|
|
||||||
#define PRIM3D_TRISTRIP (0x1<<18)
|
|
||||||
#define PRIM3D_TRISTRIP_RVRSE (0x2<<18)
|
|
||||||
#define PRIM3D_TRIFAN (0x3<<18)
|
|
||||||
#define PRIM3D_POLY (0x4<<18)
|
|
||||||
#define PRIM3D_LINELIST (0x5<<18)
|
|
||||||
#define PRIM3D_LINESTRIP (0x6<<18)
|
|
||||||
#define PRIM3D_RECTLIST (0x7<<18)
|
|
||||||
#define PRIM3D_POINTLIST (0x8<<18)
|
|
||||||
#define PRIM3D_DIB (0x9<<18)
|
|
||||||
#define PRIM3D_MASK (0x1f<<18)
|
|
||||||
|
|
||||||
#define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22) | 6)
|
|
||||||
|
|
||||||
#define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22) | 4)
|
|
||||||
|
|
||||||
#define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22) | 6)
|
|
||||||
|
|
||||||
/* BR00 */
|
|
||||||
#define XY_BLT_WRITE_ALPHA (1 << 21)
|
|
||||||
#define XY_BLT_WRITE_RGB (1 << 20)
|
|
||||||
#define XY_SRC_TILED (1 << 15)
|
|
||||||
#define XY_DST_TILED (1 << 11)
|
|
||||||
|
|
||||||
/* BR13 */
|
|
||||||
#define BR13_565 (0x1 << 24)
|
|
||||||
#define BR13_8888 (0x3 << 24)
|
|
||||||
|
|
||||||
#define FENCE_LINEAR 0
|
|
||||||
#define FENCE_XMAJOR 1
|
|
||||||
#define FENCE_YMAJOR 2
|
|
|
@ -1,244 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
#include "util/u_string.h"
|
|
||||||
#include "util/u_simple_screen.h"
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_screen.h"
|
|
||||||
#include "brw_tex_layout.h"
|
|
||||||
|
|
||||||
|
|
||||||
static const char *
|
|
||||||
brw_get_vendor( struct pipe_screen *screen )
|
|
||||||
{
|
|
||||||
return "VMware, Inc.";
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static const char *
|
|
||||||
brw_get_name( struct pipe_screen *screen )
|
|
||||||
{
|
|
||||||
static char buffer[128];
|
|
||||||
const char *chipset;
|
|
||||||
|
|
||||||
switch (brw_screen(screen)->pci_id) {
|
|
||||||
case PCI_CHIP_I965_Q:
|
|
||||||
chipset = "Intel(R) 965Q";
|
|
||||||
break;
|
|
||||||
case PCI_CHIP_I965_G:
|
|
||||||
case PCI_CHIP_I965_G_1:
|
|
||||||
chipset = "Intel(R) 965G";
|
|
||||||
break;
|
|
||||||
case PCI_CHIP_I965_GM:
|
|
||||||
chipset = "Intel(R) 965GM";
|
|
||||||
break;
|
|
||||||
case PCI_CHIP_I965_GME:
|
|
||||||
chipset = "Intel(R) 965GME/GLE";
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
chipset = "unknown";
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
util_snprintf(buffer, sizeof(buffer), "i965 (chipset: %s)", chipset);
|
|
||||||
return buffer;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static int
|
|
||||||
brw_get_param(struct pipe_screen *screen, int param)
|
|
||||||
{
|
|
||||||
switch (param) {
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
|
|
||||||
return 8;
|
|
||||||
case PIPE_CAP_NPOT_TEXTURES:
|
|
||||||
return 1;
|
|
||||||
case PIPE_CAP_TWO_SIDED_STENCIL:
|
|
||||||
return 1;
|
|
||||||
case PIPE_CAP_GLSL:
|
|
||||||
return 0;
|
|
||||||
case PIPE_CAP_ANISOTROPIC_FILTER:
|
|
||||||
return 0;
|
|
||||||
case PIPE_CAP_POINT_SPRITE:
|
|
||||||
return 0;
|
|
||||||
case PIPE_CAP_MAX_RENDER_TARGETS:
|
|
||||||
return 1;
|
|
||||||
case PIPE_CAP_OCCLUSION_QUERY:
|
|
||||||
return 0;
|
|
||||||
case PIPE_CAP_TEXTURE_SHADOW_MAP:
|
|
||||||
return 1;
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
|
|
||||||
return 11; /* max 1024x1024 */
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
|
|
||||||
return 8; /* max 128x128x128 */
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
|
|
||||||
return 11; /* max 1024x1024 */
|
|
||||||
default:
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static float
|
|
||||||
brw_get_paramf(struct pipe_screen *screen, int param)
|
|
||||||
{
|
|
||||||
switch (param) {
|
|
||||||
case PIPE_CAP_MAX_LINE_WIDTH:
|
|
||||||
/* fall-through */
|
|
||||||
case PIPE_CAP_MAX_LINE_WIDTH_AA:
|
|
||||||
return 7.5;
|
|
||||||
|
|
||||||
case PIPE_CAP_MAX_POINT_WIDTH:
|
|
||||||
/* fall-through */
|
|
||||||
case PIPE_CAP_MAX_POINT_WIDTH_AA:
|
|
||||||
return 255.0;
|
|
||||||
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
|
|
||||||
return 4.0;
|
|
||||||
|
|
||||||
case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
|
|
||||||
return 16.0;
|
|
||||||
|
|
||||||
default:
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static boolean
|
|
||||||
brw_is_format_supported( struct pipe_screen *screen,
|
|
||||||
enum pipe_format format,
|
|
||||||
enum pipe_texture_target target,
|
|
||||||
unsigned tex_usage,
|
|
||||||
unsigned geom_flags )
|
|
||||||
{
|
|
||||||
#if 0
|
|
||||||
/* XXX: This is broken -- rewrite if still needed. */
|
|
||||||
static const unsigned tex_supported[] = {
|
|
||||||
PIPE_FORMAT_R8G8B8A8_UNORM,
|
|
||||||
PIPE_FORMAT_A8R8G8B8_UNORM,
|
|
||||||
PIPE_FORMAT_R5G6B5_UNORM,
|
|
||||||
PIPE_FORMAT_L8_UNORM,
|
|
||||||
PIPE_FORMAT_A8_UNORM,
|
|
||||||
PIPE_FORMAT_I8_UNORM,
|
|
||||||
PIPE_FORMAT_L8A8_UNORM,
|
|
||||||
PIPE_FORMAT_YCBCR,
|
|
||||||
PIPE_FORMAT_YCBCR_REV,
|
|
||||||
PIPE_FORMAT_S8_Z24,
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/* Actually a lot more than this - add later:
|
|
||||||
*/
|
|
||||||
static const unsigned render_supported[] = {
|
|
||||||
PIPE_FORMAT_A8R8G8B8_UNORM,
|
|
||||||
PIPE_FORMAT_R5G6B5_UNORM,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
*/
|
|
||||||
static const unsigned z_stencil_supported[] = {
|
|
||||||
PIPE_FORMAT_Z16_UNORM,
|
|
||||||
PIPE_FORMAT_Z32_UNORM,
|
|
||||||
PIPE_FORMAT_S8Z24_UNORM,
|
|
||||||
};
|
|
||||||
|
|
||||||
switch (type) {
|
|
||||||
case PIPE_RENDER_FORMAT:
|
|
||||||
*numFormats = Elements(render_supported);
|
|
||||||
return render_supported;
|
|
||||||
|
|
||||||
case PIPE_TEX_FORMAT:
|
|
||||||
*numFormats = Elements(tex_supported);
|
|
||||||
return render_supported;
|
|
||||||
|
|
||||||
case PIPE_Z_STENCIL_FORMAT:
|
|
||||||
*numFormats = Elements(render_supported);
|
|
||||||
return render_supported;
|
|
||||||
|
|
||||||
default:
|
|
||||||
*numFormats = 0;
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
switch (format) {
|
|
||||||
case PIPE_FORMAT_A8R8G8B8_UNORM:
|
|
||||||
case PIPE_FORMAT_R5G6B5_UNORM:
|
|
||||||
case PIPE_FORMAT_S8Z24_UNORM:
|
|
||||||
return TRUE;
|
|
||||||
default:
|
|
||||||
return FALSE;
|
|
||||||
};
|
|
||||||
return FALSE;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void
|
|
||||||
brw_destroy_screen( struct pipe_screen *screen )
|
|
||||||
{
|
|
||||||
struct pipe_winsys *winsys = screen->winsys;
|
|
||||||
|
|
||||||
if(winsys->destroy)
|
|
||||||
winsys->destroy(winsys);
|
|
||||||
|
|
||||||
FREE(screen);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Create a new brw_screen object
|
|
||||||
*/
|
|
||||||
struct pipe_screen *
|
|
||||||
brw_create_screen(struct pipe_winsys *winsys, uint pci_id)
|
|
||||||
{
|
|
||||||
struct brw_screen *brwscreen = CALLOC_STRUCT(brw_screen);
|
|
||||||
|
|
||||||
if (!brwscreen)
|
|
||||||
return NULL;
|
|
||||||
|
|
||||||
brwscreen->pci_id = pci_id;
|
|
||||||
|
|
||||||
brwscreen->screen.winsys = winsys;
|
|
||||||
|
|
||||||
brwscreen->screen.destroy = brw_destroy_screen;
|
|
||||||
|
|
||||||
brwscreen->screen.get_name = brw_get_name;
|
|
||||||
brwscreen->screen.get_vendor = brw_get_vendor;
|
|
||||||
brwscreen->screen.get_param = brw_get_param;
|
|
||||||
brwscreen->screen.get_paramf = brw_get_paramf;
|
|
||||||
brwscreen->screen.is_format_supported = brw_is_format_supported;
|
|
||||||
|
|
||||||
brw_init_screen_texture_funcs(&brwscreen->screen);
|
|
||||||
u_simple_screen_init(&brwscreen->screen);
|
|
||||||
|
|
||||||
return &brwscreen->screen;
|
|
||||||
}
|
|
|
@ -1,68 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_SCREEN_H
|
|
||||||
#define BRW_SCREEN_H
|
|
||||||
|
|
||||||
|
|
||||||
#include "pipe/p_screen.h"
|
|
||||||
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C" {
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* Subclass of pipe_screen
|
|
||||||
*/
|
|
||||||
struct brw_screen
|
|
||||||
{
|
|
||||||
struct pipe_screen screen;
|
|
||||||
|
|
||||||
uint pci_id;
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
/** cast wrapper */
|
|
||||||
static INLINE struct brw_screen *
|
|
||||||
brw_screen(struct pipe_screen *pscreen)
|
|
||||||
{
|
|
||||||
return (struct brw_screen *) pscreen;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
extern struct pipe_screen *
|
|
||||||
brw_create_screen(struct pipe_winsys *winsys, uint pci_id);
|
|
||||||
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* BRW_SCREEN_H */
|
|
|
@ -1,351 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_sf.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "tgsi/tgsi_parse.h"
|
|
||||||
|
|
||||||
|
|
||||||
static void compile_sf_prog( struct brw_context *brw,
|
|
||||||
struct brw_sf_prog_key *key )
|
|
||||||
{
|
|
||||||
struct brw_sf_compile c;
|
|
||||||
const unsigned *program;
|
|
||||||
unsigned program_size;
|
|
||||||
|
|
||||||
memset(&c, 0, sizeof(c));
|
|
||||||
|
|
||||||
/* Begin the compilation:
|
|
||||||
*/
|
|
||||||
brw_init_compile(&c.func);
|
|
||||||
|
|
||||||
c.key = *key;
|
|
||||||
|
|
||||||
|
|
||||||
c.nr_attrs = c.key.vp_output_count;
|
|
||||||
c.nr_attr_regs = (c.nr_attrs+1)/2;
|
|
||||||
|
|
||||||
c.nr_setup_attrs = c.key.fp_input_count + 1; /* +1 for position */
|
|
||||||
c.nr_setup_regs = (c.nr_setup_attrs+1)/2;
|
|
||||||
|
|
||||||
c.prog_data.urb_read_length = c.nr_attr_regs;
|
|
||||||
c.prog_data.urb_entry_size = c.nr_setup_regs * 2;
|
|
||||||
|
|
||||||
|
|
||||||
/* Which primitive? Or all three?
|
|
||||||
*/
|
|
||||||
switch (key->primitive) {
|
|
||||||
case SF_TRIANGLES:
|
|
||||||
c.nr_verts = 3;
|
|
||||||
brw_emit_tri_setup( &c );
|
|
||||||
break;
|
|
||||||
case SF_LINES:
|
|
||||||
c.nr_verts = 2;
|
|
||||||
brw_emit_line_setup( &c );
|
|
||||||
break;
|
|
||||||
case SF_POINTS:
|
|
||||||
c.nr_verts = 1;
|
|
||||||
brw_emit_point_setup( &c );
|
|
||||||
break;
|
|
||||||
|
|
||||||
case SF_UNFILLED_TRIS:
|
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* get the program
|
|
||||||
*/
|
|
||||||
program = brw_get_program(&c.func, &program_size);
|
|
||||||
|
|
||||||
/* Upload
|
|
||||||
*/
|
|
||||||
brw->sf.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_SF_PROG],
|
|
||||||
&c.key,
|
|
||||||
sizeof(c.key),
|
|
||||||
program,
|
|
||||||
program_size,
|
|
||||||
&c.prog_data,
|
|
||||||
&brw->sf.prog_data );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static boolean search_cache( struct brw_context *brw,
|
|
||||||
struct brw_sf_prog_key *key )
|
|
||||||
{
|
|
||||||
return brw_search_cache(&brw->cache[BRW_SF_PROG],
|
|
||||||
key, sizeof(*key),
|
|
||||||
&brw->sf.prog_data,
|
|
||||||
&brw->sf.prog_gs_offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Calculate interpolants for triangle and line rasterization.
|
|
||||||
*/
|
|
||||||
static void upload_sf_prog( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
const struct brw_fragment_program *fs = brw->attribs.FragmentProgram;
|
|
||||||
struct brw_sf_prog_key key;
|
|
||||||
struct tgsi_parse_context parse;
|
|
||||||
int i, done = 0;
|
|
||||||
|
|
||||||
|
|
||||||
memset(&key, 0, sizeof(key));
|
|
||||||
|
|
||||||
/* Populate the key, noting state dependencies:
|
|
||||||
*/
|
|
||||||
/* CACHE_NEW_VS_PROG */
|
|
||||||
key.vp_output_count = brw->vs.prog_data->outputs_written;
|
|
||||||
|
|
||||||
/* BRW_NEW_FS */
|
|
||||||
key.fp_input_count = brw->attribs.FragmentProgram->info.file_max[TGSI_FILE_INPUT] + 1;
|
|
||||||
|
|
||||||
|
|
||||||
/* BRW_NEW_REDUCED_PRIMITIVE */
|
|
||||||
switch (brw->reduced_primitive) {
|
|
||||||
case PIPE_PRIM_TRIANGLES:
|
|
||||||
// if (key.attrs & (1<<VERT_RESULT_EDGE))
|
|
||||||
// key.primitive = SF_UNFILLED_TRIS;
|
|
||||||
// else
|
|
||||||
key.primitive = SF_TRIANGLES;
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_LINES:
|
|
||||||
key.primitive = SF_LINES;
|
|
||||||
break;
|
|
||||||
case PIPE_PRIM_POINTS:
|
|
||||||
key.primitive = SF_POINTS;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Scan fp inputs to figure out what interpolation modes are
|
|
||||||
* required for each incoming vp output. There is an assumption
|
|
||||||
* that the state tracker makes sure there is a 1:1 linkage between
|
|
||||||
* these sets of attributes (XXX: position??)
|
|
||||||
*/
|
|
||||||
tgsi_parse_init( &parse, fs->program.tokens );
|
|
||||||
while( !done &&
|
|
||||||
!tgsi_parse_end_of_tokens( &parse ) )
|
|
||||||
{
|
|
||||||
tgsi_parse_token( &parse );
|
|
||||||
|
|
||||||
switch( parse.FullToken.Token.Type ) {
|
|
||||||
case TGSI_TOKEN_TYPE_DECLARATION:
|
|
||||||
if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_INPUT)
|
|
||||||
{
|
|
||||||
int first = parse.FullToken.FullDeclaration.DeclarationRange.First;
|
|
||||||
int last = parse.FullToken.FullDeclaration.DeclarationRange.Last;
|
|
||||||
int interp_mode = parse.FullToken.FullDeclaration.Declaration.Interpolate;
|
|
||||||
//int semantic = parse.FullToken.FullDeclaration.Semantic.SemanticName;
|
|
||||||
//int semantic_index = parse.FullToken.FullDeclaration.Semantic.SemanticIndex;
|
|
||||||
|
|
||||||
debug_printf("fs input %d..%d interp mode %d\n", first, last, interp_mode);
|
|
||||||
|
|
||||||
switch (interp_mode) {
|
|
||||||
case TGSI_INTERPOLATE_CONSTANT:
|
|
||||||
for (i = first; i <= last; i++)
|
|
||||||
key.const_mask |= (1 << i);
|
|
||||||
break;
|
|
||||||
case TGSI_INTERPOLATE_LINEAR:
|
|
||||||
for (i = first; i <= last; i++)
|
|
||||||
key.linear_mask |= (1 << i);
|
|
||||||
break;
|
|
||||||
case TGSI_INTERPOLATE_PERSPECTIVE:
|
|
||||||
for (i = first; i <= last; i++)
|
|
||||||
key.persp_mask |= (1 << i);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Also need stuff for flat shading, twosided color.
|
|
||||||
*/
|
|
||||||
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
done = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Hack: Adjust for position. Optimize away when not required (ie
|
|
||||||
* for perspective interpolation).
|
|
||||||
*/
|
|
||||||
key.persp_mask <<= 1;
|
|
||||||
key.linear_mask <<= 1;
|
|
||||||
key.linear_mask |= 1;
|
|
||||||
key.const_mask <<= 1;
|
|
||||||
|
|
||||||
debug_printf("key.persp_mask: %x\n", key.persp_mask);
|
|
||||||
debug_printf("key.linear_mask: %x\n", key.linear_mask);
|
|
||||||
debug_printf("key.const_mask: %x\n", key.const_mask);
|
|
||||||
|
|
||||||
|
|
||||||
// key.do_point_sprite = brw->attribs.Point->PointSprite;
|
|
||||||
// key.SpriteOrigin = brw->attribs.Point->SpriteOrigin;
|
|
||||||
|
|
||||||
// key.do_flat_shading = (brw->attribs.Raster->flatshade);
|
|
||||||
// key.do_twoside_color = (brw->attribs.Light->Enabled && brw->attribs.Light->Model.TwoSide);
|
|
||||||
|
|
||||||
// if (key.do_twoside_color)
|
|
||||||
// key.frontface_ccw = (brw->attribs.Polygon->FrontFace == GL_CCW);
|
|
||||||
|
|
||||||
|
|
||||||
if (!search_cache(brw, &key))
|
|
||||||
compile_sf_prog( brw, &key );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_sf_prog = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_RASTERIZER |
|
|
||||||
BRW_NEW_REDUCED_PRIMITIVE |
|
|
||||||
BRW_NEW_VS |
|
|
||||||
BRW_NEW_FS),
|
|
||||||
.cache = 0,
|
|
||||||
},
|
|
||||||
.update = upload_sf_prog
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
/* Build a struct like the one we'd like the state tracker to pass to
|
|
||||||
* us.
|
|
||||||
*/
|
|
||||||
static void update_sf_linkage( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
const struct brw_vertex_program *vs = brw->attribs.VertexProgram;
|
|
||||||
const struct brw_fragment_program *fs = brw->attribs.FragmentProgram;
|
|
||||||
struct pipe_setup_linkage state;
|
|
||||||
struct tgsi_parse_context parse;
|
|
||||||
|
|
||||||
int i, j;
|
|
||||||
int nr_vp_outputs = 0;
|
|
||||||
int done = 0;
|
|
||||||
|
|
||||||
struct {
|
|
||||||
unsigned semantic:8;
|
|
||||||
unsigned semantic_index:16;
|
|
||||||
} fp_semantic[32], vp_semantic[32];
|
|
||||||
|
|
||||||
memset(&state, 0, sizeof(state));
|
|
||||||
|
|
||||||
state.fp_input_count = 0;
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
assert(state.fp_input_count == fs->program.num_inputs);
|
|
||||||
|
|
||||||
|
|
||||||
/* Then scan vp outputs
|
|
||||||
*/
|
|
||||||
done = 0;
|
|
||||||
tgsi_parse_init( &parse, vs->program.tokens );
|
|
||||||
while( !done &&
|
|
||||||
!tgsi_parse_end_of_tokens( &parse ) )
|
|
||||||
{
|
|
||||||
tgsi_parse_token( &parse );
|
|
||||||
|
|
||||||
switch( parse.FullToken.Token.Type ) {
|
|
||||||
case TGSI_TOKEN_TYPE_DECLARATION:
|
|
||||||
if (parse.FullToken.FullDeclaration.Declaration.File == TGSI_FILE_INPUT)
|
|
||||||
{
|
|
||||||
int first = parse.FullToken.FullDeclaration.DeclarationRange.First;
|
|
||||||
int last = parse.FullToken.FullDeclaration.DeclarationRange.Last;
|
|
||||||
|
|
||||||
for (i = first; i < last; i++) {
|
|
||||||
vp_semantic[i].semantic =
|
|
||||||
parse.FullToken.FullDeclaration.Semantic.SemanticName;
|
|
||||||
vp_semantic[i].semantic_index =
|
|
||||||
parse.FullToken.FullDeclaration.Semantic.SemanticIndex;
|
|
||||||
}
|
|
||||||
|
|
||||||
assert(last > nr_vp_outputs);
|
|
||||||
nr_vp_outputs = last;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
done = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Now match based on semantic information.
|
|
||||||
*/
|
|
||||||
for (i = 0; i< state.fp_input_count; i++) {
|
|
||||||
for (j = 0; j < nr_vp_outputs; j++) {
|
|
||||||
if (fp_semantic[i].semantic == vp_semantic[j].semantic &&
|
|
||||||
fp_semantic[i].semantic_index == vp_semantic[j].semantic_index) {
|
|
||||||
state.fp_input[i].vp_output = j;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (fp_semantic[i].semantic == TGSI_SEMANTIC_COLOR) {
|
|
||||||
for (j = 0; j < nr_vp_outputs; j++) {
|
|
||||||
if (TGSI_SEMANTIC_BCOLOR == vp_semantic[j].semantic &&
|
|
||||||
fp_semantic[i].semantic_index == vp_semantic[j].semantic_index) {
|
|
||||||
state.fp_input[i].bf_vp_output = j;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (memcmp(&brw->sf.linkage, &state, sizeof(state)) != 0) {
|
|
||||||
brw->sf.linkage = state;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_SF_LINKAGE;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_sf_linkage = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_VS |
|
|
||||||
BRW_NEW_FS),
|
|
||||||
.cache = 0,
|
|
||||||
},
|
|
||||||
.update = update_sf_linkage
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,122 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef BRW_SF_H
|
|
||||||
#define BRW_SF_H
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
|
|
||||||
|
|
||||||
#define SF_POINTS 0
|
|
||||||
#define SF_LINES 1
|
|
||||||
#define SF_TRIANGLES 2
|
|
||||||
#define SF_UNFILLED_TRIS 3
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
struct brw_sf_prog_key {
|
|
||||||
unsigned vp_output_count:5;
|
|
||||||
unsigned fp_input_count:5;
|
|
||||||
|
|
||||||
unsigned primitive:2;
|
|
||||||
unsigned do_twoside_color:1;
|
|
||||||
unsigned do_flat_shading:1;
|
|
||||||
unsigned frontface_ccw:1;
|
|
||||||
unsigned do_point_sprite:1;
|
|
||||||
|
|
||||||
/* Interpolation masks;
|
|
||||||
*/
|
|
||||||
unsigned linear_mask;
|
|
||||||
unsigned persp_mask;
|
|
||||||
unsigned const_mask;
|
|
||||||
|
|
||||||
|
|
||||||
// int SpriteOrigin;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_sf_point_tex {
|
|
||||||
boolean CoordReplace;
|
|
||||||
};
|
|
||||||
|
|
||||||
struct brw_sf_compile {
|
|
||||||
struct brw_compile func;
|
|
||||||
struct brw_sf_prog_key key;
|
|
||||||
struct brw_sf_prog_data prog_data;
|
|
||||||
|
|
||||||
struct brw_reg pv;
|
|
||||||
struct brw_reg det;
|
|
||||||
struct brw_reg dx0;
|
|
||||||
struct brw_reg dx2;
|
|
||||||
struct brw_reg dy0;
|
|
||||||
struct brw_reg dy2;
|
|
||||||
|
|
||||||
/* z and 1/w passed in seperately:
|
|
||||||
*/
|
|
||||||
struct brw_reg z[3];
|
|
||||||
struct brw_reg inv_w[3];
|
|
||||||
|
|
||||||
/* The vertices:
|
|
||||||
*/
|
|
||||||
struct brw_reg vert[3];
|
|
||||||
|
|
||||||
/* Temporaries, allocated after last vertex reg.
|
|
||||||
*/
|
|
||||||
struct brw_reg inv_det;
|
|
||||||
struct brw_reg a1_sub_a0;
|
|
||||||
struct brw_reg a2_sub_a0;
|
|
||||||
struct brw_reg tmp;
|
|
||||||
|
|
||||||
struct brw_reg m1Cx;
|
|
||||||
struct brw_reg m2Cy;
|
|
||||||
struct brw_reg m3C0;
|
|
||||||
|
|
||||||
unsigned nr_verts;
|
|
||||||
unsigned nr_attrs;
|
|
||||||
unsigned nr_attr_regs;
|
|
||||||
unsigned nr_setup_attrs;
|
|
||||||
unsigned nr_setup_regs;
|
|
||||||
#if 0
|
|
||||||
ubyte attr_to_idx[VERT_RESULT_MAX];
|
|
||||||
ubyte idx_to_attr[VERT_RESULT_MAX];
|
|
||||||
struct brw_sf_point_tex point_attrs[VERT_RESULT_MAX];
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_tri_setup( struct brw_sf_compile *c );
|
|
||||||
void brw_emit_line_setup( struct brw_sf_compile *c );
|
|
||||||
void brw_emit_point_setup( struct brw_sf_compile *c );
|
|
||||||
void brw_emit_point_sprite_setup( struct brw_sf_compile *c );
|
|
||||||
void brw_emit_anyprim_setup( struct brw_sf_compile *c );
|
|
||||||
|
|
||||||
#endif
|
|
|
@ -1,382 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_eu.h"
|
|
||||||
#include "brw_util.h"
|
|
||||||
#include "brw_sf.h"
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/***********************************************************************
|
|
||||||
* Triangle setup.
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
static void alloc_regs( struct brw_sf_compile *c )
|
|
||||||
{
|
|
||||||
unsigned reg, i;
|
|
||||||
|
|
||||||
/* Values computed by fixed function unit:
|
|
||||||
*/
|
|
||||||
c->pv = retype(brw_vec1_grf(1, 1), BRW_REGISTER_TYPE_UD);
|
|
||||||
c->det = brw_vec1_grf(1, 2);
|
|
||||||
c->dx0 = brw_vec1_grf(1, 3);
|
|
||||||
c->dx2 = brw_vec1_grf(1, 4);
|
|
||||||
c->dy0 = brw_vec1_grf(1, 5);
|
|
||||||
c->dy2 = brw_vec1_grf(1, 6);
|
|
||||||
|
|
||||||
/* z and 1/w passed in seperately:
|
|
||||||
*/
|
|
||||||
c->z[0] = brw_vec1_grf(2, 0);
|
|
||||||
c->inv_w[0] = brw_vec1_grf(2, 1);
|
|
||||||
c->z[1] = brw_vec1_grf(2, 2);
|
|
||||||
c->inv_w[1] = brw_vec1_grf(2, 3);
|
|
||||||
c->z[2] = brw_vec1_grf(2, 4);
|
|
||||||
c->inv_w[2] = brw_vec1_grf(2, 5);
|
|
||||||
|
|
||||||
/* The vertices:
|
|
||||||
*/
|
|
||||||
reg = 3;
|
|
||||||
for (i = 0; i < c->nr_verts; i++) {
|
|
||||||
c->vert[i] = brw_vec8_grf(reg, 0);
|
|
||||||
reg += c->nr_attr_regs;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Temporaries, allocated after last vertex reg.
|
|
||||||
*/
|
|
||||||
c->inv_det = brw_vec1_grf(reg, 0); reg++;
|
|
||||||
c->a1_sub_a0 = brw_vec8_grf(reg, 0); reg++;
|
|
||||||
c->a2_sub_a0 = brw_vec8_grf(reg, 0); reg++;
|
|
||||||
c->tmp = brw_vec8_grf(reg, 0); reg++;
|
|
||||||
|
|
||||||
/* Note grf allocation:
|
|
||||||
*/
|
|
||||||
c->prog_data.total_grf = reg;
|
|
||||||
|
|
||||||
|
|
||||||
/* Outputs of this program - interpolation coefficients for
|
|
||||||
* rasterization:
|
|
||||||
*/
|
|
||||||
c->m1Cx = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 1, 0);
|
|
||||||
c->m2Cy = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 2, 0);
|
|
||||||
c->m3C0 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 3, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void copy_z_inv_w( struct brw_sf_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
brw_push_insn_state(p);
|
|
||||||
|
|
||||||
/* Copy both scalars with a single MOV:
|
|
||||||
*/
|
|
||||||
for (i = 0; i < c->nr_verts; i++)
|
|
||||||
brw_MOV(p, vec2(suboffset(c->vert[i], 2)), vec2(c->z[i]));
|
|
||||||
|
|
||||||
brw_pop_insn_state(p);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void invert_det( struct brw_sf_compile *c)
|
|
||||||
{
|
|
||||||
brw_math(&c->func,
|
|
||||||
c->inv_det,
|
|
||||||
BRW_MATH_FUNCTION_INV,
|
|
||||||
BRW_MATH_SATURATE_NONE,
|
|
||||||
0,
|
|
||||||
c->det,
|
|
||||||
BRW_MATH_DATA_SCALAR,
|
|
||||||
BRW_MATH_PRECISION_FULL);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
#define NON_PERPECTIVE_ATTRS (FRAG_BIT_WPOS | \
|
|
||||||
FRAG_BIT_COL0 | \
|
|
||||||
FRAG_BIT_COL1)
|
|
||||||
|
|
||||||
static boolean calculate_masks( struct brw_sf_compile *c,
|
|
||||||
unsigned reg,
|
|
||||||
ushort *pc,
|
|
||||||
ushort *pc_persp,
|
|
||||||
ushort *pc_linear)
|
|
||||||
{
|
|
||||||
boolean is_last_attr = (reg == c->nr_setup_regs - 1);
|
|
||||||
unsigned persp_mask = c->key.persp_mask;
|
|
||||||
unsigned linear_mask = c->key.linear_mask;
|
|
||||||
|
|
||||||
debug_printf("persp_mask: %x\n", persp_mask);
|
|
||||||
debug_printf("linear_mask: %x\n", linear_mask);
|
|
||||||
|
|
||||||
*pc_persp = 0;
|
|
||||||
*pc_linear = 0;
|
|
||||||
*pc = 0xf;
|
|
||||||
|
|
||||||
if (persp_mask & (1 << (reg*2)))
|
|
||||||
*pc_persp = 0xf;
|
|
||||||
|
|
||||||
if (linear_mask & (1 << (reg*2)))
|
|
||||||
*pc_linear = 0xf;
|
|
||||||
|
|
||||||
/* Maybe only processs one attribute on the final round:
|
|
||||||
*/
|
|
||||||
if (reg*2+1 < c->nr_setup_attrs) {
|
|
||||||
*pc |= 0xf0;
|
|
||||||
|
|
||||||
if (persp_mask & (1 << (reg*2+1)))
|
|
||||||
*pc_persp |= 0xf0;
|
|
||||||
|
|
||||||
if (linear_mask & (1 << (reg*2+1)))
|
|
||||||
*pc_linear |= 0xf0;
|
|
||||||
}
|
|
||||||
|
|
||||||
debug_printf("pc: %x\n", *pc);
|
|
||||||
debug_printf("pc_persp: %x\n", *pc_persp);
|
|
||||||
debug_printf("pc_linear: %x\n", *pc_linear);
|
|
||||||
|
|
||||||
|
|
||||||
return is_last_attr;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_tri_setup( struct brw_sf_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
debug_printf("%s START ==============\n", __FUNCTION__);
|
|
||||||
|
|
||||||
c->nr_verts = 3;
|
|
||||||
alloc_regs(c);
|
|
||||||
invert_det(c);
|
|
||||||
copy_z_inv_w(c);
|
|
||||||
|
|
||||||
|
|
||||||
for (i = 0; i < c->nr_setup_regs; i++)
|
|
||||||
{
|
|
||||||
/* Pair of incoming attributes:
|
|
||||||
*/
|
|
||||||
struct brw_reg a0 = offset(c->vert[0], i);
|
|
||||||
struct brw_reg a1 = offset(c->vert[1], i);
|
|
||||||
struct brw_reg a2 = offset(c->vert[2], i);
|
|
||||||
ushort pc = 0, pc_persp = 0, pc_linear = 0;
|
|
||||||
boolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear);
|
|
||||||
|
|
||||||
if (pc_persp)
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc_persp);
|
|
||||||
brw_MUL(p, a0, a0, c->inv_w[0]);
|
|
||||||
brw_MUL(p, a1, a1, c->inv_w[1]);
|
|
||||||
brw_MUL(p, a2, a2, c->inv_w[2]);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Calculate coefficients for interpolated values:
|
|
||||||
*/
|
|
||||||
if (pc_linear)
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc_linear);
|
|
||||||
|
|
||||||
brw_ADD(p, c->a1_sub_a0, a1, negate(a0));
|
|
||||||
brw_ADD(p, c->a2_sub_a0, a2, negate(a0));
|
|
||||||
|
|
||||||
/* calculate dA/dx
|
|
||||||
*/
|
|
||||||
brw_MUL(p, brw_null_reg(), c->a1_sub_a0, c->dy2);
|
|
||||||
brw_MAC(p, c->tmp, c->a2_sub_a0, negate(c->dy0));
|
|
||||||
brw_MUL(p, c->m1Cx, c->tmp, c->inv_det);
|
|
||||||
|
|
||||||
/* calculate dA/dy
|
|
||||||
*/
|
|
||||||
brw_MUL(p, brw_null_reg(), c->a2_sub_a0, c->dx0);
|
|
||||||
brw_MAC(p, c->tmp, c->a1_sub_a0, negate(c->dx2));
|
|
||||||
brw_MUL(p, c->m2Cy, c->tmp, c->inv_det);
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc);
|
|
||||||
/* start point for interpolation
|
|
||||||
*/
|
|
||||||
brw_MOV(p, c->m3C0, a0);
|
|
||||||
|
|
||||||
/* Copy m0..m3 to URB. m0 is implicitly copied from r0 in
|
|
||||||
* the send instruction:
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
brw_null_reg(),
|
|
||||||
0,
|
|
||||||
brw_vec8_grf(0, 0), /* r0, will be copied to m0 */
|
|
||||||
0, /* allocate */
|
|
||||||
1, /* used */
|
|
||||||
4, /* msg len */
|
|
||||||
0, /* response len */
|
|
||||||
last, /* eot */
|
|
||||||
last, /* writes complete */
|
|
||||||
i*4, /* offset */
|
|
||||||
BRW_URB_SWIZZLE_TRANSPOSE); /* XXX: Swizzle control "SF to windower" */
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
debug_printf("%s DONE ==============\n", __FUNCTION__);
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void brw_emit_line_setup( struct brw_sf_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
|
|
||||||
c->nr_verts = 2;
|
|
||||||
alloc_regs(c);
|
|
||||||
invert_det(c);
|
|
||||||
copy_z_inv_w(c);
|
|
||||||
|
|
||||||
for (i = 0; i < c->nr_setup_regs; i++)
|
|
||||||
{
|
|
||||||
/* Pair of incoming attributes:
|
|
||||||
*/
|
|
||||||
struct brw_reg a0 = offset(c->vert[0], i);
|
|
||||||
struct brw_reg a1 = offset(c->vert[1], i);
|
|
||||||
ushort pc, pc_persp, pc_linear;
|
|
||||||
boolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear);
|
|
||||||
|
|
||||||
if (pc_persp)
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc_persp);
|
|
||||||
brw_MUL(p, a0, a0, c->inv_w[0]);
|
|
||||||
brw_MUL(p, a1, a1, c->inv_w[1]);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Calculate coefficients for position, color:
|
|
||||||
*/
|
|
||||||
if (pc_linear) {
|
|
||||||
brw_set_predicate_control_flag_value(p, pc_linear);
|
|
||||||
|
|
||||||
brw_ADD(p, c->a1_sub_a0, a1, negate(a0));
|
|
||||||
|
|
||||||
brw_MUL(p, c->tmp, c->a1_sub_a0, c->dx0);
|
|
||||||
brw_MUL(p, c->m1Cx, c->tmp, c->inv_det);
|
|
||||||
|
|
||||||
brw_MUL(p, c->tmp, c->a1_sub_a0, c->dy0);
|
|
||||||
brw_MUL(p, c->m2Cy, c->tmp, c->inv_det);
|
|
||||||
}
|
|
||||||
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc);
|
|
||||||
|
|
||||||
/* start point for interpolation
|
|
||||||
*/
|
|
||||||
brw_MOV(p, c->m3C0, a0);
|
|
||||||
|
|
||||||
/* Copy m0..m3 to URB.
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
brw_null_reg(),
|
|
||||||
0,
|
|
||||||
brw_vec8_grf(0, 0),
|
|
||||||
0, /* allocate */
|
|
||||||
1, /* used */
|
|
||||||
4, /* msg len */
|
|
||||||
0, /* response len */
|
|
||||||
last, /* eot */
|
|
||||||
last, /* writes complete */
|
|
||||||
i*4, /* urb destination offset */
|
|
||||||
BRW_URB_SWIZZLE_TRANSPOSE);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* Points setup - several simplifications as all attributes are
|
|
||||||
* constant across the face of the point (point sprites excluded!)
|
|
||||||
*/
|
|
||||||
void brw_emit_point_setup( struct brw_sf_compile *c )
|
|
||||||
{
|
|
||||||
struct brw_compile *p = &c->func;
|
|
||||||
unsigned i;
|
|
||||||
|
|
||||||
c->nr_verts = 1;
|
|
||||||
alloc_regs(c);
|
|
||||||
copy_z_inv_w(c);
|
|
||||||
|
|
||||||
brw_MOV(p, c->m1Cx, brw_imm_ud(0)); /* zero - move out of loop */
|
|
||||||
brw_MOV(p, c->m2Cy, brw_imm_ud(0)); /* zero - move out of loop */
|
|
||||||
|
|
||||||
for (i = 0; i < c->nr_setup_regs; i++)
|
|
||||||
{
|
|
||||||
struct brw_reg a0 = offset(c->vert[0], i);
|
|
||||||
ushort pc, pc_persp, pc_linear;
|
|
||||||
boolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear);
|
|
||||||
|
|
||||||
if (pc_persp)
|
|
||||||
{
|
|
||||||
/* This seems odd as the values are all constant, but the
|
|
||||||
* fragment shader will be expecting it:
|
|
||||||
*/
|
|
||||||
brw_set_predicate_control_flag_value(p, pc_persp);
|
|
||||||
brw_MUL(p, a0, a0, c->inv_w[0]);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/* The delta values are always zero, just send the starting
|
|
||||||
* coordinate. Again, this is to fit in with the interpolation
|
|
||||||
* code in the fragment shader.
|
|
||||||
*/
|
|
||||||
{
|
|
||||||
brw_set_predicate_control_flag_value(p, pc);
|
|
||||||
|
|
||||||
brw_MOV(p, c->m3C0, a0); /* constant value */
|
|
||||||
|
|
||||||
/* Copy m0..m3 to URB.
|
|
||||||
*/
|
|
||||||
brw_urb_WRITE(p,
|
|
||||||
brw_null_reg(),
|
|
||||||
0,
|
|
||||||
brw_vec8_grf(0, 0),
|
|
||||||
0, /* allocate */
|
|
||||||
1, /* used */
|
|
||||||
4, /* msg len */
|
|
||||||
0, /* response len */
|
|
||||||
last, /* eot */
|
|
||||||
last, /* writes complete */
|
|
||||||
i*4, /* urb destination offset */
|
|
||||||
BRW_URB_SWIZZLE_TRANSPOSE);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
|
@ -1,181 +0,0 @@
|
||||||
/*
|
|
||||||
Copyright (C) Intel Corp. 2006. All Rights Reserved.
|
|
||||||
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
|
|
||||||
develop this 3D driver.
|
|
||||||
|
|
||||||
Permission is hereby granted, free of charge, to any person obtaining
|
|
||||||
a copy of this software and associated documentation files (the
|
|
||||||
"Software"), to deal in the Software without restriction, including
|
|
||||||
without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
distribute, sublicense, and/or sell copies of the Software, and to
|
|
||||||
permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
the following conditions:
|
|
||||||
|
|
||||||
The above copyright notice and this permission notice (including the
|
|
||||||
next paragraph) shall be included in all copies or substantial
|
|
||||||
portions of the Software.
|
|
||||||
|
|
||||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
||||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
|
||||||
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
|
|
||||||
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
|
|
||||||
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
|
|
||||||
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
|
|
||||||
**********************************************************************/
|
|
||||||
/*
|
|
||||||
* Authors:
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "util/u_math.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
|
|
||||||
|
|
||||||
static void upload_sf_vp(struct brw_context *brw)
|
|
||||||
{
|
|
||||||
struct brw_sf_viewport sfv;
|
|
||||||
|
|
||||||
memset(&sfv, 0, sizeof(sfv));
|
|
||||||
|
|
||||||
|
|
||||||
/* BRW_NEW_VIEWPORT */
|
|
||||||
{
|
|
||||||
const float *scale = brw->attribs.Viewport.scale;
|
|
||||||
const float *trans = brw->attribs.Viewport.translate;
|
|
||||||
|
|
||||||
sfv.viewport.m00 = scale[0];
|
|
||||||
sfv.viewport.m11 = scale[1];
|
|
||||||
sfv.viewport.m22 = scale[2];
|
|
||||||
sfv.viewport.m30 = trans[0];
|
|
||||||
sfv.viewport.m31 = trans[1];
|
|
||||||
sfv.viewport.m32 = trans[2];
|
|
||||||
}
|
|
||||||
|
|
||||||
/* _NEW_SCISSOR */
|
|
||||||
sfv.scissor.xmin = brw->attribs.Scissor.minx;
|
|
||||||
sfv.scissor.xmax = brw->attribs.Scissor.maxx - 1;
|
|
||||||
sfv.scissor.ymin = brw->attribs.Scissor.miny;
|
|
||||||
sfv.scissor.ymax = brw->attribs.Scissor.maxy - 1;
|
|
||||||
|
|
||||||
brw->sf.vp_gs_offset = brw_cache_data( &brw->cache[BRW_SF_VP], &sfv );
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_sf_vp = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_SCISSOR |
|
|
||||||
BRW_NEW_VIEWPORT),
|
|
||||||
.cache = 0
|
|
||||||
},
|
|
||||||
.update = upload_sf_vp
|
|
||||||
};
|
|
||||||
|
|
||||||
static void upload_sf_unit( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
struct brw_sf_unit_state sf;
|
|
||||||
memset(&sf, 0, sizeof(sf));
|
|
||||||
|
|
||||||
/* CACHE_NEW_SF_PROG */
|
|
||||||
sf.thread0.grf_reg_count = align(brw->sf.prog_data->total_grf, 16) / 16 - 1;
|
|
||||||
sf.thread0.kernel_start_pointer = brw->sf.prog_gs_offset >> 6;
|
|
||||||
sf.thread3.urb_entry_read_length = brw->sf.prog_data->urb_read_length;
|
|
||||||
|
|
||||||
sf.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
|
|
||||||
sf.thread3.dispatch_grf_start_reg = 3;
|
|
||||||
sf.thread3.urb_entry_read_offset = 1;
|
|
||||||
|
|
||||||
/* BRW_NEW_URB_FENCE */
|
|
||||||
sf.thread4.nr_urb_entries = brw->urb.nr_sf_entries;
|
|
||||||
sf.thread4.urb_entry_allocation_size = brw->urb.sfsize - 1;
|
|
||||||
sf.thread4.max_threads = MIN2(12, brw->urb.nr_sf_entries / 2) - 1;
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_SINGLE_THREAD)
|
|
||||||
sf.thread4.max_threads = 0;
|
|
||||||
|
|
||||||
if (BRW_DEBUG & DEBUG_STATS)
|
|
||||||
sf.thread4.stats_enable = 1;
|
|
||||||
|
|
||||||
/* CACHE_NEW_SF_VP */
|
|
||||||
sf.sf5.sf_viewport_state_offset = brw->sf.vp_gs_offset >> 5;
|
|
||||||
sf.sf5.viewport_transform = 1;
|
|
||||||
|
|
||||||
/* BRW_NEW_RASTER */
|
|
||||||
if (brw->attribs.Raster->scissor)
|
|
||||||
sf.sf6.scissor = 1;
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
if (brw->attribs.Polygon->FrontFace == GL_CCW)
|
|
||||||
sf.sf5.front_winding = BRW_FRONTWINDING_CCW;
|
|
||||||
else
|
|
||||||
sf.sf5.front_winding = BRW_FRONTWINDING_CW;
|
|
||||||
|
|
||||||
|
|
||||||
if (brw->attribs.Polygon->CullFlag) {
|
|
||||||
switch (brw->attribs.Polygon->CullFaceMode) {
|
|
||||||
case GL_FRONT:
|
|
||||||
sf.sf6.cull_mode = BRW_CULLMODE_FRONT;
|
|
||||||
break;
|
|
||||||
case GL_BACK:
|
|
||||||
sf.sf6.cull_mode = BRW_CULLMODE_BACK;
|
|
||||||
break;
|
|
||||||
case GL_FRONT_AND_BACK:
|
|
||||||
sf.sf6.cull_mode = BRW_CULLMODE_BOTH;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
assert(0);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
sf.sf6.cull_mode = BRW_CULLMODE_NONE;
|
|
||||||
#else
|
|
||||||
sf.sf5.front_winding = BRW_FRONTWINDING_CCW;
|
|
||||||
sf.sf6.cull_mode = BRW_CULLMODE_NONE;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
sf.sf6.line_width = CLAMP(brw->attribs.Raster->line_width, 1.0, 5.0) * (1<<1);
|
|
||||||
|
|
||||||
sf.sf6.line_endcap_aa_region_width = 1;
|
|
||||||
if (brw->attribs.Raster->line_smooth)
|
|
||||||
sf.sf6.aa_enable = 1;
|
|
||||||
else if (sf.sf6.line_width <= 0x2)
|
|
||||||
sf.sf6.line_width = 0;
|
|
||||||
|
|
||||||
sf.sf6.point_rast_rule = 1; /* opengl conventions */
|
|
||||||
|
|
||||||
sf.sf7.sprite_point = brw->attribs.Raster->point_sprite;
|
|
||||||
sf.sf7.point_size = CLAMP(brw->attribs.Raster->line_width, 1.0, 255.0) * (1<<3);
|
|
||||||
sf.sf7.use_point_size_state = !brw->attribs.Raster->point_size_per_vertex;
|
|
||||||
|
|
||||||
/* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons:
|
|
||||||
*/
|
|
||||||
sf.sf7.trifan_pv = 2;
|
|
||||||
sf.sf7.linestrip_pv = 1;
|
|
||||||
sf.sf7.tristrip_pv = 2;
|
|
||||||
sf.sf7.line_last_pixel_enable = 0;
|
|
||||||
|
|
||||||
/* Set bias for OpenGL rasterization rules:
|
|
||||||
*/
|
|
||||||
sf.sf6.dest_org_vbias = 0x8;
|
|
||||||
sf.sf6.dest_org_hbias = 0x8;
|
|
||||||
|
|
||||||
brw->sf.state_gs_offset = brw_cache_data( &brw->cache[BRW_SF_UNIT], &sf );
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
const struct brw_tracked_state brw_sf_unit = {
|
|
||||||
.dirty = {
|
|
||||||
.brw = (BRW_NEW_RASTERIZER |
|
|
||||||
BRW_NEW_URB_FENCE),
|
|
||||||
.cache = (CACHE_NEW_SF_VP |
|
|
||||||
CACHE_NEW_SF_PROG)
|
|
||||||
},
|
|
||||||
.update = upload_sf_unit
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
|
@ -1,48 +0,0 @@
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
#include "pipe/p_shader_tokens.h"
|
|
||||||
#include "tgsi/tgsi_parse.h"
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* XXX this obsolete new and no longer compiled.
|
|
||||||
*/
|
|
||||||
void brw_shader_info(const struct tgsi_token *tokens,
|
|
||||||
struct brw_shader_info *info )
|
|
||||||
{
|
|
||||||
struct tgsi_parse_context parse;
|
|
||||||
int done = 0;
|
|
||||||
|
|
||||||
tgsi_parse_init( &parse, tokens );
|
|
||||||
|
|
||||||
while( !done &&
|
|
||||||
!tgsi_parse_end_of_tokens( &parse ) )
|
|
||||||
{
|
|
||||||
tgsi_parse_token( &parse );
|
|
||||||
|
|
||||||
switch( parse.FullToken.Token.Type ) {
|
|
||||||
case TGSI_TOKEN_TYPE_DECLARATION:
|
|
||||||
{
|
|
||||||
const struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
|
|
||||||
unsigned last = decl->DeclarationRange.Last;
|
|
||||||
|
|
||||||
// Broken by crazy wpos init:
|
|
||||||
//assert( info->nr_regs[decl->Declaration.File] <= last);
|
|
||||||
|
|
||||||
info->nr_regs[decl->Declaration.File] = MAX2(info->nr_regs[decl->Declaration.File],
|
|
||||||
last+1);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
case TGSI_TOKEN_TYPE_IMMEDIATE:
|
|
||||||
case TGSI_TOKEN_TYPE_INSTRUCTION:
|
|
||||||
default:
|
|
||||||
done = 1;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
tgsi_parse_free (&parse);
|
|
||||||
|
|
||||||
}
|
|
|
@ -1,469 +0,0 @@
|
||||||
/**************************************************************************
|
|
||||||
*
|
|
||||||
* Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the
|
|
||||||
* "Software"), to deal in the Software without restriction, including
|
|
||||||
* without limitation the rights to use, copy, modify, merge, publish,
|
|
||||||
* distribute, sub license, and/or sell copies of the Software, and to
|
|
||||||
* permit persons to whom the Software is furnished to do so, subject to
|
|
||||||
* the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the
|
|
||||||
* next paragraph) shall be included in all copies or substantial portions
|
|
||||||
* of the Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
|
|
||||||
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
|
||||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
|
|
||||||
* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
|
|
||||||
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
|
||||||
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
|
||||||
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
**************************************************************************/
|
|
||||||
|
|
||||||
/* Authors: Zack Rusin <zack@tungstengraphics.com>
|
|
||||||
* Keith Whitwell <keith@tungstengraphics.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#include "pipe/internal/p_winsys_screen.h"
|
|
||||||
#include "util/u_memory.h"
|
|
||||||
#include "pipe/p_inlines.h"
|
|
||||||
#include "pipe/p_shader_tokens.h"
|
|
||||||
#include "tgsi/tgsi_dump.h"
|
|
||||||
#include "tgsi/tgsi_parse.h"
|
|
||||||
|
|
||||||
#include "brw_context.h"
|
|
||||||
#include "brw_defines.h"
|
|
||||||
#include "brw_state.h"
|
|
||||||
#include "brw_draw.h"
|
|
||||||
|
|
||||||
|
|
||||||
#define DUP( TYPE, VAL ) \
|
|
||||||
do { \
|
|
||||||
struct TYPE *x = malloc(sizeof(*x)); \
|
|
||||||
memcpy(x, VAL, sizeof(*x) ); \
|
|
||||||
return x; \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Blend
|
|
||||||
*/
|
|
||||||
static void *
|
|
||||||
brw_create_blend_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_blend_state *blend)
|
|
||||||
{
|
|
||||||
DUP( pipe_blend_state, blend );
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_blend_state(struct pipe_context *pipe,
|
|
||||||
void *blend)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.Blend = (struct pipe_blend_state*)blend;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_BLEND;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_delete_blend_state(struct pipe_context *pipe, void *blend)
|
|
||||||
{
|
|
||||||
free(blend);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_set_blend_color( struct pipe_context *pipe,
|
|
||||||
const struct pipe_blend_color *blend_color )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.BlendColor = *blend_color;
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_BLEND;
|
|
||||||
}
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Sampler
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void *
|
|
||||||
brw_create_sampler_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_sampler_state *sampler)
|
|
||||||
{
|
|
||||||
DUP( pipe_sampler_state, sampler );
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_sampler_states(struct pipe_context *pipe,
|
|
||||||
unsigned num, void **sampler)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
assert(num <= PIPE_MAX_SAMPLERS);
|
|
||||||
|
|
||||||
/* Check for no-op */
|
|
||||||
if (num == brw->num_samplers &&
|
|
||||||
!memcmp(brw->attribs.Samplers, sampler, num * sizeof(void *)))
|
|
||||||
return;
|
|
||||||
|
|
||||||
memcpy(brw->attribs.Samplers, sampler, num * sizeof(void *));
|
|
||||||
memset(&brw->attribs.Samplers[num], 0, (PIPE_MAX_SAMPLERS - num) *
|
|
||||||
sizeof(void *));
|
|
||||||
|
|
||||||
brw->num_samplers = num;
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_SAMPLER;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_delete_sampler_state(struct pipe_context *pipe,
|
|
||||||
void *sampler)
|
|
||||||
{
|
|
||||||
free(sampler);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Depth stencil
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void *
|
|
||||||
brw_create_depth_stencil_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_depth_stencil_alpha_state *depth_stencil)
|
|
||||||
{
|
|
||||||
DUP( pipe_depth_stencil_alpha_state, depth_stencil );
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_depth_stencil_state(struct pipe_context *pipe,
|
|
||||||
void *depth_stencil)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.DepthStencil = (const struct pipe_depth_stencil_alpha_state *)depth_stencil;
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_DEPTH_STENCIL;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_delete_depth_stencil_state(struct pipe_context *pipe,
|
|
||||||
void *depth_stencil)
|
|
||||||
{
|
|
||||||
free(depth_stencil);
|
|
||||||
}
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Scissor
|
|
||||||
*/
|
|
||||||
static void brw_set_scissor_state( struct pipe_context *pipe,
|
|
||||||
const struct pipe_scissor_state *scissor )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
memcpy( &brw->attribs.Scissor, scissor, sizeof(*scissor) );
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_SCISSOR;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Stipple
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void brw_set_polygon_stipple( struct pipe_context *pipe,
|
|
||||||
const struct pipe_poly_stipple *stipple )
|
|
||||||
{
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Fragment shader
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void * brw_create_fs_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_shader_state *shader)
|
|
||||||
{
|
|
||||||
struct brw_fragment_program *brw_fp = CALLOC_STRUCT(brw_fragment_program);
|
|
||||||
|
|
||||||
brw_fp->program.tokens = tgsi_dup_tokens(shader->tokens);
|
|
||||||
brw_fp->id = brw_context(pipe)->program_id++;
|
|
||||||
|
|
||||||
tgsi_scan_shader(shader->tokens, &brw_fp->info);
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
brw_shader_info(shader->tokens,
|
|
||||||
&brw_fp->info2);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
tgsi_dump(shader->tokens, 0);
|
|
||||||
|
|
||||||
|
|
||||||
return (void *)brw_fp;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_fs_state(struct pipe_context *pipe, void *shader)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.FragmentProgram = (struct brw_fragment_program *)shader;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_FS;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_delete_fs_state(struct pipe_context *pipe, void *shader)
|
|
||||||
{
|
|
||||||
struct brw_fragment_program *brw_fp = (struct brw_fragment_program *) shader;
|
|
||||||
|
|
||||||
FREE((void *) brw_fp->program.tokens);
|
|
||||||
FREE(brw_fp);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Vertex shader and other TNL state
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void *brw_create_vs_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_shader_state *shader)
|
|
||||||
{
|
|
||||||
struct brw_vertex_program *brw_vp = CALLOC_STRUCT(brw_vertex_program);
|
|
||||||
|
|
||||||
brw_vp->program.tokens = tgsi_dup_tokens(shader->tokens);
|
|
||||||
brw_vp->id = brw_context(pipe)->program_id++;
|
|
||||||
|
|
||||||
tgsi_scan_shader(shader->tokens, &brw_vp->info);
|
|
||||||
|
|
||||||
#if 0
|
|
||||||
brw_shader_info(shader->tokens,
|
|
||||||
&brw_vp->info2);
|
|
||||||
#endif
|
|
||||||
tgsi_dump(shader->tokens, 0);
|
|
||||||
|
|
||||||
return (void *)brw_vp;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_vs_state(struct pipe_context *pipe, void *vs)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.VertexProgram = (struct brw_vertex_program *)vs;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_VS;
|
|
||||||
|
|
||||||
debug_printf("YYYYYYYYYYYYY BINDING VERTEX SHADER\n");
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_delete_vs_state(struct pipe_context *pipe, void *shader)
|
|
||||||
{
|
|
||||||
struct brw_vertex_program *brw_vp = (struct brw_vertex_program *) shader;
|
|
||||||
|
|
||||||
FREE((void *) brw_vp->program.tokens);
|
|
||||||
FREE(brw_vp);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_set_clip_state( struct pipe_context *pipe,
|
|
||||||
const struct pipe_clip_state *clip )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.Clip = *clip;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_set_viewport_state( struct pipe_context *pipe,
|
|
||||||
const struct pipe_viewport_state *viewport )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.Viewport = *viewport; /* struct copy */
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_VIEWPORT;
|
|
||||||
|
|
||||||
/* pass the viewport info to the draw module */
|
|
||||||
//draw_set_viewport_state(brw->draw, viewport);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_set_vertex_buffers(struct pipe_context *pipe,
|
|
||||||
unsigned count,
|
|
||||||
const struct pipe_vertex_buffer *buffers)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
memcpy(brw->vb.vbo_array, buffers, count * sizeof(buffers[0]));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_set_vertex_elements(struct pipe_context *pipe,
|
|
||||||
unsigned count,
|
|
||||||
const struct pipe_vertex_element *elements)
|
|
||||||
{
|
|
||||||
/* flush ? */
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
uint i;
|
|
||||||
|
|
||||||
assert(count <= PIPE_MAX_ATTRIBS);
|
|
||||||
|
|
||||||
for (i = 0; i < count; i++) {
|
|
||||||
struct brw_vertex_element_state el;
|
|
||||||
memset(&el, 0, sizeof(el));
|
|
||||||
|
|
||||||
el.ve0.src_offset = elements[i].src_offset;
|
|
||||||
el.ve0.src_format = brw_translate_surface_format(elements[i].src_format);
|
|
||||||
el.ve0.valid = 1;
|
|
||||||
el.ve0.vertex_buffer_index = elements[i].vertex_buffer_index;
|
|
||||||
|
|
||||||
el.ve1.dst_offset = i * 4;
|
|
||||||
|
|
||||||
el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_SRC;
|
|
||||||
el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_SRC;
|
|
||||||
el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_SRC;
|
|
||||||
el.ve1.vfcomponent0 = BRW_VFCOMPONENT_STORE_SRC;
|
|
||||||
|
|
||||||
switch (elements[i].nr_components) {
|
|
||||||
case 1: el.ve1.vfcomponent1 = BRW_VFCOMPONENT_STORE_0;
|
|
||||||
case 2: el.ve1.vfcomponent2 = BRW_VFCOMPONENT_STORE_0;
|
|
||||||
case 3: el.ve1.vfcomponent3 = BRW_VFCOMPONENT_STORE_1_FLT;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
brw->vb.inputs[i] = el;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Constant buffers
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void brw_set_constant_buffer(struct pipe_context *pipe,
|
|
||||||
uint shader, uint index,
|
|
||||||
const struct pipe_constant_buffer *buf)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
assert(buf == 0 || index == 0);
|
|
||||||
|
|
||||||
brw->attribs.Constants[shader] = buf;
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_CONSTANTS;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Texture surfaces
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
static void brw_set_sampler_textures(struct pipe_context *pipe,
|
|
||||||
unsigned num,
|
|
||||||
struct pipe_texture **texture)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
uint i;
|
|
||||||
|
|
||||||
assert(num <= PIPE_MAX_SAMPLERS);
|
|
||||||
|
|
||||||
/* Check for no-op */
|
|
||||||
if (num == brw->num_textures &&
|
|
||||||
!memcmp(brw->attribs.Texture, texture, num *
|
|
||||||
sizeof(struct pipe_texture *)))
|
|
||||||
return;
|
|
||||||
|
|
||||||
for (i = 0; i < num; i++)
|
|
||||||
pipe_texture_reference((struct pipe_texture **) &brw->attribs.Texture[i],
|
|
||||||
texture[i]);
|
|
||||||
|
|
||||||
for (i = num; i < brw->num_textures; i++)
|
|
||||||
pipe_texture_reference((struct pipe_texture **) &brw->attribs.Texture[i],
|
|
||||||
NULL);
|
|
||||||
|
|
||||||
brw->num_textures = num;
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_TEXTURE;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Render targets, etc
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void brw_set_framebuffer_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_framebuffer_state *fb)
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.FrameBuffer = *fb; /* struct copy */
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_FRAMEBUFFER;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/************************************************************************
|
|
||||||
* Rasterizer state
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void *
|
|
||||||
brw_create_rasterizer_state(struct pipe_context *pipe,
|
|
||||||
const struct pipe_rasterizer_state *rasterizer)
|
|
||||||
{
|
|
||||||
DUP(pipe_rasterizer_state, rasterizer);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_bind_rasterizer_state( struct pipe_context *pipe,
|
|
||||||
void *setup )
|
|
||||||
{
|
|
||||||
struct brw_context *brw = brw_context(pipe);
|
|
||||||
|
|
||||||
brw->attribs.Raster = (struct pipe_rasterizer_state *)setup;
|
|
||||||
|
|
||||||
/* Also pass-through to draw module:
|
|
||||||
*/
|
|
||||||
//draw_set_rasterizer_state(brw->draw, setup);
|
|
||||||
|
|
||||||
brw->state.dirty.brw |= BRW_NEW_RASTERIZER;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void brw_delete_rasterizer_state(struct pipe_context *pipe,
|
|
||||||
void *setup)
|
|
||||||
{
|
|
||||||
free(setup);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
brw_init_state_functions( struct brw_context *brw )
|
|
||||||
{
|
|
||||||
brw->pipe.create_blend_state = brw_create_blend_state;
|
|
||||||
brw->pipe.bind_blend_state = brw_bind_blend_state;
|
|
||||||
brw->pipe.delete_blend_state = brw_delete_blend_state;
|
|
||||||
|
|
||||||
brw->pipe.create_sampler_state = brw_create_sampler_state;
|
|
||||||
brw->pipe.bind_sampler_states = brw_bind_sampler_states;
|
|
||||||
brw->pipe.delete_sampler_state = brw_delete_sampler_state;
|
|
||||||
|
|
||||||
brw->pipe.create_depth_stencil_alpha_state = brw_create_depth_stencil_state;
|
|
||||||
brw->pipe.bind_depth_stencil_alpha_state = brw_bind_depth_stencil_state;
|
|
||||||
brw->pipe.delete_depth_stencil_alpha_state = brw_delete_depth_stencil_state;
|
|
||||||
|
|
||||||
brw->pipe.create_rasterizer_state = brw_create_rasterizer_state;
|
|
||||||
brw->pipe.bind_rasterizer_state = brw_bind_rasterizer_state;
|
|
||||||
brw->pipe.delete_rasterizer_state = brw_delete_rasterizer_state;
|
|
||||||
brw->pipe.create_fs_state = brw_create_fs_state;
|
|
||||||
brw->pipe.bind_fs_state = brw_bind_fs_state;
|
|
||||||
brw->pipe.delete_fs_state = brw_delete_fs_state;
|
|
||||||
brw->pipe.create_vs_state = brw_create_vs_state;
|
|
||||||
brw->pipe.bind_vs_state = brw_bind_vs_state;
|
|
||||||
brw->pipe.delete_vs_state = brw_delete_vs_state;
|
|
||||||
|
|
||||||
brw->pipe.set_blend_color = brw_set_blend_color;
|
|
||||||
brw->pipe.set_clip_state = brw_set_clip_state;
|
|
||||||
brw->pipe.set_constant_buffer = brw_set_constant_buffer;
|
|
||||||
brw->pipe.set_framebuffer_state = brw_set_framebuffer_state;
|
|
||||||
|
|
||||||
// brw->pipe.set_feedback_state = brw_set_feedback_state;
|
|
||||||
// brw->pipe.set_feedback_buffer = brw_set_feedback_buffer;
|
|
||||||
|
|
||||||
brw->pipe.set_polygon_stipple = brw_set_polygon_stipple;
|
|
||||||
brw->pipe.set_scissor_state = brw_set_scissor_state;
|
|
||||||
brw->pipe.set_sampler_textures = brw_set_sampler_textures;
|
|
||||||
brw->pipe.set_viewport_state = brw_set_viewport_state;
|
|
||||||
brw->pipe.set_vertex_buffers = brw_set_vertex_buffers;
|
|
||||||
brw->pipe.set_vertex_elements = brw_set_vertex_elements;
|
|
||||||
}
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue