From 7c930d99adfa3537b1dce987178544e1ce5eedf3 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Fri, 23 Nov 2018 10:58:11 -0500 Subject: [PATCH] freedreno: a2xx: enable early-Z testing Enable earlyZ when alpha test is disabled. Signed-off-by: Jonathan Marek Reviewed-by: Rob Clark --- src/gallium/drivers/freedreno/a2xx/fd2_emit.c | 9 +++++++-- src/gallium/drivers/freedreno/a2xx/fd2_program.h | 1 + src/gallium/drivers/freedreno/a2xx/fd2_zsa.c | 3 ++- src/gallium/drivers/freedreno/a2xx/ir2_nir.c | 1 + 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c index 9628f267365..e98f86a8257 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_emit.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_emit.c @@ -190,6 +190,7 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty) { struct fd2_blend_stateobj *blend = fd2_blend_stateobj(ctx->blend); struct fd2_zsa_stateobj *zsa = fd2_zsa_stateobj(ctx->zsa); + struct fd2_shader_stateobj *fp = ctx->prog.fp; struct fd_ringbuffer *ring = ctx->batch->draw; /* NOTE: we probably want to eventually refactor this so each state @@ -205,12 +206,16 @@ fd2_emit_state(struct fd_context *ctx, const enum fd_dirty_3d_state dirty) OUT_RING(ring, ctx->sample_mask); } - if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF)) { + if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_STENCIL_REF | FD_DIRTY_PROG)) { struct pipe_stencil_ref *sr = &ctx->stencil_ref; + uint32_t val = zsa->rb_depthcontrol; + + if (fp->has_kill) + val &= ~A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE; OUT_PKT3(ring, CP_SET_CONSTANT, 2); OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL)); - OUT_RING(ring, zsa->rb_depthcontrol); + OUT_RING(ring, val); OUT_PKT3(ring, CP_SET_CONSTANT, 4); OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF)); diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_program.h b/src/gallium/drivers/freedreno/a2xx/fd2_program.h index d4ac93bfed3..00e89d4e0a6 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_program.h +++ b/src/gallium/drivers/freedreno/a2xx/fd2_program.h @@ -51,6 +51,7 @@ struct fd2_shader_stateobj { bool writes_psize; bool need_param; + bool has_kill; /* note: * fragment shader only has one variant diff --git a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c b/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c index 64b31b677ba..d3c19b4450c 100644 --- a/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c +++ b/src/gallium/drivers/freedreno/a2xx/fd2_zsa.c @@ -49,7 +49,8 @@ fd2_zsa_state_create(struct pipe_context *pctx, A2XX_RB_DEPTHCONTROL_ZFUNC(cso->depth.func); /* maps 1:1 */ if (cso->depth.enabled) - so->rb_depthcontrol |= A2XX_RB_DEPTHCONTROL_Z_ENABLE; + so->rb_depthcontrol |= A2XX_RB_DEPTHCONTROL_Z_ENABLE | + COND(!cso->alpha.enabled, A2XX_RB_DEPTHCONTROL_EARLY_Z_ENABLE); if (cso->depth.writemask) so->rb_depthcontrol |= A2XX_RB_DEPTHCONTROL_Z_WRITE_ENABLE; diff --git a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c index 9b81fc4f558..5d92f86befc 100644 --- a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c +++ b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c @@ -633,6 +633,7 @@ emit_intrinsic(struct ir2_context *ctx, nir_intrinsic_instr *intr) } instr->alu.export = -1; instr->src_count = 1; + ctx->so->has_kill = true; break; case nir_intrinsic_load_front_face: /* gl_FrontFacing is in the sign of param.x