radeonsi/gfx10: set the DCC constant encoding flag
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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@ -1124,7 +1124,8 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
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sscreen->info.family == CHIP_RAVEN;
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sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
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sscreen->info.family == CHIP_RAVEN;
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sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2;
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sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2 ||
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sscreen->info.chip_class >= GFX10;
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/* Only enable primitive binning on APUs by default. */
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sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN ||
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