drm-uapi: virtgpu_drm.h: resource create blob + host visible memory region
Matches current API at virgl/resource_blob. Of course, don't submit until this lands in drm. Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
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@ -46,6 +46,7 @@ extern "C" {
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#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
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#define DRM_VIRTGPU_WAIT 0x08
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#define DRM_VIRTGPU_GET_CAPS 0x09
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#define DRM_VIRTGPU_RESOURCE_CREATE_BLOB 0x0a
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#define VIRTGPU_EXECBUF_FENCE_FD_IN 0x01
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#define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x02
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@ -71,6 +72,9 @@ struct drm_virtgpu_execbuffer {
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#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
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#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */
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#define VIRTGPU_PARAM_RESOURCE_BLOB 3 /* DRM_VIRTGPU_RESOURCE_CREATE_BLOB */
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#define VIRTGPU_PARAM_HOST_VISIBLE 4 /* Host blob resources are mappable */
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#define VIRTGPU_PARAM_CROSS_DEVICE 5 /* Cross virtio-device resource sharing */
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struct drm_virtgpu_getparam {
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__u64 param;
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@ -100,7 +104,7 @@ struct drm_virtgpu_resource_info {
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__u32 bo_handle;
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__u32 res_handle;
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__u32 size;
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__u32 stride;
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__u32 blob_mem;
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};
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struct drm_virtgpu_3d_box {
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@ -117,6 +121,8 @@ struct drm_virtgpu_3d_transfer_to_host {
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struct drm_virtgpu_3d_box box;
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__u32 level;
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__u32 offset;
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__u32 stride;
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__u32 layer_stride;
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};
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struct drm_virtgpu_3d_transfer_from_host {
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@ -124,6 +130,8 @@ struct drm_virtgpu_3d_transfer_from_host {
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struct drm_virtgpu_3d_box box;
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__u32 level;
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__u32 offset;
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__u32 stride;
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__u32 layer_stride;
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};
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#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
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@ -140,6 +148,31 @@ struct drm_virtgpu_get_caps {
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__u32 pad;
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};
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struct drm_virtgpu_resource_create_blob {
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#define VIRTGPU_BLOB_MEM_GUEST 0x0001
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#define VIRTGPU_BLOB_MEM_HOST3D 0x0002
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#define VIRTGPU_BLOB_MEM_HOST3D_GUEST 0x0003
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#define VIRTGPU_BLOB_FLAG_USE_MAPPABLE 0x0001
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#define VIRTGPU_BLOB_FLAG_USE_SHAREABLE 0x0002
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#define VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE 0x0004
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/* zero is invalid blob_mem */
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__u32 blob_mem;
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__u32 blob_flags;
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__u32 bo_handle;
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__u32 res_handle;
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__u64 size;
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/*
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* for 3D contexts with VIRTGPU_BLOB_MEM_HOST3D_GUEST and
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* VIRTGPU_BLOB_MEM_HOST3D otherwise, must be zero.
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*/
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__u32 pad;
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__u32 cmd_size;
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__u64 cmd;
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__u64 blob_id;
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};
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#define DRM_IOCTL_VIRTGPU_MAP \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
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@ -175,6 +208,10 @@ struct drm_virtgpu_get_caps {
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
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struct drm_virtgpu_get_caps)
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#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB \
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DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE_BLOB, \
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struct drm_virtgpu_resource_create_blob)
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#if defined(__cplusplus)
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}
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#endif
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