i965/drm: Reindent intel_bufmgr_gem.c and brw_bufmgr.h.
indent -i3 -nut -br -brs -npcs -ce --no-tabs -Tuint32_t -Tuint64_t plus some manual fixes because those aren't quite the right settings. Acked-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Kenneth Graunke
parent
d30a92738c
commit
7aa66e64fe
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@ -46,88 +46,88 @@ extern "C" {
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struct gen_device_info;
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struct brw_bo {
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/**
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* Size in bytes of the buffer object.
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*
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* The size may be larger than the size originally requested for the
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* allocation, such as being aligned to page size.
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*/
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unsigned long size;
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/**
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* Size in bytes of the buffer object.
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*
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* The size may be larger than the size originally requested for the
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* allocation, such as being aligned to page size.
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*/
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unsigned long size;
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/**
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* Alignment requirement for object
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*
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* Used for GTT mapping & pinning the object.
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*/
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unsigned long align;
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/**
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* Alignment requirement for object
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*
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* Used for GTT mapping & pinning the object.
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*/
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unsigned long align;
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/**
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* Virtual address for accessing the buffer data. Only valid while
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* mapped.
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*/
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/**
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* Virtual address for accessing the buffer data. Only valid while
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* mapped.
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*/
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#ifdef __cplusplus
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void *virt;
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void *virt;
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#else
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void *virtual;
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void *virtual;
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#endif
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/** Buffer manager context associated with this buffer object */
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struct brw_bufmgr *bufmgr;
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/** Buffer manager context associated with this buffer object */
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struct brw_bufmgr *bufmgr;
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/** The GEM handle for this buffer object. */
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uint32_t gem_handle;
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/** The GEM handle for this buffer object. */
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uint32_t gem_handle;
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/**
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* Last seen card virtual address (offset from the beginning of the
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* aperture) for the object. This should be used to fill relocation
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* entries when calling brw_bo_emit_reloc()
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*/
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uint64_t offset64;
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/**
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* Last seen card virtual address (offset from the beginning of the
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* aperture) for the object. This should be used to fill relocation
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* entries when calling brw_bo_emit_reloc()
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*/
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uint64_t offset64;
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/**
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* Boolean of whether the GPU is definitely not accessing the buffer.
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*
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* This is only valid when reusable, since non-reusable
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* buffers are those that have been shared with other
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* processes, so we don't know their state.
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*/
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bool idle;
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/**
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* Boolean of whether the GPU is definitely not accessing the buffer.
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*
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* This is only valid when reusable, since non-reusable
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* buffers are those that have been shared with other
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* processes, so we don't know their state.
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*/
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bool idle;
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int refcount;
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const char *name;
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int refcount;
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const char *name;
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/**
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* Kenel-assigned global name for this object
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*
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* List contains both flink named and prime fd'd objects
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*/
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unsigned int global_name;
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/**
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* Kenel-assigned global name for this object
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*
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* List contains both flink named and prime fd'd objects
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*/
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unsigned int global_name;
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/**
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* Current tiling mode
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*/
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uint32_t tiling_mode;
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uint32_t swizzle_mode;
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unsigned long stride;
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/**
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* Current tiling mode
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*/
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uint32_t tiling_mode;
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uint32_t swizzle_mode;
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unsigned long stride;
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time_t free_time;
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time_t free_time;
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/** Mapped address for the buffer, saved across map/unmap cycles */
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void *mem_virtual;
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/** GTT virtual address for the buffer, saved across map/unmap cycles */
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void *gtt_virtual;
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/** WC CPU address for the buffer, saved across map/unmap cycles */
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void *wc_virtual;
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int map_count;
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struct list_head vma_list;
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/** Mapped address for the buffer, saved across map/unmap cycles */
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void *mem_virtual;
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/** GTT virtual address for the buffer, saved across map/unmap cycles */
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void *gtt_virtual;
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/** WC CPU address for the buffer, saved across map/unmap cycles */
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void *wc_virtual;
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int map_count;
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struct list_head vma_list;
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/** BO cache list */
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struct list_head head;
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/** BO cache list */
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struct list_head head;
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/**
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* Boolean of whether this buffer can be re-used
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*/
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bool reusable;
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/**
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* Boolean of whether this buffer can be re-used
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*/
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bool reusable;
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};
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#define BO_ALLOC_FOR_RENDER (1<<0)
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@ -140,7 +140,7 @@ struct brw_bo {
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* using bo_map() or brw_bo_map_gtt() to be used by the CPU.
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*/
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struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
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unsigned long size, unsigned int alignment);
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unsigned long size, unsigned int alignment);
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/**
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* Allocate a buffer object, hinting that it will be used as a
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* render target.
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@ -148,9 +148,9 @@ struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
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* This is otherwise the same as bo_alloc.
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*/
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struct brw_bo *brw_bo_alloc_for_render(struct brw_bufmgr *bufmgr,
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const char *name,
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unsigned long size,
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unsigned int alignment);
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const char *name,
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unsigned long size,
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unsigned int alignment);
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/**
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* Allocate a tiled buffer object.
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@ -168,11 +168,11 @@ struct brw_bo *brw_bo_alloc_for_render(struct brw_bufmgr *bufmgr,
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* may have been rounded up to accommodate for tiling restrictions.
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*/
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struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
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const char *name,
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int x, int y, int cpp,
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uint32_t *tiling_mode,
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unsigned long *pitch,
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unsigned long flags);
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const char *name,
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int x, int y, int cpp,
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uint32_t *tiling_mode,
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unsigned long *pitch,
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unsigned long flags);
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/** Takes a reference on a buffer object */
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void brw_bo_reference(struct brw_bo *bo);
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@ -200,10 +200,10 @@ int brw_bo_unmap(struct brw_bo *bo);
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/** Write data into an object. */
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int brw_bo_subdata(struct brw_bo *bo, unsigned long offset,
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unsigned long size, const void *data);
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unsigned long size, const void *data);
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/** Read data from an object. */
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int brw_bo_get_subdata(struct brw_bo *bo, unsigned long offset,
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unsigned long size, void *data);
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unsigned long size, void *data);
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/**
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* Waits for rendering to an object by the GPU to have completed.
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*
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@ -224,8 +224,8 @@ void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
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* \param buf Buffer to set tiling mode for
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* \param tiling_mode desired, and returned tiling mode
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*/
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int brw_bo_set_tiling(struct brw_bo *bo, uint32_t * tiling_mode,
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uint32_t stride);
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int brw_bo_set_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
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uint32_t stride);
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/**
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* Get the current tiling (and resulting swizzling) mode for the bo.
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*
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@ -233,8 +233,8 @@ int brw_bo_set_tiling(struct brw_bo *bo, uint32_t * tiling_mode,
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* \param tiling_mode returned tiling mode
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* \param swizzle_mode returned swizzling mode
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*/
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int brw_bo_get_tiling(struct brw_bo *bo, uint32_t * tiling_mode,
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uint32_t * swizzle_mode);
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int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
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uint32_t *swizzle_mode);
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/**
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* Create a visible name for a buffer which can be used by other apps
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@ -242,7 +242,7 @@ int brw_bo_get_tiling(struct brw_bo *bo, uint32_t * tiling_mode,
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* \param buf Buffer to create a name for
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* \param name Returned name
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*/
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int brw_bo_flink(struct brw_bo *bo, uint32_t * name);
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int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
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/**
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* Returns 1 if mapping the buffer for write could cause the process
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@ -288,7 +288,7 @@ struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
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unsigned int handle);
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void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
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void brw_bufmgr_gem_set_vma_cache_size(struct brw_bufmgr *bufmgr,
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int limit);
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int limit);
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int brw_bo_map_unsynchronized(struct brw_bo *bo);
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int brw_bo_map_gtt(struct brw_bo *bo);
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@ -305,14 +305,14 @@ void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
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int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
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struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
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int prime_fd, int size);
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int prime_fd, int size);
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int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset, uint64_t *result);
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int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
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uint64_t *result);
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/** @{ */
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#if defined(__cplusplus)
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}
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#endif
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#endif /* INTEL_BUFMGR_H */
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