aco: Implement image_load d16.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15179>
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@ -5977,13 +5977,17 @@ visit_image_load(isel_context* ctx, nir_intrinsic_instr* instr)
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}
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}
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if (is_sparse)
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if (is_sparse)
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expand_mask |= 1 << result_size;
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expand_mask |= 1 << result_size;
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unsigned num_components = util_bitcount(dmask) + is_sparse;
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bool d16 = instr->dest.ssa.bit_size == 16;
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assert(!d16 || !is_sparse);
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unsigned num_bytes = util_bitcount(dmask) * (d16 ? 2 : 4) + is_sparse * 4;
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Temp tmp;
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Temp tmp;
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if (num_components == dst.size() && dst.type() == RegType::vgpr)
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if (num_bytes == dst.bytes() && dst.type() == RegType::vgpr)
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tmp = dst;
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tmp = dst;
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else
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else
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tmp = ctx->program->allocateTmp(RegClass(RegType::vgpr, num_components));
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tmp = bld.tmp(RegClass::get(RegType::vgpr, num_bytes));
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Temp resource = bld.as_uniform(get_ssa_temp(ctx, instr->src[0].ssa));
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Temp resource = bld.as_uniform(get_ssa_temp(ctx, instr->src[0].ssa));
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@ -5991,12 +5995,22 @@ visit_image_load(isel_context* ctx, nir_intrinsic_instr* instr)
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Temp vindex = emit_extract_vector(ctx, get_ssa_temp(ctx, instr->src[1].ssa), 0, v1);
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Temp vindex = emit_extract_vector(ctx, get_ssa_temp(ctx, instr->src[1].ssa), 0, v1);
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aco_opcode opcode;
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aco_opcode opcode;
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switch (util_bitcount(dmask)) {
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if (!d16) {
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case 1: opcode = aco_opcode::buffer_load_format_x; break;
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switch (util_bitcount(dmask)) {
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case 2: opcode = aco_opcode::buffer_load_format_xy; break;
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case 1: opcode = aco_opcode::buffer_load_format_x; break;
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case 3: opcode = aco_opcode::buffer_load_format_xyz; break;
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case 2: opcode = aco_opcode::buffer_load_format_xy; break;
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case 4: opcode = aco_opcode::buffer_load_format_xyzw; break;
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case 3: opcode = aco_opcode::buffer_load_format_xyz; break;
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default: unreachable(">4 channel buffer image load");
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case 4: opcode = aco_opcode::buffer_load_format_xyzw; break;
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default: unreachable(">4 channel buffer image load");
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}
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} else {
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switch (util_bitcount(dmask)) {
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case 1: opcode = aco_opcode::buffer_load_format_d16_x; break;
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case 2: opcode = aco_opcode::buffer_load_format_d16_xy; break;
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case 3: opcode = aco_opcode::buffer_load_format_d16_xyz; break;
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case 4: opcode = aco_opcode::buffer_load_format_d16_xyzw; break;
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default: unreachable(">4 channel buffer image load");
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}
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}
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}
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aco_ptr<MUBUF_instruction> load{
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aco_ptr<MUBUF_instruction> load{
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create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 3 + is_sparse, 1)};
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create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 3 + is_sparse, 1)};
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@ -6024,6 +6038,7 @@ visit_image_load(isel_context* ctx, nir_intrinsic_instr* instr)
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load->glc = access & (ACCESS_VOLATILE | ACCESS_COHERENT) ? 1 : 0;
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load->glc = access & (ACCESS_VOLATILE | ACCESS_COHERENT) ? 1 : 0;
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load->dlc = load->glc && ctx->options->chip_class >= GFX10;
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load->dlc = load->glc && ctx->options->chip_class >= GFX10;
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load->dim = ac_get_image_dim(ctx->options->chip_class, dim, is_array);
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load->dim = ac_get_image_dim(ctx->options->chip_class, dim, is_array);
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load->d16 = d16;
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load->dmask = dmask;
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load->dmask = dmask;
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load->unrm = true;
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load->unrm = true;
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load->da = should_declare_array(ctx, dim, is_array);
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load->da = should_declare_array(ctx, dim, is_array);
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