st/mesa: Treat vertex outputs absent in outputMapping as zero in mesa_to_tgsi
After updating vertex outputs being written based on optimized NIR, they may go out of sync with outputs in mesa IR. Which is translated to TGSI and used together with NIR if draw doesn't have llvm. It's much easier to treat such outputs as zero because there is no pass to entirely get rid of them. Similar toeeab9c93db
but now for outputs. Fixes:d684fb37bf
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3365 Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6187>
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@ -97,9 +97,12 @@ dst_register(struct st_translate *t, gl_register_file file, GLuint index)
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else
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assert(index < VARYING_SLOT_MAX);
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assert(t->outputMapping[index] < ARRAY_SIZE(t->outputs));
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return t->outputs[t->outputMapping[index]];
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if (t->outputMapping[index] < ARRAY_SIZE(t->outputs))
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return t->outputs[t->outputMapping[index]];
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else {
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assert(t->procType == PIPE_SHADER_VERTEX);
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return ureg_dst(ureg_DECL_constant(t->ureg, 0));
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}
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case PROGRAM_ADDRESS:
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return t->address[index];
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@ -149,8 +152,12 @@ src_register(struct st_translate *t,
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}
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case PROGRAM_OUTPUT:
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assert(t->outputMapping[index] < ARRAY_SIZE(t->outputs));
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return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
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if (t->outputMapping[index] < ARRAY_SIZE(t->outputs))
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return ureg_src(t->outputs[t->outputMapping[index]]);
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else {
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assert(t->procType == PIPE_SHADER_VERTEX);
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return ureg_DECL_constant(t->ureg, 0);
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}
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case PROGRAM_ADDRESS:
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return ureg_src(t->address[index]);
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