freedreno/ir3: handle input/output component
After the mesa/st nir linking support, we start to see inputs/outputs like: decl_var shader_out INTERP_MODE_NONE float packed:uv (VARYING_SLOT_VAR9.x, 1, 0) decl_var shader_out INTERP_MODE_NONE float packed:uv@0 (VARYING_SLOT_VAR9.y, 1, 0) (ie. were location_frac != .x) Unfortunately I overlooked the addition of the component parameter to load_input/store_output, so when we started encountering inputs/outputs with component other than .x, we'd end up loading/storing the wrong input/output. Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -1928,7 +1928,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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struct ir3_instruction * const *src;
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struct ir3_instruction * const *src;
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struct ir3_block *b = ctx->block;
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struct ir3_block *b = ctx->block;
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nir_const_value *const_offset;
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nir_const_value *const_offset;
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int idx;
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int idx, comp;
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if (info->has_dest) {
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if (info->has_dest) {
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unsigned n;
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unsigned n;
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@ -1971,11 +1971,12 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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break;
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break;
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case nir_intrinsic_load_input:
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case nir_intrinsic_load_input:
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idx = nir_intrinsic_base(intr);
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idx = nir_intrinsic_base(intr);
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comp = nir_intrinsic_component(intr);
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const_offset = nir_src_as_const_value(intr->src[0]);
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const_offset = nir_src_as_const_value(intr->src[0]);
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if (const_offset) {
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if (const_offset) {
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idx += const_offset->u32[0];
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idx += const_offset->u32[0];
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for (int i = 0; i < intr->num_components; i++) {
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for (int i = 0; i < intr->num_components; i++) {
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unsigned n = idx * 4 + i;
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unsigned n = idx * 4 + i + comp;
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dst[i] = ctx->ir->inputs[n];
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dst[i] = ctx->ir->inputs[n];
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}
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}
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} else {
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} else {
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@ -1984,7 +1985,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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create_collect(b, ctx->ir->inputs, ctx->ir->ninputs);
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create_collect(b, ctx->ir->inputs, ctx->ir->ninputs);
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struct ir3_instruction *addr = get_addr(ctx, src[0], 4);
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struct ir3_instruction *addr = get_addr(ctx, src[0], 4);
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for (int i = 0; i < intr->num_components; i++) {
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for (int i = 0; i < intr->num_components; i++) {
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unsigned n = idx * 4 + i;
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unsigned n = idx * 4 + i + comp;
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dst[i] = create_indirect_load(ctx, ctx->ir->ninputs,
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dst[i] = create_indirect_load(ctx, ctx->ir->ninputs,
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n, addr, collect);
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n, addr, collect);
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}
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}
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@ -2061,13 +2062,14 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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break;
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break;
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case nir_intrinsic_store_output:
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case nir_intrinsic_store_output:
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idx = nir_intrinsic_base(intr);
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idx = nir_intrinsic_base(intr);
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comp = nir_intrinsic_component(intr);
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const_offset = nir_src_as_const_value(intr->src[1]);
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const_offset = nir_src_as_const_value(intr->src[1]);
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compile_assert(ctx, const_offset != NULL);
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compile_assert(ctx, const_offset != NULL);
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idx += const_offset->u32[0];
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idx += const_offset->u32[0];
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src = get_src(ctx, &intr->src[0]);
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src = get_src(ctx, &intr->src[0]);
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for (int i = 0; i < intr->num_components; i++) {
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for (int i = 0; i < intr->num_components; i++) {
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unsigned n = idx * 4 + i;
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unsigned n = idx * 4 + i + comp;
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ctx->ir->outputs[n] = src[i];
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ctx->ir->outputs[n] = src[i];
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}
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}
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break;
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break;
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