From 7781a75229d5d071fdeb75b9932cc52c37b28552 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Tue, 5 Apr 2022 14:55:05 -0400 Subject: [PATCH] zink: add a renderpass flag for mixed zs layout this indicates that the layout requires reading from the depth aspect and writing to the stencil aspect Reviewed-by: Dave Airlie Part-of: --- src/gallium/drivers/zink/zink_context.c | 11 ++++++++--- src/gallium/drivers/zink/zink_render_pass.h | 1 + 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 52d3a090888..f238be4d2f7 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -1998,9 +1998,14 @@ get_render_pass(struct zink_context *ctx) clears |= PIPE_CLEAR_STENCIL; const uint64_t outputs_written = ctx->gfx_stages[PIPE_SHADER_FRAGMENT] ? ctx->gfx_stages[PIPE_SHADER_FRAGMENT]->nir->info.outputs_written : 0; - bool needs_write = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) || - outputs_written & (BITFIELD64_BIT(FRAG_RESULT_DEPTH) | BITFIELD64_BIT(FRAG_RESULT_STENCIL)); - state.rts[fb->nr_cbufs].needs_write = needs_write || state.num_zsresolves || state.rts[fb->nr_cbufs].clear_color || state.rts[fb->nr_cbufs].clear_stencil; + bool needs_write_z = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) || + outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH); + needs_write_z |= state.num_zsresolves || state.rts[fb->nr_cbufs].clear_color; + + bool needs_write_s = state.rts[fb->nr_cbufs].clear_stencil || outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); + if (!needs_write_z && (!ctx->dsa_state || !ctx->dsa_state->base.depth_enabled)) + state.rts[fb->nr_cbufs].mixed_zs = needs_write_s && zsbuf->bind_count[0]; + state.rts[fb->nr_cbufs].needs_write = needs_write_z | needs_write_s; state.num_rts++; } state.have_zsbuf = fb->zsbuf != NULL; diff --git a/src/gallium/drivers/zink/zink_render_pass.h b/src/gallium/drivers/zink/zink_render_pass.h index 2e02f1566d9..1c8d4ff2909 100644 --- a/src/gallium/drivers/zink/zink_render_pass.h +++ b/src/gallium/drivers/zink/zink_render_pass.h @@ -44,6 +44,7 @@ struct zink_rt_attrib { bool needs_write; }; bool resolve; + bool mixed_zs; }; struct zink_render_pass_state {