amd/addrlib: update Mesa's copy of addrlib

Update to the internal master as of 2018-11-15.

This has a lot of gratuitous whitespace change, but on the plus
side it's built using the same tooling that's used for AMDVLK,
which should help going forward.

src/amd/Makefile.addrlib.am

@@ -26,12 +26,11 @@ addrlib_libamdgpu_addrlib_la_CPPFLAGS = \
 	-I$(top_srcdir)/src/ \
 	-I$(top_srcdir)/include \
 	-I$(srcdir)/common \
-	-I$(srcdir)/addrlib \
+	-I$(srcdir)/addrlib/inc \
-	-I$(srcdir)/addrlib/core \
+	-I$(srcdir)/addrlib/src \
-	-I$(srcdir)/addrlib/inc/chip/gfx9 \
+	-I$(srcdir)/addrlib/src/core \
-	-I$(srcdir)/addrlib/inc/chip/r800 \
+	-I$(srcdir)/addrlib/src/chip/gfx9 \
-	-I$(srcdir)/addrlib/gfx9/chip \
+	-I$(srcdir)/addrlib/src/chip/r800
-	-I$(srcdir)/addrlib/r800/chip
 
 addrlib_libamdgpu_addrlib_la_CXXFLAGS = \
 	$(VISIBILITY_CXXFLAGS) $(CXX11_CXXFLAGS)

src/amd/Makefile.sources

@@ -5,35 +5,34 @@ COMMON_HEADER_FILES = \
 	common/amd_kernel_code_t.h
 
 ADDRLIB_FILES = \
-	addrlib/addrinterface.cpp \
+	addrlib/inc/addrinterface.h \
-	addrlib/addrinterface.h \
+	addrlib/inc/addrtypes.h \
-	addrlib/addrtypes.h \
+	addrlib/src/addrinterface.cpp \
-	addrlib/amdgpu_asic_addr.h \
+	addrlib/src/amdgpu_asic_addr.h \
-	addrlib/core/addrcommon.h \
+	addrlib/src/core/addrcommon.h \
-	addrlib/core/addrelemlib.cpp \
+	addrlib/src/core/addrelemlib.cpp \
-	addrlib/core/addrelemlib.h \
+	addrlib/src/core/addrelemlib.h \
-	addrlib/core/addrlib.cpp \
+	addrlib/src/core/addrlib.cpp \
-	addrlib/core/addrlib.h \
+	addrlib/src/core/addrlib.h \
-	addrlib/core/addrlib1.cpp \
+	addrlib/src/core/addrlib1.cpp \
-	addrlib/core/addrlib1.h \
+	addrlib/src/core/addrlib1.h \
-	addrlib/core/addrlib2.cpp \
+	addrlib/src/core/addrlib2.cpp \
-	addrlib/core/addrlib2.h \
+	addrlib/src/core/addrlib2.h \
-	addrlib/core/addrobject.cpp \
+	addrlib/src/core/addrobject.cpp \
-	addrlib/core/addrobject.h \
+	addrlib/src/core/addrobject.h \
-	addrlib/gfx9/chip/gfx9_enum.h \
+	addrlib/src/core/coord.cpp \
-	addrlib/gfx9/coord.cpp \
+	addrlib/src/core/coord.h \
-	addrlib/gfx9/coord.h \
+	addrlib/src/gfx9/gfx9addrlib.cpp \
-	addrlib/gfx9/gfx9addrlib.cpp \
+	addrlib/src/gfx9/gfx9addrlib.h \
-	addrlib/gfx9/gfx9addrlib.h \
+	addrlib/src/chip/gfx9/gfx9_gb_reg.h \
-	addrlib/inc/chip/gfx9/gfx9_gb_reg.h \
+	addrlib/src/chip/r800/si_gb_reg.h \
-	addrlib/inc/chip/r800/si_gb_reg.h \
+	addrlib/src/r800/chip/si_ci_vi_merged_enum.h \
-	addrlib/r800/chip/si_ci_vi_merged_enum.h \
+	addrlib/src/r800/ciaddrlib.cpp \
-	addrlib/r800/ciaddrlib.cpp \
+	addrlib/src/r800/ciaddrlib.h \
-	addrlib/r800/ciaddrlib.h \
+	addrlib/src/r800/egbaddrlib.cpp \
-	addrlib/r800/egbaddrlib.cpp \
+	addrlib/src/r800/egbaddrlib.h \
-	addrlib/r800/egbaddrlib.h \
+	addrlib/src/r800/siaddrlib.cpp \
-	addrlib/r800/siaddrlib.cpp \
+	addrlib/src/r800/siaddrlib.h
-	addrlib/r800/siaddrlib.h
 
 AMD_COMPILER_FILES = \
 	common/ac_binary.c \

src/amd/addrlib/inc/addrinterface.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -177,7 +177,6 @@ typedef struct _ADDR_EQUATION
                                                        ///< stacked vertically prior to swizzling
 } ADDR_EQUATION;
 
-
 /**
 ****************************************************************************************************
 * @brief Alloc system memory flags.
@@ -409,8 +408,6 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
     const ADDR_CREATE_INPUT*    pAddrCreateIn,
     ADDR_CREATE_OUTPUT*         pAddrCreateOut);
 
-
-
 /**
 ****************************************************************************************************
 *   AddrDestroy
@@ -425,8 +422,6 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
 ADDR_E_RETURNCODE ADDR_API AddrDestroy(
     ADDR_HANDLE hLib);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                    Surface functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -658,8 +653,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
     const ADDR_COMPUTE_SURFACE_INFO_INPUT*  pIn,
     ADDR_COMPUTE_SURFACE_INFO_OUTPUT*       pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
@@ -748,8 +741,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
     const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
     ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*      pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
@@ -931,8 +922,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
     const ADDR_COMPUTE_HTILE_INFO_INPUT*    pIn,
     ADDR_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
@@ -995,8 +984,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
     const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*   pIn,
     ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*        pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
@@ -1057,8 +1044,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
     const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT*   pIn,
     ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*        pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     C-mask functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1146,8 +1131,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
     const ADDR_COMPUTE_CMASK_INFO_INPUT*    pIn,
     ADDR_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
@@ -1208,8 +1191,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
     const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
     ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
@@ -1268,8 +1249,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
     const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT*   pIn,
     ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*        pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     F-mask functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1350,8 +1329,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
     const ADDR_COMPUTE_FMASK_INFO_INPUT*    pIn,
     ADDR_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
@@ -1428,8 +1405,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
     const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*   pIn,
     ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*        pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
@@ -1503,8 +1478,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
     const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT*   pIn,
     ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*        pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                          Element/utility functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1593,7 +1566,6 @@ ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
     const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT*  pIn,
     ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
 
-
 /**
 ****************************************************************************************************
 *   ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
@@ -1651,8 +1623,6 @@ ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
     const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT*  pIn,
     ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT*       pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_SLICESWIZZLE_INPUT
@@ -1679,8 +1649,6 @@ typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
                                         ///< README: When tileIndex is not -1, this must be valid
 } ADDR_COMPUTE_SLICESWIZZLE_INPUT;
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
@@ -1711,7 +1679,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
     const ADDR_COMPUTE_SLICESWIZZLE_INPUT*  pIn,
     ADDR_COMPUTE_SLICESWIZZLE_OUTPUT*       pOut);
 
-
 /**
 ****************************************************************************************************
 *   AddrSwizzleGenOption
@@ -1802,8 +1769,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
     const ADDR_COMPUTE_BASE_SWIZZLE_INPUT*  pIn,
     ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT*       pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ELEM_GETEXPORTNORM_INPUT
@@ -1844,8 +1809,6 @@ BOOL_32 ADDR_API ElemGetExportNorm(
     ADDR_HANDLE                     hLib,
     const ELEM_GETEXPORTNORM_INPUT* pIn);
 
-
-
 /**
 ****************************************************************************************************
 *   ELEM_FLT32TODEPTHPIXEL_INPUT
@@ -1901,8 +1864,6 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
     const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
     ELEM_FLT32TODEPTHPIXEL_OUTPUT*      pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ELEM_FLT32TOCOLORPIXEL_INPUT
@@ -1956,6 +1917,21 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToColorPixel(
     const ELEM_FLT32TOCOLORPIXEL_INPUT* pIn,
     ELEM_FLT32TOCOLORPIXEL_OUTPUT*      pOut);
 
+/**
+****************************************************************************************************
+*   ElemSize
+*
+*   @brief
+*       Get bits-per-element for specified format
+*
+*   @return
+*       Bits-per-element of specified format
+*
+****************************************************************************************************
+*/
+UINT_32 ADDR_API ElemSize(
+    ADDR_HANDLE hLib,
+    AddrFormat  format);
 
 /**
 ****************************************************************************************************
@@ -2014,8 +1990,6 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
     const ADDR_CONVERT_TILEINFOTOHW_INPUT*  pIn,
     ADDR_CONVERT_TILEINFOTOHW_OUTPUT*       pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_CONVERT_TILEINDEX_INPUT
@@ -2140,8 +2114,6 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
     const ADDR_CONVERT_TILEINDEX1_INPUT*    pIn,
     ADDR_CONVERT_TILEINDEX_OUTPUT*          pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_GET_TILEINDEX_INPUT
@@ -2187,8 +2159,6 @@ ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
     const ADDR_GET_TILEINDEX_INPUT* pIn,
     ADDR_GET_TILEINDEX_OUTPUT*      pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_PRT_INFO_INPUT
@@ -2233,8 +2203,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
     const ADDR_PRT_INFO_INPUT*  pIn,
     ADDR_PRT_INFO_OUTPUT*       pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     DCC key functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2295,8 +2263,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
     const ADDR_COMPUTE_DCCINFO_INPUT*       pIn,
     ADDR_COMPUTE_DCCINFO_OUTPUT*            pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR_GET_MAX_ALINGMENTS_OUTPUT
@@ -2360,7 +2326,6 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
 *
 **/
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                    Surface functions for Gfx9
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2395,7 +2360,8 @@ typedef union _ADDR2_SURFACE_FLAGS
         UINT_32 noMetadata        :  1; ///< This resource has no metadata
         UINT_32 metaRbUnaligned   :  1; ///< This resource has rb unaligned metadata
         UINT_32 metaPipeUnaligned :  1; ///< This resource has pipe unaligned metadata
-        UINT_32 reserved          : 14; ///< Reserved bits
+        UINT_32 view3dAs2dArray   :  1; ///< This resource is a 3D resource viewed as 2D array
+        UINT_32 reserved          : 13; ///< Reserved bits
     };
 
     UINT_32 value;
@@ -2523,8 +2489,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
     const ADDR2_COMPUTE_SURFACE_INFO_INPUT*    pIn,
     ADDR2_COMPUTE_SURFACE_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
@@ -2591,8 +2555,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
     const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT*    pIn,
     ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
@@ -2658,8 +2620,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
     const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT*    pIn,
     ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT*         pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                   HTile functions for Gfx9
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2710,8 +2670,10 @@ typedef struct _ADDR2_META_MIP_INFO
 
         struct
         {
-            UINT_32    offset;
+            UINT_32    offset;      ///< Metadata offset within one slice,
-            UINT_32    sliceSize;
+                                    ///  the thickness of a slice is meta block depth.
+            UINT_32    sliceSize;   ///< Metadata size within one slice,
+                                    ///  the thickness of a slice is meta block depth.
         };
     };
 } ADDR2_META_MIP_INFO;
@@ -2735,7 +2697,9 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT
     UINT_32             unalignedHeight;    ///< Depth surface original height (of mip0)
     UINT_32             numSlices;          ///< Number of slices of depth surface (of mip0)
     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
-    UINT_32             firstMipIdInTail;
+    UINT_32             firstMipIdInTail;   ///  Id of the first mip in tail,
+                                            ///  if no mip is in tail, it should be set to
+                                            ///  number of mip levels
 } ADDR2_COMPUTE_HTILE_INFO_INPUT;
 
 /**
@@ -2777,8 +2741,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
     const ADDR2_COMPUTE_HTILE_INFO_INPUT*    pIn,
     ADDR2_COMPUTE_HTILE_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
@@ -2836,8 +2798,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
     const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT*    pIn,
     ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
@@ -2896,8 +2856,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
     const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT*    pIn,
     ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT*         pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     C-mask functions for Gfx9
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2963,8 +2921,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
     const ADDR2_COMPUTE_CMASK_INFO_INPUT*    pIn,
     ADDR2_COMPUTE_CMASK_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
@@ -3026,8 +2982,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
     const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT*   pIn,
     ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT*        pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
@@ -3086,8 +3040,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
     const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT*    pIn,
     ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT*         pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     F-mask functions for Gfx9
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -3170,8 +3122,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
     const ADDR2_COMPUTE_FMASK_INFO_INPUT*    pIn,
     ADDR2_COMPUTE_FMASK_INFO_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
@@ -3231,8 +3181,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
     const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT*    pIn,
     ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT*         pOut);
 
-
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
@@ -3291,8 +3239,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
     const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT*    pIn,
     ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT*         pOut);
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     DCC key functions for Gfx9
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -3321,7 +3267,8 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
     UINT_32             numMipLevels;       ///< Total mipmap levels of color surface
     UINT_32             dataSurfaceSize;    ///< The padded size of all slices and mip levels
                                             ///< useful in meta linear case
-    UINT_32             firstMipIdInTail;
+    UINT_32             firstMipIdInTail;   ///< The id of first mip in tail, if no mip is in tail,
+                                            ///  it should be number of mip levels
 } ADDR2_COMPUTE_DCCINFO_INPUT;
 
 /**
@@ -3356,7 +3303,9 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
     union
     {
         UINT_32 fastClearSizePerSlice;  ///< Size of DCC within a slice should be fast cleared
-        UINT_32 dccRamSliceSize;
+        UINT_32 dccRamSliceSize;        ///< DCC ram size per slice. For mipmap, it's
+                                        ///  the slize size of a mip chain, the thickness of a
+                                        ///  a slice is meta block depth
     };
 
     ADDR2_META_MIP_INFO* pMipInfo;      ///< DCC mip information
@@ -3376,7 +3325,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo(
     const ADDR2_COMPUTE_DCCINFO_INPUT*    pIn,
     ADDR2_COMPUTE_DCCINFO_OUTPUT*         pOut);
 
-
 /**
 ****************************************************************************************************
 *   ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
@@ -3628,6 +3576,55 @@ typedef union _ADDR2_SWTYPE_SET
     UINT_32 value;
 } ADDR2_SWTYPE_SET;
 
+/**
+****************************************************************************************************
+*   ADDR2_SWMODE_SET
+*
+*   @brief
+*       Bit field that defines swizzle type
+****************************************************************************************************
+*/
+typedef union _ADDR2_SWMODE_SET
+{
+    struct
+    {
+        UINT_32 swLinear   : 1;
+        UINT_32 sw256B_S   : 1;
+        UINT_32 sw256B_D   : 1;
+        UINT_32 sw256B_R   : 1;
+        UINT_32 sw4KB_Z    : 1;
+        UINT_32 sw4KB_S    : 1;
+        UINT_32 sw4KB_D    : 1;
+        UINT_32 sw4KB_R    : 1;
+        UINT_32 sw64KB_Z   : 1;
+        UINT_32 sw64KB_S   : 1;
+        UINT_32 sw64KB_D   : 1;
+        UINT_32 sw64KB_R   : 1;
+        UINT_32 swVar_Z    : 1;
+        UINT_32 swVar_S    : 1;
+        UINT_32 swVar_D    : 1;
+        UINT_32 swVar_R    : 1;
+        UINT_32 sw64KB_Z_T : 1;
+        UINT_32 sw64KB_S_T : 1;
+        UINT_32 sw64KB_D_T : 1;
+        UINT_32 sw64KB_R_T : 1;
+        UINT_32 sw4KB_Z_X  : 1;
+        UINT_32 sw4KB_S_X  : 1;
+        UINT_32 sw4KB_D_X  : 1;
+        UINT_32 sw4KB_R_X  : 1;
+        UINT_32 sw64KB_Z_X : 1;
+        UINT_32 sw64KB_S_X : 1;
+        UINT_32 sw64KB_D_X : 1;
+        UINT_32 sw64KB_R_X : 1;
+        UINT_32 swVar_Z_X  : 1;
+        UINT_32 swVar_S_X  : 1;
+        UINT_32 swVar_D_X  : 1;
+        UINT_32 swVar_R_X  : 1;
+    };
+
+    UINT_32 value;
+} ADDR2_SWMODE_SET;
+
 /**
 ****************************************************************************************************
 *   ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
@@ -3681,6 +3678,7 @@ typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT
                                                 ///  type
     ADDR2_SWTYPE_SET      validSwTypeSet;       ///< Valid swizzle type bit combination
     ADDR2_SWTYPE_SET      clientPreferredSwSet; ///< Client-preferred swizzle type bit combination
+    ADDR2_SWMODE_SET      validSwModeSet;       ///< Valid swizzle mode bit combination
 } ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT;
 
 /**

src/amd/addrlib/inc/addrtypes.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -112,7 +112,6 @@ typedef int            INT;
     #define GC_FASTCALL  ADDR_FASTCALL
 #endif
 
-
 #if defined(__GNUC__)
     #define ADDR_INLINE static inline   // inline needs to be static to link
 #else
@@ -353,7 +352,7 @@ typedef enum _AddrFormat {
     ADDR_FMT_3_3_2                                = 0x00000003,
     ADDR_FMT_RESERVED_4                           = 0x00000004,
     ADDR_FMT_16                                   = 0x00000005,
-    ADDR_FMT_16_FLOAT                             = 0x00000006,
+    ADDR_FMT_16_FLOAT                             = ADDR_FMT_16,
     ADDR_FMT_8_8                                  = 0x00000007,
     ADDR_FMT_5_6_5                                = 0x00000008,
     ADDR_FMT_6_5_5                                = 0x00000009,
@@ -361,28 +360,28 @@ typedef enum _AddrFormat {
     ADDR_FMT_4_4_4_4                              = 0x0000000b,
     ADDR_FMT_5_5_5_1                              = 0x0000000c,
     ADDR_FMT_32                                   = 0x0000000d,
-    ADDR_FMT_32_FLOAT                             = 0x0000000e,
+    ADDR_FMT_32_FLOAT                             = ADDR_FMT_32,
     ADDR_FMT_16_16                                = 0x0000000f,
-    ADDR_FMT_16_16_FLOAT                          = 0x00000010,
+    ADDR_FMT_16_16_FLOAT                          = ADDR_FMT_16_16,
     ADDR_FMT_8_24                                 = 0x00000011,
-    ADDR_FMT_8_24_FLOAT                           = 0x00000012,
+    ADDR_FMT_8_24_FLOAT                           = ADDR_FMT_8_24,
     ADDR_FMT_24_8                                 = 0x00000013,
-    ADDR_FMT_24_8_FLOAT                           = 0x00000014,
+    ADDR_FMT_24_8_FLOAT                           = ADDR_FMT_24_8,
     ADDR_FMT_10_11_11                             = 0x00000015,
-    ADDR_FMT_10_11_11_FLOAT                       = 0x00000016,
+    ADDR_FMT_10_11_11_FLOAT                       = ADDR_FMT_10_11_11,
     ADDR_FMT_11_11_10                             = 0x00000017,
-    ADDR_FMT_11_11_10_FLOAT                       = 0x00000018,
+    ADDR_FMT_11_11_10_FLOAT                       = ADDR_FMT_11_11_10,
     ADDR_FMT_2_10_10_10                           = 0x00000019,
     ADDR_FMT_8_8_8_8                              = 0x0000001a,
     ADDR_FMT_10_10_10_2                           = 0x0000001b,
     ADDR_FMT_X24_8_32_FLOAT                       = 0x0000001c,
     ADDR_FMT_32_32                                = 0x0000001d,
-    ADDR_FMT_32_32_FLOAT                          = 0x0000001e,
+    ADDR_FMT_32_32_FLOAT                          = ADDR_FMT_32_32,
     ADDR_FMT_16_16_16_16                          = 0x0000001f,
-    ADDR_FMT_16_16_16_16_FLOAT                    = 0x00000020,
+    ADDR_FMT_16_16_16_16_FLOAT                    = ADDR_FMT_16_16_16_16,
     ADDR_FMT_RESERVED_33                          = 0x00000021,
     ADDR_FMT_32_32_32_32                          = 0x00000022,
-    ADDR_FMT_32_32_32_32_FLOAT                    = 0x00000023,
+    ADDR_FMT_32_32_32_32_FLOAT                    = ADDR_FMT_32_32_32_32,
     ADDR_FMT_RESERVED_36                          = 0x00000024,
     ADDR_FMT_1                                    = 0x00000025,
     ADDR_FMT_1_REVERSED                           = 0x00000026,
@@ -393,9 +392,9 @@ typedef enum _AddrFormat {
     ADDR_FMT_5_9_9_9_SHAREDEXP                    = 0x0000002b,
     ADDR_FMT_8_8_8                                = 0x0000002c,
     ADDR_FMT_16_16_16                             = 0x0000002d,
-    ADDR_FMT_16_16_16_FLOAT                       = 0x0000002e,
+    ADDR_FMT_16_16_16_FLOAT                       = ADDR_FMT_16_16_16,
     ADDR_FMT_32_32_32                             = 0x0000002f,
-    ADDR_FMT_32_32_32_FLOAT                       = 0x00000030,
+    ADDR_FMT_32_32_32_FLOAT                       = ADDR_FMT_32_32_32,
     ADDR_FMT_BC1                                  = 0x00000031,
     ADDR_FMT_BC2                                  = 0x00000032,
     ADDR_FMT_BC3                                  = 0x00000033,
@@ -550,7 +549,6 @@ typedef enum _AddrHtileBlockSize
     ADDR_HTILE_BLOCKSIZE_8 = 8,
 } AddrHtileBlockSize;
 
-
 /**
 ****************************************************************************************************
 *   AddrPipeCfg
@@ -584,7 +582,8 @@ typedef enum _AddrPipeCfg
     ADDR_PIPECFG_P8_32x64_32x32  = 15,
     ADDR_PIPECFG_P16_32x32_8x16  = 17, /// 16 pipes
     ADDR_PIPECFG_P16_32x32_16x16 = 18,
-    ADDR_PIPECFG_MAX             = 19,
+    ADDR_PIPECFG_RESERVED        = 19, /// reserved for internal use
+    ADDR_PIPECFG_MAX             = 20,
 } AddrPipeCfg;
 
 /**
@@ -712,7 +711,6 @@ typedef enum _AddrTileType
 #define ADDR64D "lld" OR "I64d"
 #endif
 
-
 /// @brief Union for storing a 32-bit float or 32-bit integer
 /// @ingroup type
 ///
@@ -728,7 +726,6 @@ typedef union {
     float    f;
 } ADDR_FLT_32;
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //
 //  Macros for controlling linking and building on multiple systems

src/amd/addrlib/meson.build

@@ -19,35 +19,33 @@
 # SOFTWARE.
 
 files_addrlib = files(
-  'addrinterface.cpp',
+  'inc/addrinterface.h',
-  'addrinterface.h',
+  'inc/addrtypes.h',
-  'addrtypes.h',
+  'src/addrinterface.cpp',
-  'core/addrcommon.h',
+  'src/core/addrcommon.h',
-  'core/addrelemlib.cpp',
+  'src/core/addrelemlib.cpp',
-  'core/addrelemlib.h',
+  'src/core/addrelemlib.h',
-  'core/addrlib.cpp',
+  'src/core/addrlib.cpp',
-  'core/addrlib.h',
+  'src/core/addrlib.h',
-  'core/addrlib1.cpp',
+  'src/core/addrlib1.cpp',
-  'core/addrlib1.h',
+  'src/core/addrlib1.h',
-  'core/addrlib2.cpp',
+  'src/core/addrlib2.cpp',
-  'core/addrlib2.h',
+  'src/core/addrlib2.h',
-  'core/addrobject.cpp',
+  'src/core/addrobject.cpp',
-  'core/addrobject.h',
+  'src/core/addrobject.h',
-  'gfx9/chip/gfx9_enum.h',
+  'src/core/coord.cpp',
-  'gfx9/coord.cpp',
+  'src/core/coord.h',
-  'gfx9/coord.h',
+  'src/gfx9/gfx9addrlib.cpp',
-  'gfx9/gfx9addrlib.cpp',
+  'src/gfx9/gfx9addrlib.h',
-  'gfx9/gfx9addrlib.h',
+  'src/amdgpu_asic_addr.h',
-  'amdgpu_asic_addr.h',
+  'src/chip/gfx9/gfx9_gb_reg.h',
-  'inc/chip/gfx9/gfx9_gb_reg.h',
+  'src/chip/r800/si_gb_reg.h',
-  'inc/chip/r800/si_gb_reg.h',
+  'src/r800/ciaddrlib.cpp',
-  'r800/chip/si_ci_vi_merged_enum.h',
+  'src/r800/ciaddrlib.h',
-  'r800/ciaddrlib.cpp',
+  'src/r800/egbaddrlib.cpp',
-  'r800/ciaddrlib.h',
+  'src/r800/egbaddrlib.h',
-  'r800/egbaddrlib.cpp',
+  'src/r800/siaddrlib.cpp',
-  'r800/egbaddrlib.h',
+  'src/r800/siaddrlib.h',
-  'r800/siaddrlib.cpp',
-  'r800/siaddrlib.h',
 )
 
 libamdgpu_addrlib = static_library(
@@ -55,7 +53,7 @@ libamdgpu_addrlib = static_library(
   files_addrlib,
   include_directories : [
     include_directories(
-      'core', 'inc/chip/gfx9', 'inc/chip/r800', 'gfx9/chip', 'r800/chip',
+      'inc', 'src', 'src/core', 'src/chip/gfx9', 'src/chip/r800',
     ),
     inc_amd_common, inc_common, inc_src,
   ],

src/amd/addrlib/r800/chip/si_ci_vi_merged_enum.h

@@ -1,40 +0,0 @@
-/*
- * Copyright © 2014 Advanced Micro Devices, Inc.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining
- * a copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
- * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- */
-#if !defined (SI_CI_VI_MERGED_ENUM_HEADER)
-#define SI_CI_VI_MERGED_ENUM_HEADER
-
-typedef enum PipeInterleaveSize {
-ADDR_CONFIG_PIPE_INTERLEAVE_256B         = 0x00000000,
-ADDR_CONFIG_PIPE_INTERLEAVE_512B         = 0x00000001,
-} PipeInterleaveSize;
-
-typedef enum RowSize {
-ADDR_CONFIG_1KB_ROW                      = 0x00000000,
-ADDR_CONFIG_2KB_ROW                      = 0x00000001,
-ADDR_CONFIG_4KB_ROW                      = 0x00000002,
-} RowSize;
-
-#endif

src/amd/addrlib/src/addrinterface.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -61,13 +61,13 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
 {
     ADDR_E_RETURNCODE returnCode = ADDR_OK;
 
-    returnCode = Lib::Create(pAddrCreateIn, pAddrCreateOut);
+    {
+        returnCode = Lib::Create(pAddrCreateIn, pAddrCreateOut);
+    }
 
     return returnCode;
 }
 
-
-
 /**
 ****************************************************************************************************
 *   AddrDestroy
@@ -97,8 +97,6 @@ ADDR_E_RETURNCODE ADDR_API AddrDestroy(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                    Surface functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -135,8 +133,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
     return returnCode;
 }
 
-
-
 /**
 ****************************************************************************************************
 *   AddrComputeSurfaceAddrFromCoord
@@ -201,8 +197,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                   HTile functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -304,8 +298,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     C-mask functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -408,8 +400,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     F-mask functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -510,8 +500,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     DCC key functions
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -546,8 +534,6 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
     return returnCode;
 }
 
-
-
 ///////////////////////////////////////////////////////////////////////////////
 // Below functions are element related or helper functions
 ///////////////////////////////////////////////////////////////////////////////
@@ -850,6 +836,34 @@ BOOL_32 ADDR_API ElemGetExportNorm(
     return enabled;
 }
 
+/**
+****************************************************************************************************
+*   ElemSize
+*
+*   @brief
+*       Get bits-per-element for specified format
+*
+*   @return
+*       Bits-per-element of specified format
+*
+****************************************************************************************************
+*/
+UINT_32 ADDR_API ElemSize(
+    ADDR_HANDLE hLib,
+    AddrFormat  format)
+{
+    UINT_32 bpe = 0;
+
+    Addr::Lib* pLib = Lib::GetLib(hLib);
+
+    if (pLib != NULL)
+    {
+        bpe = pLib->GetBpe(format);
+    }
+
+    return bpe;
+}
+
 /**
 ****************************************************************************************************
 *   AddrConvertTileInfoToHW
@@ -1105,7 +1119,6 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
     return returnCode;
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                    Surface functions for Addr2
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1142,7 +1155,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeSurfaceAddrFromCoord
@@ -1175,7 +1187,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeSurfaceCoordFromAddr
@@ -1208,8 +1219,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                   HTile functions for Addr2
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1246,7 +1255,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeHtileAddrFromCoord
@@ -1279,7 +1287,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeHtileCoordFromAddr
@@ -1313,8 +1320,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     C-mask functions for Addr2
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1352,7 +1357,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeCmaskAddrFromCoord
@@ -1385,7 +1389,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeCmaskCoordFromAddr
@@ -1419,8 +1422,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     F-mask functions for Addr2
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1457,7 +1458,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeFmaskAddrFromCoord
@@ -1490,7 +1490,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Addr2ComputeFmaskCoordFromAddr
@@ -1523,8 +1522,6 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
     return returnCode;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                                     DCC key functions for Addr2
 ////////////////////////////////////////////////////////////////////////////////////////////////////

src/amd/addrlib/src/amdgpu_asic_addr.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2017-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -96,7 +96,6 @@
 #define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
 #define AMDGPU_IN_RANGE(val, ...)   AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__))
 
-
 // ASICREV_IS(eRevisionId, revisionName)
 #define ASICREV_IS(r, rn)              AMDGPU_IN_RANGE(r, AMDGPU_##rn##_RANGE)
 #define ASICREV_IS_TAHITI_P(r)         ASICREV_IS(r, TAHITI)

src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h

@@ -2,7 +2,7 @@
 #define __GFX9_GB_REG_H__
 
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/chip/r800/si_gb_reg.h

@@ -2,7 +2,7 @@
 #define __SI_GB_REG_H__
 
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/core/addrcommon.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -99,7 +99,6 @@
 #define ADDR_INFO(cond, a)         \
 { if (!(cond)) { ADDR_PRNT(a); } }
 
-
 /// @brief Macro for reporting error warning messages
 /// @ingroup util
 ///
@@ -118,7 +117,6 @@
     ADDR_PRNT(("  WARNING in file %s, line %d\n", __FILE__, __LINE__)); \
 } }
 
-
 /// @brief Macro for reporting fatal error conditions
 /// @ingroup util
 ///
@@ -261,7 +259,8 @@ union ConfigFlags
         UINT_32 useHtileSliceAlign     : 1;    ///< Do htile single slice alignment
         UINT_32 allowLargeThickTile    : 1;    ///< Allow 64*thickness*bytesPerPixel > rowSize
         UINT_32 disableLinearOpt       : 1;    ///< Disallow tile modes to be optimized to linear
-        UINT_32 reserved               : 22;   ///< Reserved bits for future use
+        UINT_32 use32bppFor422Fmt      : 1;    ///< View 422 formats as 32 bits per pixel element
+        UINT_32 reserved               : 21;   ///< Reserved bits for future use
     };
 
     UINT_32 value;
@@ -845,7 +844,6 @@ static inline VOID InitChannel(
     pChanSet->index = index;
 }
 
-
 /**
 ****************************************************************************************************
 *   InitChannel

src/amd/addrlib/src/core/addrelemlib.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -72,6 +72,7 @@ ElemLib::ElemLib(
         default:
             m_fp16ExportNorm = 1;
             m_depthPlanarType = ADDR_DEPTH_PLANAR_R800;
+            break;
     }
 
     m_configFlags.value = 0;
@@ -346,7 +347,6 @@ VOID ElemLib::Int32sToPixel(
     UINT_32 elemMask=0;
     UINT_32 elementXor = 0;  // address xor when reading bytes from elements
 
-
     // @@ NOTE: assert if called on a compressed format!
 
     if (properties.byteAligned)    // Components are all byte-sized
@@ -1387,38 +1387,33 @@ UINT_32 ElemLib::GetBitsPerPixel(
         case ADDR_FMT_8_8:
         case ADDR_FMT_4_4_4_4:
         case ADDR_FMT_16:
-        case ADDR_FMT_16_FLOAT:
             bpp = 16;
             break;
-        case ADDR_FMT_GB_GR: // treat as FMT_8_8
+        case ADDR_FMT_GB_GR:
             elemMode = ADDR_PACKED_GBGR;
-            bpp     = 16;
+            bpp      = m_configFlags.use32bppFor422Fmt ? 32 : 16;
+            expandX  = m_configFlags.use32bppFor422Fmt ? 2 : 1;
             break;
-        case ADDR_FMT_BG_RG: // treat as FMT_8_8
+        case ADDR_FMT_BG_RG:
             elemMode = ADDR_PACKED_BGRG;
-            bpp     = 16;
+            bpp      = m_configFlags.use32bppFor422Fmt ? 32 : 16;
+            expandX  = m_configFlags.use32bppFor422Fmt ? 2 : 1;
             break;
         case ADDR_FMT_8_8_8_8:
         case ADDR_FMT_2_10_10_10:
         case ADDR_FMT_10_11_11:
         case ADDR_FMT_11_11_10:
         case ADDR_FMT_16_16:
-        case ADDR_FMT_16_16_FLOAT:
         case ADDR_FMT_32:
-        case ADDR_FMT_32_FLOAT:
         case ADDR_FMT_24_8:
-        case ADDR_FMT_24_8_FLOAT:
             bpp = 32;
             break;
         case ADDR_FMT_16_16_16_16:
-        case ADDR_FMT_16_16_16_16_FLOAT:
         case ADDR_FMT_32_32:
-        case ADDR_FMT_32_32_FLOAT:
         case ADDR_FMT_CTX1:
             bpp = 64;
             break;
         case ADDR_FMT_32_32_32_32:
-        case ADDR_FMT_32_32_32_32_FLOAT:
             bpp = 128;
             break;
         case ADDR_FMT_INVALID:
@@ -1444,10 +1439,7 @@ UINT_32 ElemLib::GetBitsPerPixel(
         case ADDR_FMT_32_AS_8:
         case ADDR_FMT_32_AS_8_8:
         case ADDR_FMT_8_24:
-        case ADDR_FMT_8_24_FLOAT:
         case ADDR_FMT_10_10_10_2:
-        case ADDR_FMT_10_11_11_FLOAT:
-        case ADDR_FMT_11_11_10_FLOAT:
         case ADDR_FMT_5_9_9_9_SHAREDEXP:
             bpp = 32;
             break;
@@ -1461,12 +1453,10 @@ UINT_32 ElemLib::GetBitsPerPixel(
             expandX = 3;
             break;
         case ADDR_FMT_16_16_16:
-        case ADDR_FMT_16_16_16_FLOAT:
             elemMode = ADDR_EXPANDED;
             bpp = 48;//@@ 16;      // read 3 elements per pixel
             expandX = 3;
             break;
-        case ADDR_FMT_32_32_32_FLOAT:
         case ADDR_FMT_32_32_32:
             elemMode = ADDR_EXPANDED;
             expandX = 3;
@@ -1755,7 +1745,6 @@ BOOL_32 ElemLib::IsBlockCompressed(
             ((format >= ADDR_FMT_ASTC_4x4) && (format <= ADDR_FMT_ETC2_128BPP)));
 }
 
-
 /**
 ****************************************************************************************************
 *   ElemLib::IsCompressed
@@ -1797,9 +1786,7 @@ BOOL_32 ElemLib::IsExpand3x(
     {
         case ADDR_FMT_8_8_8:
         case ADDR_FMT_16_16_16:
-        case ADDR_FMT_16_16_16_FLOAT:
         case ADDR_FMT_32_32_32:
-        case ADDR_FMT_32_32_32_FLOAT:
             is3x = TRUE;
             break;
         default:

src/amd/addrlib/src/core/addrelemlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/core/addrlib.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -157,7 +157,6 @@ Lib::~Lib()
     }
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               Initialization/Helper
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -207,7 +206,7 @@ ADDR_E_RETURNCODE Lib::Create(
                         pLib = SiHwlInit(&client);
                         break;
                     case FAMILY_VI:
-                    case FAMILY_CZ: // VI based fusion(carrizo)
+                    case FAMILY_CZ:
                     case FAMILY_CI:
                     case FAMILY_KV: // CI based fusion
                         pLib = CiHwlInit(&client);
@@ -486,12 +485,10 @@ UINT_32 Lib::Bits2Number(
     return number;
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               Element lib
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-
 /**
 ****************************************************************************************************
 *   Lib::Flt32ToColorPixel
@@ -607,7 +604,6 @@ ADDR_E_RETURNCODE Lib::Flt32ToColorPixel(
     return returnCode;
 }
 
-
 /**
 ****************************************************************************************************
 *   Lib::GetExportNorm
@@ -641,4 +637,19 @@ BOOL_32 Lib::GetExportNorm(
     return enabled;
 }
 
+/**
+****************************************************************************************************
+*   Lib::GetBpe
+*
+*   @brief
+*       Get bits-per-element for specified format
+*   @return
+*       bits-per-element of specified format
+****************************************************************************************************
+*/
+UINT_32 Lib::GetBpe(AddrFormat format) const
+{
+    return GetElemLib()->GetBitsPerPixel(format);
+}
+
 } // Addr

src/amd/addrlib/src/core/addrlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -286,6 +286,8 @@ public:
 
     ADDR_E_RETURNCODE GetMaxMetaAlignments(ADDR_GET_MAX_ALINGMENTS_OUTPUT* pOut) const;
 
+    UINT_32 GetBpe(AddrFormat format) const;
+
 protected:
     Lib();  // Constructor is protected
     Lib(const Client* pClient);

src/amd/addrlib/src/core/addrlib1.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2016 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -140,19 +140,17 @@ Lib* Lib::GetLib(
         ((pAddrLib->GetChipFamily() == ADDR_CHIP_FAMILY_IVLD) ||
          (pAddrLib->GetChipFamily() > ADDR_CHIP_FAMILY_VI)))
     {
-        // only valid and pre-VI AISC can use AddrLib1 function.
+        // only valid and pre-VI ASIC can use AddrLib1 function.
         ADDR_ASSERT_ALWAYS();
         hLib = NULL;
     }
     return static_cast<Lib*>(hLib);
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               Surface Methods
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-
 /**
 ****************************************************************************************************
 *   Lib::ComputeSurfaceInfo
@@ -1230,8 +1228,6 @@ UINT_32 Lib::Thickness(
     return ModeFlags[tileMode].thickness;
 }
 
-
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               CMASK/HTILE
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2012,7 +2008,6 @@ ADDR_E_RETURNCODE Lib::ComputeCmaskInfo(
     *pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1);
     *pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1);
 
-
     sliceBytes = ComputeCmaskBytes(*pPitchOut,
                                    *pHeightOut,
                                    1);
@@ -2240,7 +2235,6 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
     UINT_32 groupBits = 8 * m_pipeInterleaveBytes;
     UINT_32 pipes = numPipes;
 
-
     //
     // Compute the micro tile size, in bits. And macro tile pitch and height.
     //
@@ -2293,20 +2287,17 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
     pitch = pitchAligned;
     height = heightAligned;
 
-
     //
     // Convert byte address to bit address.
     //
     bitAddr = BYTES_TO_BITS(addr) + bitPosition;
 
-
     //
     // Remove pipe bits from address.
     //
 
     bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits);
 
-
     elemOffset = bitAddr / elemBits;
 
     tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits;
@@ -2324,7 +2315,6 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
     macroY = static_cast<UINT_32>((macroNumber % macrosPerSlice) / macrosPerPitch);
     macroZ = static_cast<UINT_32>((macroNumber / macrosPerSlice));
 
-
     microX = microNumber % (macroTilePitch / factor / MicroTileWidth);
     microY = (microNumber / (macroTilePitch / factor / MicroTileHeight));
 
@@ -2335,7 +2325,6 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
     microTileCoordY = ComputeXmaskCoordYFromPipe(pipe,
                                                  *pX/MicroTileWidth);
 
-
     //
     // Assemble final coordinates.
     //
@@ -2395,7 +2384,6 @@ UINT_64 Lib::HwlComputeXmaskAddrFromCoord(
     UINT_64 offsetHi;
     UINT_64 groupMask;
 
-
     UINT_32 elemBits = 0;
 
     UINT_32 numPipes = m_pipes; // This function is accessed prior to si only
@@ -3358,7 +3346,6 @@ VOID Lib::PadDimensions(
                      heightAlign);
 }
 
-
 /**
 ****************************************************************************************************
 *   Lib::HwlPreHandleBaseLvl3xPitch
@@ -3420,7 +3407,6 @@ UINT_32 Lib::HwlPostHandleBaseLvl3xPitch(
     return expPitch;
 }
 
-
 /**
 ****************************************************************************************************
 *   Lib::IsMacroTiled
@@ -3941,7 +3927,6 @@ VOID Lib::ComputeQbStereoInfo(
     // 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo.
 }
 
-
 /**
 ****************************************************************************************************
 *   Lib::ComputePrtInfo

src/amd/addrlib/src/core/addrlib1.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2016 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -354,7 +354,6 @@ protected:
         const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
         UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0;
 
-
     virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
     {
         // not supported in hwl layer

src/amd/addrlib/src/core/addrlib2.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -113,19 +113,17 @@ Lib* Lib::GetLib(
     if ((pAddrLib != NULL) &&
         (pAddrLib->GetChipFamily() <= ADDR_CHIP_FAMILY_VI))
     {
-        // only valid and GFX9+ AISC can use AddrLib2 function.
+        // only valid and GFX9+ ASIC can use AddrLib2 function.
         ADDR_ASSERT_ALWAYS();
         hLib = NULL;
     }
     return static_cast<Lib*>(hLib);
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               Surface Methods
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 
-
 /**
 ************************************************************************************************************************
 *   Lib::ComputeSurfaceInfo
@@ -417,7 +415,6 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddr(
     return returnCode;
 }
 
-
 ////////////////////////////////////////////////////////////////////////////////////////////////////
 //                               CMASK/HTILE
 ////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -833,10 +830,6 @@ ADDR_E_RETURNCODE Lib::ComputePipeBankXor(
     {
         returnCode = ADDR_INVALIDPARAMS;
     }
-    else if (IsXor(pIn->swizzleMode) == FALSE)
-    {
-        returnCode = ADDR_NOTSUPPORTED;
-    }
     else
     {
         returnCode = HwlComputePipeBankXor(pIn, pOut);
@@ -1885,7 +1878,6 @@ VOID Lib::ComputeQbStereoInfo(
     pOut->surfSize <<= 1;
 }
 
-
 } // V2
 } // Addr
 

src/amd/addrlib/src/core/addrlib2.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -83,6 +83,39 @@ struct Dim3d
     UINT_32 d;
 };
 
+// Macro define resource block type
+enum AddrBlockType
+{
+    AddrBlockMicro     = 0, // Resource uses 256B block
+    AddrBlock4KB       = 1, // Resource uses 4KB block
+    AddrBlock64KB      = 2, // Resource uses 64KB block
+    AddrBlockVar       = 3, // Resource uses var block, only valid for GFX9
+    AddrBlockLinear    = 4, // Resource uses linear swizzle mode
+
+    AddrBlockMaxTiledType = AddrBlock64KB + 1,
+};
+
+enum AddrBlockSet
+{
+    AddrBlockSetMicro     = 1 << AddrBlockMicro,
+    AddrBlockSetMacro4KB  = 1 << AddrBlock4KB,
+    AddrBlockSetMacro64KB = 1 << AddrBlock64KB,
+    AddrBlockSetVar       = 1 << AddrBlockVar,
+    AddrBlockSetLinear    = 1 << AddrBlockLinear,
+
+    AddrBlockSetMacro   = AddrBlockSetMacro4KB | AddrBlockSetMacro64KB,
+};
+
+enum AddrSwSet
+{
+    AddrSwSetZ = 1 << ADDR_SW_Z,
+    AddrSwSetS = 1 << ADDR_SW_S,
+    AddrSwSetD = 1 << ADDR_SW_D,
+    AddrSwSetR = 1 << ADDR_SW_R,
+
+    AddrSwSetAll         = AddrSwSetZ | AddrSwSetS | AddrSwSetD | AddrSwSetR,
+};
+
 /**
 ************************************************************************************************************************
 * @brief This class contains asic independent address lib functionalities
@@ -190,6 +223,7 @@ protected:
     Lib(const Client* pClient);
 
     static const UINT_32 MaxNumOfBpp = 5;
+    static const UINT_32 MaxNumOfAA  = 4;
 
     static const Dim2d Block256_2d[MaxNumOfBpp];
     static const Dim3d Block1K_3d[MaxNumOfBpp];
@@ -236,6 +270,21 @@ protected:
         return m_swizzleModeTable[swizzleMode].isZ;
     }
 
+    BOOL_32 IsStandardSwizzle(AddrSwizzleMode swizzleMode) const
+    {
+        return m_swizzleModeTable[swizzleMode].isStd;
+    }
+
+    BOOL_32 IsDisplaySwizzle(AddrSwizzleMode swizzleMode) const
+    {
+        return m_swizzleModeTable[swizzleMode].isDisp;
+    }
+
+    BOOL_32 IsRotateSwizzle(AddrSwizzleMode swizzleMode) const
+    {
+        return m_swizzleModeTable[swizzleMode].isRot;
+    }
+
     BOOL_32 IsStandardSwizzle(AddrResourceType resourceType, AddrSwizzleMode swizzleMode) const
     {
         return HwlIsStandardSwizzle(resourceType, swizzleMode);
@@ -246,11 +295,6 @@ protected:
         return HwlIsDisplaySwizzle(resourceType, swizzleMode);
     }
 
-    BOOL_32 IsRotateSwizzle(AddrSwizzleMode swizzleMode) const
-    {
-        return m_swizzleModeTable[swizzleMode].isRot;
-    }
-
     BOOL_32 IsXor(AddrSwizzleMode swizzleMode) const
     {
         return m_swizzleModeTable[swizzleMode].isXor;
@@ -496,7 +540,6 @@ protected:
         return ADDR_NOTSUPPORTED;
     }
 
-
     virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
         const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
         ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT*      pOut) const

src/amd/addrlib/src/core/addrobject.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/core/addrobject.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/core/coord.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -28,6 +28,11 @@
 #include "addrcommon.h"
 #include "coord.h"
 
+namespace Addr
+{
+namespace V2
+{
+
 Coordinate::Coordinate()
 {
     dim = 'x';
@@ -705,3 +710,5 @@ BOOL_32 CoordEq::operator!=(const CoordEq& b)
     return !(*this == b);
 }
 
+} // V2
+} // Addr

src/amd/addrlib/src/core/coord.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -29,6 +29,11 @@
 #ifndef __COORD_H
 #define __COORD_H
 
+namespace Addr
+{
+namespace V2
+{
+
 class Coordinate
 {
 public:
@@ -110,5 +115,8 @@ private:
     CoordTerm m_eq[MaxEqBits];
 };
 
+} // V2
+} // Addr
+
 #endif
 

src/amd/addrlib/src/gfx9/gfx9addrlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2017 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -57,6 +57,7 @@ struct Gfx9ChipSettings
         UINT_32 isRaven             : 1;
         UINT_32 isVega12            : 1;
         UINT_32 isVega20            : 1;
+        UINT_32 reserved0           : 27;
 
         // Display engine IP version name
         UINT_32 isDce12             : 1;
@@ -84,6 +85,155 @@ enum Gfx9DataType
     Gfx9DataFmask
 };
 
+const UINT_32 Gfx9LinearSwModeMask = (1u << ADDR_SW_LINEAR);
+
+const UINT_32 Gfx9Blk256BSwModeMask = (1u << ADDR_SW_256B_S) |
+                                      (1u << ADDR_SW_256B_D) |
+                                      (1u << ADDR_SW_256B_R);
+
+const UINT_32 Gfx9Blk4KBSwModeMask = (1u << ADDR_SW_4KB_Z)   |
+                                     (1u << ADDR_SW_4KB_S)   |
+                                     (1u << ADDR_SW_4KB_D)   |
+                                     (1u << ADDR_SW_4KB_R)   |
+                                     (1u << ADDR_SW_4KB_Z_X) |
+                                     (1u << ADDR_SW_4KB_S_X) |
+                                     (1u << ADDR_SW_4KB_D_X) |
+                                     (1u << ADDR_SW_4KB_R_X);
+
+const UINT_32 Gfx9Blk64KBSwModeMask = (1u << ADDR_SW_64KB_Z)   |
+                                      (1u << ADDR_SW_64KB_S)   |
+                                      (1u << ADDR_SW_64KB_D)   |
+                                      (1u << ADDR_SW_64KB_R)   |
+                                      (1u << ADDR_SW_64KB_Z_T) |
+                                      (1u << ADDR_SW_64KB_S_T) |
+                                      (1u << ADDR_SW_64KB_D_T) |
+                                      (1u << ADDR_SW_64KB_R_T) |
+                                      (1u << ADDR_SW_64KB_Z_X) |
+                                      (1u << ADDR_SW_64KB_S_X) |
+                                      (1u << ADDR_SW_64KB_D_X) |
+                                      (1u << ADDR_SW_64KB_R_X);
+
+const UINT_32 Gfx9BlkVarSwModeMask = (1u << ADDR_SW_VAR_Z)   |
+                                     (1u << ADDR_SW_VAR_S)   |
+                                     (1u << ADDR_SW_VAR_D)   |
+                                     (1u << ADDR_SW_VAR_R)   |
+                                     (1u << ADDR_SW_VAR_Z_X) |
+                                     (1u << ADDR_SW_VAR_S_X) |
+                                     (1u << ADDR_SW_VAR_D_X) |
+                                     (1u << ADDR_SW_VAR_R_X);
+
+const UINT_32 Gfx9ZSwModeMask = (1u << ADDR_SW_4KB_Z)    |
+                                (1u << ADDR_SW_64KB_Z)   |
+                                (1u << ADDR_SW_VAR_Z)    |
+                                (1u << ADDR_SW_64KB_Z_T) |
+                                (1u << ADDR_SW_4KB_Z_X)  |
+                                (1u << ADDR_SW_64KB_Z_X) |
+                                (1u << ADDR_SW_VAR_Z_X);
+
+const UINT_32 Gfx9StandardSwModeMask = (1u << ADDR_SW_256B_S)   |
+                                       (1u << ADDR_SW_4KB_S)    |
+                                       (1u << ADDR_SW_64KB_S)   |
+                                       (1u << ADDR_SW_VAR_S)    |
+                                       (1u << ADDR_SW_64KB_S_T) |
+                                       (1u << ADDR_SW_4KB_S_X)  |
+                                       (1u << ADDR_SW_64KB_S_X) |
+                                       (1u << ADDR_SW_VAR_S_X);
+
+const UINT_32 Gfx9DisplaySwModeMask = (1u << ADDR_SW_256B_D)   |
+                                      (1u << ADDR_SW_4KB_D)    |
+                                      (1u << ADDR_SW_64KB_D)   |
+                                      (1u << ADDR_SW_VAR_D)    |
+                                      (1u << ADDR_SW_64KB_D_T) |
+                                      (1u << ADDR_SW_4KB_D_X)  |
+                                      (1u << ADDR_SW_64KB_D_X) |
+                                      (1u << ADDR_SW_VAR_D_X);
+
+const UINT_32 Gfx9RotateSwModeMask = (1u << ADDR_SW_256B_R)   |
+                                     (1u << ADDR_SW_4KB_R)    |
+                                     (1u << ADDR_SW_64KB_R)   |
+                                     (1u << ADDR_SW_VAR_R)    |
+                                     (1u << ADDR_SW_64KB_R_T) |
+                                     (1u << ADDR_SW_4KB_R_X)  |
+                                     (1u << ADDR_SW_64KB_R_X) |
+                                     (1u << ADDR_SW_VAR_R_X);
+
+const UINT_32 Gfx9XSwModeMask = (1u << ADDR_SW_4KB_Z_X)  |
+                                (1u << ADDR_SW_4KB_S_X)  |
+                                (1u << ADDR_SW_4KB_D_X)  |
+                                (1u << ADDR_SW_4KB_R_X)  |
+                                (1u << ADDR_SW_64KB_Z_X) |
+                                (1u << ADDR_SW_64KB_S_X) |
+                                (1u << ADDR_SW_64KB_D_X) |
+                                (1u << ADDR_SW_64KB_R_X) |
+                                (1u << ADDR_SW_VAR_Z_X)  |
+                                (1u << ADDR_SW_VAR_S_X)  |
+                                (1u << ADDR_SW_VAR_D_X)  |
+                                (1u << ADDR_SW_VAR_R_X);
+
+const UINT_32 Gfx9TSwModeMask = (1u << ADDR_SW_64KB_Z_T) |
+                                (1u << ADDR_SW_64KB_S_T) |
+                                (1u << ADDR_SW_64KB_D_T) |
+                                (1u << ADDR_SW_64KB_R_T);
+
+const UINT_32 Gfx9XorSwModeMask = Gfx9XSwModeMask |
+                                  Gfx9TSwModeMask;
+
+const UINT_32 Gfx9AllSwModeMask = Gfx9LinearSwModeMask   |
+                                  Gfx9ZSwModeMask        |
+                                  Gfx9StandardSwModeMask |
+                                  Gfx9DisplaySwModeMask  |
+                                  Gfx9RotateSwModeMask;
+
+const UINT_32 Gfx9Rsrc1dSwModeMask = Gfx9LinearSwModeMask;
+
+const UINT_32 Gfx9Rsrc2dSwModeMask = Gfx9AllSwModeMask;
+
+const UINT_32 Gfx9Rsrc3dSwModeMask = Gfx9AllSwModeMask & ~Gfx9Blk256BSwModeMask & ~Gfx9RotateSwModeMask;
+
+const UINT_32 Gfx9Rsrc2dPrtSwModeMask = (Gfx9Blk4KBSwModeMask | Gfx9Blk64KBSwModeMask) & ~Gfx9XSwModeMask;
+
+const UINT_32 Gfx9Rsrc3dPrtSwModeMask = Gfx9Rsrc2dPrtSwModeMask & ~Gfx9RotateSwModeMask & ~Gfx9DisplaySwModeMask;
+
+const UINT_32 Gfx9Rsrc3dThinSwModeMask = Gfx9DisplaySwModeMask & ~Gfx9Blk256BSwModeMask;
+
+const UINT_32 Gfx9MsaaSwModeMask = Gfx9AllSwModeMask & ~Gfx9Blk256BSwModeMask & ~Gfx9LinearSwModeMask;
+
+const UINT_32 Dce12NonBpp32SwModeMask = (1u << ADDR_SW_LINEAR)   |
+                                        (1u << ADDR_SW_4KB_D)    |
+                                        (1u << ADDR_SW_4KB_R)    |
+                                        (1u << ADDR_SW_64KB_D)   |
+                                        (1u << ADDR_SW_64KB_R)   |
+                                        (1u << ADDR_SW_VAR_D)    |
+                                        (1u << ADDR_SW_VAR_R)    |
+                                        (1u << ADDR_SW_4KB_D_X)  |
+                                        (1u << ADDR_SW_4KB_R_X)  |
+                                        (1u << ADDR_SW_64KB_D_X) |
+                                        (1u << ADDR_SW_64KB_R_X) |
+                                        (1u << ADDR_SW_VAR_D_X)  |
+                                        (1u << ADDR_SW_VAR_R_X);
+
+const UINT_32 Dce12Bpp32SwModeMask = (1u << ADDR_SW_256B_D) |
+                                     (1u << ADDR_SW_256B_R) |
+                                     Dce12NonBpp32SwModeMask;
+
+const UINT_32 Dcn1NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR)   |
+                                       (1u << ADDR_SW_4KB_S)    |
+                                       (1u << ADDR_SW_64KB_S)   |
+                                       (1u << ADDR_SW_VAR_S)    |
+                                       (1u << ADDR_SW_64KB_S_T) |
+                                       (1u << ADDR_SW_4KB_S_X)  |
+                                       (1u << ADDR_SW_64KB_S_X) |
+                                       (1u << ADDR_SW_VAR_S_X);
+
+const UINT_32 Dcn1Bpp64SwModeMask = (1u << ADDR_SW_4KB_D)    |
+                                    (1u << ADDR_SW_64KB_D)   |
+                                    (1u << ADDR_SW_VAR_D)    |
+                                    (1u << ADDR_SW_64KB_D_T) |
+                                    (1u << ADDR_SW_4KB_D_X)  |
+                                    (1u << ADDR_SW_64KB_D_X) |
+                                    (1u << ADDR_SW_VAR_D_X)  |
+                                    Dcn1NonBpp64SwModeMask;
+
 /**
 ************************************************************************************************************************
 * @brief GFX9 meta equation parameters
@@ -122,6 +272,9 @@ public:
         return (pMem != NULL) ? new (pMem) Gfx9Lib(pClient) : NULL;
     }
 
+    virtual BOOL_32 IsValidDisplaySwizzleMode(
+        const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
+
 protected:
     Gfx9Lib(const Client* pClient);
     virtual ~Gfx9Lib();
@@ -368,7 +521,6 @@ protected:
         return compressBlkDim;
     }
 
-
     static const UINT_32          MaxSeLog2      = 3;
     static const UINT_32          MaxRbPerSeLog2 = 2;
 
@@ -432,14 +584,37 @@ private:
                         UINT_32 mip0Width, UINT_32 mip0Height, UINT_32 mip0Depth,
                         UINT_32* pNumMetaBlkX, UINT_32* pNumMetaBlkY, UINT_32* pNumMetaBlkZ) const;
 
-    BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
-
     ADDR_E_RETURNCODE ComputeSurfaceLinearPadding(
         const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
         UINT_32*                                pMipmap0PaddedWidth,
         UINT_32*                                pSlice0PaddedHeight,
         ADDR2_MIP_INFO*                         pMipInfo = NULL) const;
 
+    static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet)
+    {
+        ADDR2_BLOCK_SET allowedBlockSet = {};
+
+        allowedBlockSet.micro     = (allowedSwModeSet.value & Gfx9Blk256BSwModeMask) ? TRUE : FALSE;
+        allowedBlockSet.macro4KB  = (allowedSwModeSet.value & Gfx9Blk4KBSwModeMask)  ? TRUE : FALSE;
+        allowedBlockSet.macro64KB = (allowedSwModeSet.value & Gfx9Blk64KBSwModeMask) ? TRUE : FALSE;
+        allowedBlockSet.var       = (allowedSwModeSet.value & Gfx9BlkVarSwModeMask)  ? TRUE : FALSE;
+        allowedBlockSet.linear    = (allowedSwModeSet.value & Gfx9LinearSwModeMask)  ? TRUE : FALSE;
+
+        return allowedBlockSet;
+    }
+
+    static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet)
+    {
+        ADDR2_SWTYPE_SET allowedSwSet = {};
+
+        allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx9ZSwModeMask)        ? TRUE : FALSE;
+        allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx9StandardSwModeMask) ? TRUE : FALSE;
+        allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx9DisplaySwModeMask)  ? TRUE : FALSE;
+        allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx9RotateSwModeMask)   ? TRUE : FALSE;
+
+        return allowedSwSet;
+    }
+
     Gfx9ChipSettings m_settings;
 
     CoordEq      m_cachedMetaEq[MaxCachedMetaEq];

src/amd/addrlib/src/r800/ciaddrlib.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -1038,7 +1038,6 @@ VOID CiLib::HwlOverrideTileMode(
         {
             switch (pInOut->format)
             {
-                // see //gfxip/gcB/devel/cds/src/verif/tc/models/csim/tcp.cpp
                 // tcpError("Thick micro tiling is not supported for format...
                 case ADDR_FMT_X24_8_32_FLOAT:
                 case ADDR_FMT_32_AS_8:
@@ -2033,7 +2032,6 @@ UINT_64 CiLib::HwlComputeMetadataNibbleAddress(
     /// NOTE *2 because we are converting to Nibble address in this step
     UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8;
 
-
     ///--------------------------------------------------------------------------------------------
     /// Reinsert pipe bits back into the final address
     ///--------------------------------------------------------------------------------------------

src/amd/addrlib/src/r800/ciaddrlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -151,12 +151,14 @@ protected:
         UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
 
 private:
+
     VOID ReadGbTileMode(
         UINT_32 regValue, TileConfig* pCfg) const;
 
     VOID ReadGbMacroTileCfg(
         UINT_32 regValue, ADDR_TILEINFO* pCfg) const;
 
+private:
     BOOL_32 InitTileSettingTable(
         const UINT_32 *pSetting, UINT_32 noOfEntries);
 
@@ -197,5 +199,3 @@ private:
 } // Addr
 
 #endif
-
-

src/amd/addrlib/src/r800/egbaddrlib.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -436,7 +436,6 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled(
                                                               &expPitch,
                                                               &expHeight);
 
-
     pOut->pitch = expPitch;
     pOut->height = expHeight;
     pOut->depth = expNumSlices;
@@ -448,7 +447,6 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled(
     return valid;
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::ComputeSurfaceInfoMacroTiled
@@ -755,7 +753,6 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMicroTiled(
     return valid;
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::HwlReduceBankWidthHeight
@@ -1817,7 +1814,6 @@ UINT_64 EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled(
                                 tileSplitSlice,
                                 pTileInfo);
 
-
     //
     // Split the offset to put some bits below the pipe+bank bits and some above.
     //
@@ -2161,7 +2157,6 @@ VOID EgBasedLib::HwlComputePixelCoordFromOffset(
     *pSlice += z;
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::DispatchComputeSurfaceCoordFromAddrDispatch
@@ -2306,7 +2301,6 @@ VOID EgBasedLib::DispatchComputeSurfaceCoordFromAddr(
     }
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled
@@ -2351,7 +2345,6 @@ VOID EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled(
     UINT_32 tileIndex;
     UINT_64 totalOffset;
 
-
     UINT_32 bank;
     UINT_32 pipe;
     UINT_32 groupBits = m_pipeInterleaveBytes << 3;
@@ -2673,7 +2666,6 @@ ADDR_E_RETURNCODE EgBasedLib::HwlExtractBankPipeSwizzle(
     return ADDR_OK;
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::HwlCombineBankPipeSwizzle
@@ -3043,7 +3035,6 @@ UINT_32 EgBasedLib::ComputeBankFromCoord(
             break;
     }
 
-
     //
     // Compute bank rotation for the tile split slice.
     //
@@ -3141,8 +3132,6 @@ UINT_32 EgBasedLib::ComputePipeRotation(
     return rotation;
 }
 
-
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::ComputeBankRotation
@@ -3185,7 +3174,6 @@ UINT_32 EgBasedLib::ComputeBankRotation(
     return rotation;
 }
 
-
 /**
 ****************************************************************************************************
 *   EgBasedLib::ComputeHtileBytes

src/amd/addrlib/src/r800/egbaddrlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/r800/siaddrlib.cpp

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining

src/amd/addrlib/src/r800/siaddrlib.h

@@ -1,5 +1,5 @@
 /*
- * Copyright © 2014 Advanced Micro Devices, Inc.
+ * Copyright © 2007-2018 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -88,7 +88,6 @@ struct SiChipSettings
     UINT_32 isPolaris11       : 1;
     UINT_32 isPolaris12       : 1;
     UINT_32 isVegaM           : 1;
-    // VI fusion
     UINT_32 isCarrizo         : 1;
 };
 

src/amd/common/ac_surface.c

@@ -27,7 +27,7 @@
 
 #include "ac_surface.h"
 #include "amd_family.h"
-#include "addrlib/amdgpu_asic_addr.h"
+#include "addrlib/src/amdgpu_asic_addr.h"
 #include "ac_gpu_info.h"
 #include "util/macros.h"
 #include "util/u_atomic.h"
@@ -39,7 +39,7 @@
 #include <amdgpu.h>
 #include <amdgpu_drm.h>
 
-#include "addrlib/addrinterface.h"
+#include "addrlib/inc/addrinterface.h"
 
 #ifndef CIASICIDGFXENGINE_SOUTHERNISLAND
 #define CIASICIDGFXENGINE_SOUTHERNISLAND 0x0000000A

src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c

@@ -29,7 +29,6 @@
 #include <errno.h>
 
 #include "radv_private.h"
-#include "addrlib/addrinterface.h"
 #include "util/bitset.h"
 #include "radv_amdgpu_winsys.h"
 #include "radv_amdgpu_surface.h"

src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h

@@ -30,7 +30,7 @@
 
 #include "radv_radeon_winsys.h"
 #include "ac_gpu_info.h"
-#include "addrlib/addrinterface.h"
+#include "addrlib/inc/addrinterface.h"
 #include <amdgpu.h>
 #include "util/list.h"
 #include <pthread.h>

src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h

@@ -31,7 +31,7 @@
 #include "pipebuffer/pb_cache.h"
 #include "pipebuffer/pb_slab.h"
 #include "gallium/drivers/radeon/radeon_winsys.h"
-#include "addrlib/addrinterface.h"
+#include "addrlib/inc/addrinterface.h"
 #include "util/simple_mtx.h"
 #include "util/u_queue.h"
 #include <amdgpu.h>