freedreno/ir3: Don't set bit for dest conversion for p0.c

This appears to be ignored when writing to predicate registers (which I
guess makes sense, since they are boolean).  So no real harm in setting
it, other than it makes some of the ir3_parser test vectors not match
the expected result for encoding.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8175>
This commit is contained in:
Rob Clark 2020-12-21 09:05:05 -08:00 committed by Marge Bot
parent 1cdff35361
commit 77552cbdda
1 changed files with 3 additions and 1 deletions

View File

@ -325,7 +325,9 @@ static int emit_cat2(struct ir3_instruction *instr, void *ptr,
cat2->sat = !!(instr->flags & IR3_INSTR_SAT);
cat2->ss = !!(instr->flags & IR3_INSTR_SS);
cat2->ul = !!(instr->flags & IR3_INSTR_UL);
cat2->dst_half = !!((src1->flags ^ dst->flags) & IR3_REG_HALF);
/* dst widen/narrow doesn't apply to p0.c */
if (dst->num < regid(REG_P0, 0))
cat2->dst_half = !!((src1->flags ^ dst->flags) & IR3_REG_HALF);
cat2->ei = !!(dst->flags & IR3_REG_EI);
cat2->cond = instr->cat2.condition;
cat2->full = ! (src1->flags & IR3_REG_HALF);