intel/compiler: Fix instruction size written calculation
We are always aligning to REG_SIZE but when we have payload sources less than REG_SIZE, size written is miscalculated. Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11766>
This commit is contained in:
parent
be2bfe5fe8
commit
75c73fcdc4
|
@ -771,9 +771,8 @@ namespace brw {
|
|||
inst->header_size = header_size;
|
||||
inst->size_written = header_size * REG_SIZE;
|
||||
for (unsigned i = header_size; i < sources; i++) {
|
||||
inst->size_written +=
|
||||
ALIGN(dispatch_width() * type_sz(src[i].type) * dst.stride,
|
||||
REG_SIZE);
|
||||
inst->size_written += dispatch_width() * type_sz(src[i].type) *
|
||||
dst.stride;
|
||||
}
|
||||
|
||||
return inst;
|
||||
|
|
Loading…
Reference in New Issue