vc4: Add support for multiple attributes
This commit is contained in:
Eric Anholt
parent
32948ca768
commit
75afa64ef8
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@ -121,13 +121,18 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
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vc4_emit_state(pctx);
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/* the actual draw call. */
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uint32_t nr_attributes = 1;
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struct vc4_vertex_stateobj *vtx = vc4->vtx;
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struct vc4_vertexbuf_stateobj *vertexbuf = &vc4->vertexbuf;
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cl_u8(&vc4->bcl, VC4_PACKET_GL_SHADER_STATE);
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assert(vtx->num_elements <= 8);
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#ifndef USE_VC4_SIMULATOR
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cl_u32(&vc4->bcl, nr_attributes & 0x7); /* offset into shader_rec */
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/* Note that number of attributes == 0 in the packet means 8
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* attributes. This field also contains the offset into shader_rec.
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*/
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cl_u32(&vc4->bcl, vtx->num_elements & 0x7);
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#else
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cl_u32(&vc4->bcl, simpenrose_hw_addr(vc4->shader_rec.next) |
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(nr_attributes & 0x7));
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(vtx->num_elements & 0x7));
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#endif
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/* Note that the primitive type fields match with OpenGL/gallium
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@ -174,7 +179,7 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
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&vc4->constbuf[PIPE_SHADER_VERTEX],
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1, &cs_ubo, &cs_ubo_offset);
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cl_start_shader_reloc(&vc4->shader_rec, 7);
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cl_start_shader_reloc(&vc4->shader_rec, 6 + vtx->num_elements);
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cl_u16(&vc4->shader_rec, VC4_SHADER_FLAG_ENABLE_CLIPPING);
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cl_u8(&vc4->shader_rec, 0); /* fs num uniforms (unused) */
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cl_u8(&vc4->shader_rec, vc4->prog.fs->num_inputs);
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@ -182,35 +187,36 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
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cl_reloc(vc4, &vc4->shader_rec, fs_ubo, fs_ubo_offset);
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cl_u16(&vc4->shader_rec, 0); /* vs num uniforms */
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cl_u8(&vc4->shader_rec, 1); /* vs attribute array bitfield */
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cl_u8(&vc4->shader_rec, 16); /* vs total attribute size */
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cl_u8(&vc4->shader_rec, (1 << vtx->num_elements) - 1); /* vs attribute array bitfield */
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cl_u8(&vc4->shader_rec, 16 * vtx->num_elements); /* vs total attribute size */
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cl_reloc(vc4, &vc4->shader_rec, vc4->prog.vs->bo, 0);
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cl_reloc(vc4, &vc4->shader_rec, vs_ubo, vs_ubo_offset);
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cl_u16(&vc4->shader_rec, 0); /* cs num uniforms */
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cl_u8(&vc4->shader_rec, 1); /* cs attribute array bitfield */
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cl_u8(&vc4->shader_rec, 16); /* vs total attribute size */
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cl_u8(&vc4->shader_rec, (1 << vtx->num_elements) - 1); /* cs attribute array bitfield */
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cl_u8(&vc4->shader_rec, 16 * vtx->num_elements); /* vs total attribute size */
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cl_reloc(vc4, &vc4->shader_rec, vc4->prog.vs->bo,
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vc4->prog.vs->coord_shader_offset);
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cl_reloc(vc4, &vc4->shader_rec, cs_ubo, cs_ubo_offset);
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struct vc4_vertex_stateobj *vtx = vc4->vtx;
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struct vc4_vertexbuf_stateobj *vertexbuf = &vc4->vertexbuf;
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for (int i = 0; i < vtx->num_elements; i++) {
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struct pipe_vertex_element *elem = &vtx->pipe[i];
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struct pipe_vertex_buffer *vb =
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&vertexbuf->vb[elem->vertex_buffer_index];
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struct vc4_resource *rsc = vc4_resource(vb->buffer);
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if (elem->src_format != PIPE_FORMAT_R32G32B32A32_FLOAT) {
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fprintf(stderr, "Unsupported attribute format %s\n",
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util_format_name(elem->src_format));
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}
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cl_reloc(vc4, &vc4->shader_rec, rsc->bo,
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vb->buffer_offset + elem->src_offset);
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cl_u8(&vc4->shader_rec,
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util_format_get_blocksize(elem->src_format) - 1);
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cl_u8(&vc4->shader_rec, vb->stride);
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cl_u8(&vc4->shader_rec, 0); /* VS VPM offset */
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cl_u8(&vc4->shader_rec, 0); /* CS VPM offset */
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break; /* XXX: just the 1 for now. */
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cl_u8(&vc4->shader_rec, i * 16); /* VS VPM offset */
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cl_u8(&vc4->shader_rec, i * 16); /* CS VPM offset */
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}
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@ -53,7 +53,6 @@ struct tgsi_to_qir {
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uint32_t *uniform_data;
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enum quniform_contents *uniform_contents;
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uint32_t num_uniforms;
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uint32_t num_inputs;
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uint32_t num_outputs;
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};
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@ -351,25 +350,28 @@ emit_tgsi_declaration(struct tgsi_to_qir *trans,
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switch (decl->Declaration.File) {
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case TGSI_FILE_INPUT:
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if (c->stage == QSTAGE_FRAG) {
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for (int index = decl->Range.First;
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index <= decl->Range.Last;
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index++) {
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for (int i = 0; i < 4; i++) {
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struct qreg vary = {
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QFILE_VARY,
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index * 4 + i
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};
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for (int i = decl->Range.First * 4;
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i < (decl->Range.Last + 1) * 4;
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i++) {
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if (c->stage == QSTAGE_FRAG) {
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struct qreg vary = {
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QFILE_VARY,
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i
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};
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/* XXX: multiply by W */
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trans->inputs[index * 4 + i] =
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qir_VARY_ADD_C(c,
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qir_MOV(c,
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vary));
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trans->num_inputs++;
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}
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trans->inputs[i] =
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qir_VARY_ADD_C(c, qir_MOV(c, vary));
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} else {
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struct qreg dst = qir_get_temp(c);
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/* XXX: attribute type/size/count */
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qir_emit(c, qir_inst(QOP_VPM_READ,
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dst,
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c->undef,
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c->undef));
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trans->inputs[i] = dst;
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}
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c->num_inputs++;
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}
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break;
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}
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@ -466,37 +468,6 @@ parse_tgsi_immediate(struct tgsi_to_qir *trans, struct tgsi_full_immediate *imm)
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}
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}
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static void
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emit_frag_init(struct tgsi_to_qir *trans)
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{
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}
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static void
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emit_vert_init(struct tgsi_to_qir *trans)
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{
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struct qcompile *c = trans->c;
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/* XXX: attribute type/size/count */
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for (int i = 0; i < 4; i++) {
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trans->inputs[i] = qir_get_temp(c);
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qir_emit(c, qir_inst(QOP_VPM_READ, trans->inputs[i],
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c->undef, c->undef));
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}
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}
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static void
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emit_coord_init(struct tgsi_to_qir *trans)
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{
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struct qcompile *c = trans->c;
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/* XXX: attribute type/size/count */
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for (int i = 0; i < 4; i++) {
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trans->inputs[i] = qir_get_temp(c);
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qir_emit(c, qir_inst(QOP_VPM_READ, trans->inputs[i],
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c->undef, c->undef));
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}
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}
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static void
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emit_frag_end(struct tgsi_to_qir *trans)
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{
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@ -619,15 +590,12 @@ vc4_shader_tgsi_to_qir(struct vc4_compiled_shader *shader, enum qstage stage,
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switch (stage) {
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case QSTAGE_FRAG:
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trans->fs_key = (struct vc4_fs_key *)key;
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emit_frag_init(trans);
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break;
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case QSTAGE_VERT:
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trans->vs_key = (struct vc4_vs_key *)key;
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emit_vert_init(trans);
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break;
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case QSTAGE_COORD:
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trans->vs_key = (struct vc4_vs_key *)key;
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emit_coord_init(trans);
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break;
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}
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@ -721,7 +689,7 @@ vc4_fs_compile(struct vc4_context *vc4, struct vc4_compiled_shader *shader,
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{
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struct tgsi_to_qir *trans = vc4_shader_tgsi_to_qir(shader, QSTAGE_FRAG,
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&key->base);
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shader->num_inputs = trans->num_inputs;
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shader->num_inputs = trans->c->num_inputs;
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copy_uniform_state_to_shader(shader, 0, trans);
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shader->bo = vc4_bo_alloc_mem(vc4->screen, trans->c->qpu_insts,
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trans->c->qpu_inst_count * sizeof(uint64_t),
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@ -132,6 +132,7 @@ struct qcompile {
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uint64_t *qpu_insts;
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uint32_t qpu_inst_count;
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uint32_t qpu_inst_size;
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uint32_t num_inputs;
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};
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struct qcompile *qir_compile_init(void);
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@ -218,7 +218,9 @@ vc4_generate_code(struct qcompile *c)
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switch (c->stage) {
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case QSTAGE_VERT:
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case QSTAGE_COORD:
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queue(c, qpu_load_imm_ui(qpu_vrsetup(), 0x00401a00));
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queue(c, qpu_load_imm_ui(qpu_vrsetup(),
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(0x00001a00 +
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0x00100000 * c->num_inputs)));
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queue(c, qpu_load_imm_ui(qpu_vwsetup(), 0x00001a00));
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break;
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case QSTAGE_FRAG:
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