r300-gallium: Moar vert shader emit.
This commit is contained in:
parent
ddd0c94f04
commit
7540c847f1
|
@ -329,10 +329,26 @@ void r300_emit_vertex_shader(struct r300_context* r300,
|
|||
struct r300_vertex_shader* vs)
|
||||
{
|
||||
CS_LOCALS(r300);
|
||||
struct r300_screen* r300screen = r300_screen(r300->context.screen);
|
||||
int i;
|
||||
|
||||
BEGIN_CS(1 + (vs->instruction_count * 4));
|
||||
if (!r300screen->caps->has_tcl) {
|
||||
debug_printf("r300: Implementation error: emit_vertex_shader called,"
|
||||
" but has_tcl is FALSE!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
BEGIN_CS(13 + (vs->instruction_count * 4));
|
||||
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
|
||||
|
||||
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, R300_PVS_FIRST_INST(0) |
|
||||
R300_PVS_LAST_INST(vs->instruction_count - 1));
|
||||
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, vs->instruction_count - 1);
|
||||
|
||||
/* XXX */
|
||||
OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x0);
|
||||
|
||||
OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
|
||||
OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, vs->instruction_count * 4);
|
||||
for (i = 0; i < vs->instruction_count; i++) {
|
||||
OUT_CS(vs->instructions[i].inst0);
|
||||
|
@ -340,6 +356,11 @@ void r300_emit_vertex_shader(struct r300_context* r300,
|
|||
OUT_CS(vs->instructions[i].inst2);
|
||||
OUT_CS(vs->instructions[i].inst3);
|
||||
}
|
||||
|
||||
OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
|
||||
R300_PVS_NUM_CNTLRS(5) |
|
||||
R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) |
|
||||
R300_PVS_VF_MAX_VTX_NUM(12));
|
||||
END_CS;
|
||||
|
||||
}
|
||||
|
|
|
@ -73,6 +73,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|||
# define R300_PVS_NUM_CNTLRS_SHIFT 4
|
||||
# define R300_PVS_NUM_FPUS_SHIFT 8
|
||||
# define R300_VF_MAX_VTX_NUM_SHIFT 18
|
||||
# define R300_PVS_NUM_SLOTS(x) ((x) << 0)
|
||||
# define R300_PVS_NUM_CNTLRS(x) ((x) << 4)
|
||||
# define R300_PVS_NUM_FPUS(x) ((x) << 8)
|
||||
# define R300_PVS_VF_MAX_VTX_NUM(x) ((x) << 18)
|
||||
# define R300_GL_CLIP_SPACE_DEF (0 << 22)
|
||||
# define R300_DX_CLIP_SPACE_DEF (1 << 22)
|
||||
# define R500_TCL_STATE_OPTIMIZATION (1 << 23)
|
||||
|
@ -506,6 +510,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|||
# define R300_PVS_FIRST_INST_SHIFT 0
|
||||
# define R300_PVS_XYZW_VALID_INST_SHIFT 10
|
||||
# define R300_PVS_LAST_INST_SHIFT 20
|
||||
# define R300_PVS_FIRST_INST(x) ((x) << 0)
|
||||
# define R300_PVS_LAST_INST(x) ((x) << 20)
|
||||
/* Addresses are relative the the vertex program parameters area. */
|
||||
#define R300_VAP_PVS_CONST_CNTL 0x22D4
|
||||
# define R300_PVS_CONST_BASE_OFFSET_SHIFT 0
|
||||
|
|
|
@ -86,7 +86,7 @@ void r300_emit_invariant_state(struct r300_context* r300)
|
|||
END_CS;
|
||||
|
||||
/* XXX unsorted stuff from surface_fill */
|
||||
BEGIN_CS(81 + (caps->has_tcl ? 26 : 0));
|
||||
BEGIN_CS(79 + (caps->has_tcl ? 7 : 0));
|
||||
/* Flush PVS. */
|
||||
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
|
||||
|
||||
|
|
|
@ -67,6 +67,7 @@ struct r300_vs_asm {
|
|||
};
|
||||
|
||||
static struct r300_vertex_shader r300_passthrough_vertex_shader = {
|
||||
/* XXX translate these back into normal instructions */
|
||||
.instruction_count = 2,
|
||||
.instructions[0].inst0 = 0xF00203,
|
||||
.instructions[0].inst1 = 0xD10001,
|
||||
|
|
|
@ -42,22 +42,12 @@ static void r300_surface_setup(struct pipe_context* pipe,
|
|||
/* XXX these magic numbers should be explained when
|
||||
* this becomes a cached state object */
|
||||
if (caps->has_tcl) {
|
||||
OUT_CS_REG(R300_VAP_CNTL, 0xA |
|
||||
(0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
|
||||
(0xB << R300_VF_MAX_VTX_NUM_SHIFT) |
|
||||
(caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
|
||||
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
|
||||
OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
|
||||
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
|
||||
/* XXX translate these back into normal instructions */
|
||||
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
|
||||
OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
|
||||
r300_emit_vertex_shader(r300, &r300_passthrough_vertex_shader);
|
||||
} else {
|
||||
OUT_CS_REG(R300_VAP_CNTL, 0xA |
|
||||
(0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
|
||||
(0x5 << R300_VF_MAX_VTX_NUM_SHIFT) |
|
||||
(caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
|
||||
OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(5) |
|
||||
R300_PVS_NUM_CNTLRS(5) |
|
||||
R300_PVS_NUM_FPUS(caps->num_vert_fpus) |
|
||||
R300_PVS_VF_MAX_VTX_NUM(12));
|
||||
}
|
||||
|
||||
BEGIN_CS(15);
|
||||
|
|
Loading…
Reference in New Issue