From 74c67f2b726492dcd6de7bdca1ec0d50bacb59dd Mon Sep 17 00:00:00 2001 From: Pierre-Eric Pelloux-Prayer Date: Wed, 26 May 2021 12:02:48 +0200 Subject: [PATCH] amdgpu/winsys: remove amdgpu_cs_has_chaining MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Store this property in admgpu_cs instead of using a function. Reviewed-by: Marek Olšák Part-of: --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 22 +++++++++------------- src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 + 2 files changed, 10 insertions(+), 13 deletions(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index e8263818968..e2951eccd67 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -414,15 +414,9 @@ static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs) cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_JPEG; } -static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs) +static inline unsigned amdgpu_cs_epilog_dws(struct amdgpu_cs *cs) { - return cs->ws->info.chip_class >= GFX7 && - (cs->ring_type == RING_GFX || cs->ring_type == RING_COMPUTE); -} - -static unsigned amdgpu_cs_epilog_dws(struct amdgpu_cs *cs) -{ - if (amdgpu_cs_has_chaining(cs)) + if (cs->has_chaining) return 4; /* for chaining */ return 0; @@ -721,10 +715,10 @@ static bool amdgpu_ib_new_buffer(struct amdgpu_winsys *ws, * is the largest power of two that fits into the size field of the * INDIRECT_BUFFER packet. */ - if (amdgpu_cs_has_chaining(cs)) - buffer_size = 4 *util_next_power_of_two(ib->max_ib_size); + if (cs->has_chaining) + buffer_size = 4 * util_next_power_of_two(ib->max_ib_size); else - buffer_size = 4 *util_next_power_of_two(4 * ib->max_ib_size); + buffer_size = 4 * util_next_power_of_two(4 * ib->max_ib_size); const unsigned min_size = MAX2(ib->max_check_space_size, 8 * 1024 * 4); const unsigned max_size = 512 * 1024 * 4; @@ -803,7 +797,7 @@ static bool amdgpu_get_new_ib(struct amdgpu_winsys *ws, */ ib_size = MAX2(ib_size, ib->max_check_space_size); - if (!amdgpu_cs_has_chaining(cs)) { + if (!cs->has_chaining) { ib_size = MAX2(ib_size, 4 * MIN2(util_next_power_of_two(ib->max_ib_size), amdgpu_ib_max_submit_dwords(ib->ib_type))); @@ -997,6 +991,8 @@ amdgpu_cs_create(struct radeon_cmdbuf *rcs, cs->ring_type = ring_type; cs->stop_exec_on_failure = stop_exec_on_failure; cs->noop = ctx->ws->noop_cs; + cs->has_chaining = ctx->ws->info.chip_class >= GFX7 && + (ring_type == RING_GFX || ring_type == RING_COMPUTE); struct amdgpu_cs_fence_info fence_info; fence_info.handle = cs->ctx->user_fence_bo; @@ -1154,7 +1150,7 @@ static bool amdgpu_cs_check_space(struct radeon_cmdbuf *rcs, unsigned dw, return true; } - if (!amdgpu_cs_has_chaining(cs)) { + if (!cs->has_chaining) { assert(!force_chaining); return false; } diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h index cfd80a5c564..28dbad83b3f 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h @@ -151,6 +151,7 @@ struct amdgpu_cs { void *flush_data; bool stop_exec_on_failure; bool noop; + bool has_chaining; struct util_queue_fence flush_completed; struct pipe_fence_handle *next_fence;