mesa: update or remove out of date references to ir_to_mesa
Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
This commit is contained in:
parent
bf1f809d7f
commit
74a1f103b6
|
@ -128,5 +128,5 @@ Basic formatting guidelines
|
|||
prefer the use of ``bool``, ``true``, and ``false`` over
|
||||
``GLboolean``, ``GL_TRUE``, and ``GL_FALSE``. In C code, this may
|
||||
mean that ``#include <stdbool.h>`` needs to be added. The
|
||||
``try_emit_*`` methods in ``src/mesa/program/ir_to_mesa.cpp`` and
|
||||
``src/mesa/state_tracker/st_glsl_to_tgsi.cpp`` can serve as examples.
|
||||
``try_emit_*`` method ``src/mesa/state_tracker/st_glsl_to_tgsi.cpp``
|
||||
can serve as an example.
|
||||
|
|
|
@ -155,9 +155,8 @@ for the 965 fragment shader backend when that is developed.
|
|||
|
||||
Q: How should I expand instructions that take multiple backend instructions?
|
||||
|
||||
Sometimes you'll have to do the expansion in your code generation --
|
||||
see, for example, ir_to_mesa.cpp's handling of ir_unop_sqrt. However,
|
||||
in many cases you'll want to do a pass over the IR to convert
|
||||
Sometimes you'll have to do the expansion in your code generation.
|
||||
However, in many cases you'll want to do a pass over the IR to convert
|
||||
non-native instructions to a series of native instructions. For
|
||||
example, for the Mesa backend we have ir_div_to_mul_rcp.cpp because
|
||||
Mesa IR (and many hardware backends) only have a reciprocal
|
||||
|
|
|
@ -941,9 +941,6 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
|
|||
neg(op_expr[0]->operands[0]));
|
||||
}
|
||||
|
||||
/* While ir_to_mesa.cpp will lower sqrt(x) to rcp(rsq(x)), it does so at
|
||||
* its IR level, so we can always apply this transformation.
|
||||
*/
|
||||
if (op_expr[0] && op_expr[0]->operation == ir_unop_rsq)
|
||||
return sqrt(op_expr[0]->operands[0]);
|
||||
|
||||
|
|
|
@ -218,9 +218,6 @@ st_nir_assign_uniform_locations(struct gl_context *ctx,
|
|||
}
|
||||
} else if (uniform->state_slots) {
|
||||
const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
|
||||
/* This state reference has already been setup by ir_to_mesa, but we'll
|
||||
* get the same index back here.
|
||||
*/
|
||||
|
||||
unsigned comps;
|
||||
if (glsl_type_is_struct_or_ifc(type)) {
|
||||
|
|
|
@ -5078,7 +5078,7 @@ get_src_arg_mask(st_dst_reg dst, st_src_reg src)
|
|||
* instruction is the first instruction to write to register T0. There are
|
||||
* several lowering passes done in GLSL IR (e.g. branches and
|
||||
* relative addressing) that create a large number of conditional assignments
|
||||
* that ir_to_mesa converts to CMP instructions like the one mentioned above.
|
||||
* that glsl_to_tgsi converts to CMP instructions like the one mentioned above.
|
||||
*
|
||||
* Here is why this conversion is safe:
|
||||
* CMP T0, T1 T2 T0 can be expanded to:
|
||||
|
|
Loading…
Reference in New Issue