intel/compiler: call ordered_unit() only once at update_inst_scoreboard()

Call it once instead of calling the very same function for each source
and destination. This should make those ternary operators a little
easier to read, IMHO.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15835>
This commit is contained in:
Paulo Zanoni 2022-04-08 15:48:05 -07:00 committed by Marge Bot
parent 2256314b08
commit 72a7d7d7a8
1 changed files with 3 additions and 4 deletions

View File

@ -998,6 +998,7 @@ namespace {
const tgl_pipe p = inferred_exec_pipe(devinfo, inst);
const ordered_address jp = p ? ordered_address(p, jps[ip].jp[IDX(p)]) :
ordered_address();
const bool is_ordered = ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL));
/* Track any source registers that may be fetched asynchronously by this
* instruction, otherwise clear the dependency in order to avoid
@ -1007,8 +1008,7 @@ namespace {
const dependency rd_dep =
(inst->is_payload(i) ||
inst->is_math()) ? dependency(TGL_SBID_SRC, ip, exec_all) :
ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL)) ?
dependency(TGL_REGDIST_SRC, jp, exec_all) :
is_ordered ? dependency(TGL_REGDIST_SRC, jp, exec_all) :
dependency::done;
for (unsigned j = 0; j < regs_read(inst, i); j++) {
@ -1030,8 +1030,7 @@ namespace {
/* Track any destination registers of this instruction. */
const dependency wr_dep =
is_unordered(inst) ? dependency(TGL_SBID_DST, ip, exec_all) :
ordered_unit(devinfo, inst, IDX(TGL_PIPE_ALL)) ?
dependency(TGL_REGDIST_DST, jp, exec_all) :
is_ordered ? dependency(TGL_REGDIST_DST, jp, exec_all) :
dependency();
if (inst->writes_accumulator_implicitly(devinfo))