From 71eca0780a0cd0794545c1fbfdd96fa4f07c2476 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 9 Jan 2017 16:32:12 +0100 Subject: [PATCH] radeonsi/gfx9: add a scissor bug workaround MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_state_draw.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 1ff1547efe7..8c6e9cd1fac 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -1169,6 +1169,12 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) if (!si_upload_vertex_buffer_descriptors(sctx)) return; + /* GFX9 scissor bug workaround. There is also a more efficient but + * more involved alternative workaround. */ + if (sctx->b.chip_class == GFX9 && + si_is_atom_dirty(sctx, &sctx->b.scissors.atom)) + sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH; + /* Flush caches before the first state atom, which does L2 prefetches. */ if (sctx->b.flags) si_emit_cache_flush(sctx);