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radv: don't reset vertex state params on pipeline bind if reg layout matches 

this is unnecessary since the locations will match

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8788>
This commit is contained in:
Mike Blumenkrantz 2021-01-28 11:52:42 -05:00 committed by Marge Bot
parent df1c45890d
commit 71e39c79fd
1 changed files with 11 additions and 3 deletions
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14
src/amd/vulkan/radv_cmd_buffer.c
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@ -4428,6 +4428,12 @@ void radv_CmdBindPipeline(
return;
radv_mark_descriptor_sets_dirty(cmd_buffer, pipelineBindPoint);
bool vtx_emit_count_changed = !pipeline ||
!cmd_buffer->state.pipeline ||
cmd_buffer->state.pipeline->graphics.vtx_emit_num !=
pipeline->graphics.vtx_emit_num ||
cmd_buffer->state.pipeline->graphics.vtx_base_sgpr !=
pipeline->graphics.vtx_base_sgpr;
cmd_buffer->state.pipeline = pipeline;
if (!pipeline)
break;
@ -4436,9 +4442,11 @@ void radv_CmdBindPipeline(
cmd_buffer->push_constant_stages |= pipeline->active_stages;
/* the new vertex shader might not have the same user regs */
cmd_buffer->state.last_first_instance = -1;
cmd_buffer->state.last_vertex_offset = -1;
cmd_buffer->state.last_drawid = -1;
if (vtx_emit_count_changed) {
cmd_buffer->state.last_first_instance = -1;
cmd_buffer->state.last_vertex_offset = -1;
cmd_buffer->state.last_drawid = -1;
}
/* Prefetch all pipeline shaders at first draw time. */
cmd_buffer->state.prefetch_L2_mask |= RADV_PREFETCH_SHADERS;