i965: Retype pre-Gen6 varying pull load destination to UW.
This sets up the proper execution mask for sends in SIMD16 mode.
Fixes Piglit's glsl-fs-normalmatrix, glsl-fs-uniform-array-2,
glsl-fs-uniform-array-6, and glsl-fs-uniform-array-7 on Ironlake,
which regressed when I enabled SIMD16 pull parameter support in
commit b207e88b25
.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
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@ -912,7 +912,7 @@ fs_generator::generate_varying_pull_constant_load(fs_inst *inst,
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struct brw_instruction *send = brw_next_insn(p, BRW_OPCODE_SEND);
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send->header.compression_control = BRW_COMPRESSION_NONE;
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brw_set_dest(p, send, dst);
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brw_set_dest(p, send, retype(dst, BRW_REGISTER_TYPE_UW));
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brw_set_src0(p, send, header);
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if (brw->gen < 6)
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send->header.destreg__conditionalmod = inst->base_mrf;
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