intel/compiler: Don't disassemble align1 3-src operands on Gen < 10
Since the platforms don't support align1 3-src instructions, the contents of these operands are not going to be meaningful. Just don't print them to avoid hitting some assertions in brw_inst functions. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
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@ -829,6 +829,9 @@ dest_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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unsigned subreg_nr;
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enum brw_reg_type type;
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if (devinfo->gen < 10 && is_align1)
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return 0;
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if (devinfo->gen == 6 && brw_inst_3src_a16_dst_reg_file(devinfo, inst))
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reg_file = BRW_MESSAGE_REGISTER_FILE;
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else if (devinfo->gen >= 12)
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@ -1101,6 +1104,9 @@ src0_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_scalar_region;
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (devinfo->gen < 10 && is_align1)
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return 0;
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if (is_align1) {
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if (devinfo->gen >= 12 && !brw_inst_3src_a1_src0_is_imm(devinfo, inst)) {
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_file = brw_inst_3src_a1_src0_reg_file(devinfo, inst);
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@ -1184,6 +1190,9 @@ src1_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_scalar_region;
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (devinfo->gen < 10 && is_align1)
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return 0;
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if (is_align1) {
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if (devinfo->gen >= 12) {
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_file = brw_inst_3src_a1_src1_reg_file(devinfo, inst);
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@ -1254,6 +1263,9 @@ src2_3src(FILE *file, const struct gen_device_info *devinfo, const brw_inst *ins
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bool is_scalar_region;
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bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1;
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if (devinfo->gen < 10 && is_align1)
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return 0;
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if (is_align1) {
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if (devinfo->gen >= 12 && !brw_inst_3src_a1_src2_is_imm(devinfo, inst)) {
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_file = brw_inst_3src_a1_src2_reg_file(devinfo, inst);
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