pan/bi: Emit TEXC with builder
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
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Alyssa Rosenzweig
Marge Bot
parent
e477de829f
commit
70d6c5675d
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@ -3160,6 +3160,171 @@ enum bifrost_tex_dreg {
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BIFROST_TEX_DREG_COUNT,
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};
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static void
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bi_emit_texc(bi_builder *b, nir_tex_instr *instr)
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{
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/* TODO: support more with other encodings */
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assert(instr->sampler_index < 16);
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/* TODO: support more ops */
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switch (instr->op) {
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case nir_texop_tex:
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case nir_texop_txl:
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case nir_texop_txb:
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case nir_texop_txf:
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case nir_texop_txf_ms:
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break;
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default:
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unreachable("Unsupported texture op");
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}
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struct bifrost_texture_operation desc = {
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.sampler_index_or_mode = instr->sampler_index,
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.index = instr->texture_index,
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.immediate_indices = 1, /* TODO */
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.op = bi_tex_op(instr->op),
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.offset_or_bias_disable = false, /* TODO */
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.shadow_or_clamp_disable = instr->is_shadow,
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.array = instr->is_array,
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.dimension = bifrost_tex_format(instr->sampler_dim),
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.format = bi_texture_format(instr->dest_type | nir_dest_bit_size(instr->dest), BI_CLAMP_NONE), /* TODO */
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.mask = 0xF,
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};
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switch (desc.op) {
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case BIFROST_TEX_OP_TEX:
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desc.lod_or_fetch = BIFROST_LOD_MODE_COMPUTE;
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break;
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case BIFROST_TEX_OP_FETCH:
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/* TODO: gathers */
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desc.lod_or_fetch = BIFROST_TEXTURE_FETCH_TEXEL;
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break;
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default:
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unreachable("texture op unsupported");
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}
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/* 32-bit indices to be allocated as consecutive staging registers */
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bi_index dregs[BIFROST_TEX_DREG_COUNT] = { };
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bi_index cx = bi_null(), cy = bi_null();
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for (unsigned i = 0; i < instr->num_srcs; ++i) {
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bi_index index = bi_src_index(&instr->src[i].src);
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unsigned sz = nir_src_bit_size(instr->src[i].src);
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ASSERTED nir_alu_type base = nir_tex_instr_src_type(instr, i);
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nir_alu_type T = base | sz;
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switch (instr->src[i].src_type) {
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case nir_tex_src_coord:
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if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
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cx = bi_emit_texc_cube_coord(b, index, &cy);
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} else {
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unsigned components = nir_src_num_components(instr->src[i].src);
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/* Copy XY (for 2D+) or XX (for 1D) */
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cx = index;
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cy = bi_word(index, MIN2(1, components - 1));
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assert(components >= 1 && components <= 3);
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if (components < 3) {
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/* nothing to do */
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} else if (desc.array) {
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/* 2D array */
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dregs[BIFROST_TEX_DREG_ARRAY] =
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bi_emit_texc_array_index(b,
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bi_word(index, 2), T);
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} else {
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/* 3D */
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dregs[BIFROST_TEX_DREG_Z_COORD] =
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bi_word(index, 2);
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}
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}
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break;
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case nir_tex_src_lod:
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if (desc.op == BIFROST_TEX_OP_TEX &&
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nir_src_is_const(instr->src[i].src) &&
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nir_src_as_uint(instr->src[i].src) == 0) {
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desc.lod_or_fetch = BIFROST_LOD_MODE_ZERO;
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} else if (desc.op == BIFROST_TEX_OP_TEX) {
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assert(base == nir_type_float);
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assert(sz == 16 || sz == 32);
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dregs[BIFROST_TEX_DREG_LOD] =
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bi_emit_texc_lod_88(b, index, sz == 16);
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desc.lod_or_fetch = BIFROST_LOD_MODE_EXPLICIT;
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} else {
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assert(desc.op == BIFROST_TEX_OP_FETCH);
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assert(base == nir_type_uint || base == nir_type_int);
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assert(sz == 16 || sz == 32);
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dregs[BIFROST_TEX_DREG_LOD] =
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bi_emit_texc_lod_cube(b, index);
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}
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break;
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case nir_tex_src_bias:
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/* Upper 16-bits interpreted as a clamp, leave zero */
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assert(desc.op == BIFROST_TEX_OP_TEX);
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assert(base == nir_type_float);
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assert(sz == 16 || sz == 32);
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dregs[BIFROST_TEX_DREG_LOD] =
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bi_emit_texc_lod_88(b, index, sz == 16);
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desc.lod_or_fetch = BIFROST_LOD_MODE_BIAS;
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break;
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case nir_tex_src_ms_index:
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case nir_tex_src_offset:
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if (desc.offset_or_bias_disable)
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break;
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dregs[BIFROST_TEX_DREG_OFFSETMS] =
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bi_emit_texc_offset_ms_index(b, instr);
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if (!bi_is_equiv(dregs[BIFROST_TEX_DREG_OFFSETMS], bi_zero()))
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desc.offset_or_bias_disable = true;
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break;
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case nir_tex_src_comparator:
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dregs[BIFROST_TEX_DREG_SHADOW] = index;
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break;
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default:
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unreachable("Unhandled src type in texc emit");
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}
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}
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if (desc.op == BIFROST_TEX_OP_FETCH && bi_is_null(dregs[BIFROST_TEX_DREG_LOD])) {
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dregs[BIFROST_TEX_DREG_LOD] =
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bi_emit_texc_lod_cube(b, bi_zero());
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}
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/* Allocate staging registers contiguously by compacting the array.
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* Index is not SSA (tied operands) */
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bi_index idx = bi_temp_reg(b->shader);
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unsigned sr_count = 0;
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for (unsigned i = 0; i < ARRAY_SIZE(dregs); ++i) {
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if (!bi_is_null(dregs[i]))
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dregs[sr_count++] = dregs[i];
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}
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if (sr_count)
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bi_make_vec_to(b, idx, dregs, NULL, sr_count, 32);
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else
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bi_mov_i32_to(b, idx, bi_zero()); /* XXX: shouldn't be necessary */
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uint32_t desc_u = 0;
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memcpy(&desc_u, &desc, sizeof(desc_u));
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bi_texc_to(b, idx, idx, cx, cy, bi_imm_u32(desc_u), sr_count);
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/* Explicit copy to facilitate tied operands */
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bi_index srcs[4] = { idx, idx, idx, idx };
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unsigned channels[4] = { 0, 1, 2, 3 };
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bi_make_vec_to(b, bi_dest_index(&instr->dest), srcs, channels, 4, 32);
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}
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static void
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emit_texc(bi_context *ctx, nir_tex_instr *instr)
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{
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