tu: Remove tu_shader_compile_options
The only two fields were always true, and I don't think we'd ever have use for them. If we want to disable optimizations then we'd need a different approach, and I don't even know what include_binning_pass was for. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5500>
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@ -1950,6 +1950,39 @@ tu_pipeline_create(struct tu_device *dev,
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return VK_SUCCESS;
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}
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static void
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tu_pipeline_shader_key_init(struct ir3_shader_key *key,
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const VkGraphicsPipelineCreateInfo *pipeline_info)
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{
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bool has_gs = false;
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bool msaa = false;
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if (pipeline_info) {
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for (uint32_t i = 0; i < pipeline_info->stageCount; i++) {
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if (pipeline_info->pStages[i].stage == VK_SHADER_STAGE_GEOMETRY_BIT) {
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has_gs = true;
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break;
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}
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}
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const VkPipelineMultisampleStateCreateInfo *msaa_info = pipeline_info->pMultisampleState;
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const struct VkPipelineSampleLocationsStateCreateInfoEXT *sample_locations =
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vk_find_struct_const(msaa_info->pNext, PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT);
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if (!pipeline_info->pRasterizationState->rasterizerDiscardEnable &&
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(msaa_info->rasterizationSamples > 1 ||
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/* also set msaa key when sample location is not the default
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* since this affects varying interpolation */
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(sample_locations && sample_locations->sampleLocationsEnable))) {
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msaa = true;
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}
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}
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/* TODO: Populate the remaining fields of ir3_shader_key. */
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*key = (struct ir3_shader_key) {
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.has_gs = has_gs,
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.msaa = msaa,
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};
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}
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static VkResult
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tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder)
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{
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@ -1962,8 +1995,8 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder)
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stage_infos[stage] = &builder->create_info->pStages[i];
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}
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struct tu_shader_compile_options options;
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tu_shader_compile_options_init(&options, builder->create_info);
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struct ir3_shader_key key;
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tu_pipeline_shader_key_init(&key, builder->create_info);
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for (gl_shader_stage stage = MESA_SHADER_VERTEX;
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stage < MESA_SHADER_STAGES; stage++) {
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@ -1988,7 +2021,7 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder)
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bool created;
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builder->variants[stage] =
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ir3_shader_get_variant(builder->shaders[stage]->ir3_shader,
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&options.key, false, &created);
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&key, false, &created);
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if (!builder->variants[stage])
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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@ -1997,26 +2030,24 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder)
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sizeof(uint32_t) * builder->variants[stage]->info.sizedwords;
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}
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if (options.include_binning_pass) {
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const struct tu_shader *vs = builder->shaders[MESA_SHADER_VERTEX];
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struct ir3_shader_variant *variant;
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const struct tu_shader *vs = builder->shaders[MESA_SHADER_VERTEX];
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struct ir3_shader_variant *variant;
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if (vs->ir3_shader->stream_output.num_outputs) {
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variant = builder->variants[MESA_SHADER_VERTEX];
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} else {
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bool created;
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variant = ir3_shader_get_variant(vs->ir3_shader, &options.key,
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true, &created);
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if (!variant)
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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}
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builder->binning_vs_offset = builder->shader_total_size;
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builder->shader_total_size +=
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sizeof(uint32_t) * variant->info.sizedwords;
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builder->binning_variant = variant;
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if (vs->ir3_shader->stream_output.num_outputs) {
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variant = builder->variants[MESA_SHADER_VERTEX];
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} else {
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bool created;
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variant = ir3_shader_get_variant(vs->ir3_shader, &key,
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true, &created);
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if (!variant)
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return VK_ERROR_OUT_OF_HOST_MEMORY;
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}
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builder->binning_vs_offset = builder->shader_total_size;
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builder->shader_total_size +=
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sizeof(uint32_t) * variant->info.sizedwords;
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builder->binning_variant = variant;
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return VK_SUCCESS;
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}
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@ -2554,8 +2585,8 @@ tu_compute_pipeline_create(VkDevice device,
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pipeline->layout = layout;
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struct tu_shader_compile_options options;
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tu_shader_compile_options_init(&options, NULL);
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struct ir3_shader_key key;
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tu_pipeline_shader_key_init(&key, NULL);
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struct tu_shader *shader =
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tu_shader_create(dev, MESA_SHADER_COMPUTE, stage_info, layout, pAllocator);
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@ -2566,7 +2597,7 @@ tu_compute_pipeline_create(VkDevice device,
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bool created;
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struct ir3_shader_variant *v =
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ir3_shader_get_variant(shader->ir3_shader, &options.key, false, &created);
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ir3_shader_get_variant(shader->ir3_shader, &key, false, &created);
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if (!v)
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goto fail;
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@ -1098,14 +1098,6 @@ struct tu_shader_module
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const uint32_t *code[0];
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};
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struct tu_shader_compile_options
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{
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struct ir3_shader_key key;
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bool optimize;
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bool include_binning_pass;
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};
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struct tu_push_constant_range
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{
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uint32_t lo;
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@ -1133,11 +1125,6 @@ tu_shader_destroy(struct tu_device *dev,
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struct tu_shader *shader,
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const VkAllocationCallbacks *alloc);
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void
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tu_shader_compile_options_init(
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struct tu_shader_compile_options *options,
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const VkGraphicsPipelineCreateInfo *pipeline_info);
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struct tu_program_descriptor_linkage
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{
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struct ir3_ubo_analysis_state ubo_state;
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@ -657,47 +657,6 @@ tu_shader_destroy(struct tu_device *dev,
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vk_free2(&dev->alloc, alloc, shader);
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}
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void
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tu_shader_compile_options_init(
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struct tu_shader_compile_options *options,
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const VkGraphicsPipelineCreateInfo *pipeline_info)
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{
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bool has_gs = false;
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bool msaa = false;
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if (pipeline_info) {
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for (uint32_t i = 0; i < pipeline_info->stageCount; i++) {
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if (pipeline_info->pStages[i].stage == VK_SHADER_STAGE_GEOMETRY_BIT) {
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has_gs = true;
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break;
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}
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}
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const VkPipelineMultisampleStateCreateInfo *msaa_info = pipeline_info->pMultisampleState;
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const struct VkPipelineSampleLocationsStateCreateInfoEXT *sample_locations =
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vk_find_struct_const(msaa_info->pNext, PIPELINE_SAMPLE_LOCATIONS_STATE_CREATE_INFO_EXT);
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if (!pipeline_info->pRasterizationState->rasterizerDiscardEnable &&
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(msaa_info->rasterizationSamples > 1 ||
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/* also set msaa key when sample location is not the default
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* since this affects varying interpolation */
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(sample_locations && sample_locations->sampleLocationsEnable))) {
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msaa = true;
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}
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}
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*options = (struct tu_shader_compile_options) {
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/* TODO: Populate the remaining fields of ir3_shader_key. */
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.key = {
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.has_gs = has_gs,
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.msaa = msaa,
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},
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/* TODO: VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT
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* some optimizations need to happen otherwise shader might not compile
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*/
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.optimize = true,
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.include_binning_pass = true,
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};
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}
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VkResult
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tu_CreateShaderModule(VkDevice _device,
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const VkShaderModuleCreateInfo *pCreateInfo,
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