diff --git a/src/amd/vulkan/radv_meta_decompress.c b/src/amd/vulkan/radv_meta_decompress.c
index 8fc264defe5..7b26470cd24 100644
--- a/src/amd/vulkan/radv_meta_decompress.c
+++ b/src/amd/vulkan/radv_meta_decompress.c
@@ -241,11 +241,11 @@ create_pipeline(struct radv_device *device,
 
 	struct radv_graphics_pipeline_create_info extra = {
 		.use_rectlist = true,
-		.db_flush_depth_inplace = decompress == DECOMPRESS_DEPTH_STENCIL ||
+		.depth_compress_disable = decompress == DECOMPRESS_DEPTH_STENCIL ||
 					  decompress == DECOMPRESS_DEPTH,
-		.db_flush_stencil_inplace = decompress == DECOMPRESS_DEPTH_STENCIL ||
+		.stencil_compress_disable = decompress == DECOMPRESS_DEPTH_STENCIL ||
 					    decompress == DECOMPRESS_STENCIL,
-		.db_resummarize = op == DEPTH_RESUMMARIZE,
+		.resummarize_enable = op == DEPTH_RESUMMARIZE,
 	};
 
 	result = radv_graphics_pipeline_create(device_h,
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index d1c7abef106..f0b93878f3b 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3638,9 +3638,9 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs,
 		db_render_control |= S_028000_DEPTH_CLEAR_ENABLE(extra->db_depth_clear);
 		db_render_control |= S_028000_STENCIL_CLEAR_ENABLE(extra->db_stencil_clear);
 
-		db_render_control |= S_028000_RESUMMARIZE_ENABLE(extra->db_resummarize);
-		db_render_control |= S_028000_DEPTH_COMPRESS_DISABLE(extra->db_flush_depth_inplace);
-		db_render_control |= S_028000_STENCIL_COMPRESS_DISABLE(extra->db_flush_stencil_inplace);
+		db_render_control |= S_028000_RESUMMARIZE_ENABLE(extra->resummarize_enable);
+		db_render_control |= S_028000_DEPTH_COMPRESS_DISABLE(extra->depth_compress_disable);
+		db_render_control |= S_028000_STENCIL_COMPRESS_DISABLE(extra->stencil_compress_disable);
 		db_render_override2 |= S_028010_DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION(extra->db_depth_disable_expclear);
 		db_render_override2 |= S_028010_DISABLE_SMEM_EXPCLEAR_OPTIMIZATION(extra->db_stencil_disable_expclear);
 	}
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 133f32a4e4e..159266856eb 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1712,9 +1712,9 @@ struct radv_graphics_pipeline_create_info {
 	bool db_stencil_clear;
 	bool db_depth_disable_expclear;
 	bool db_stencil_disable_expclear;
-	bool db_flush_depth_inplace;
-	bool db_flush_stencil_inplace;
-	bool db_resummarize;
+	bool depth_compress_disable;
+	bool stencil_compress_disable;
+	bool resummarize_enable;
 	uint32_t custom_blend_mode;
 };