asahi: Identify partial render pipeline

Needed if a partial render is incurred from overflowing the parameter
buffer (too much geometry).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>

src/asahi/lib/cmdbuf.xml

@@ -631,12 +631,12 @@
     <field name="Unk 4" start="7:0" size="32" type="hex" default="0xffffffff"/>
     <field name="Unk 5" start="8:0" size="32" type="hex" default="0xffffffff"/>
     <field name="Visibility result buffer" start="10:0" size="64" type="address"/>
-    <field name="Depth clear pipeline bind" start="20:0" size="32" type="hex"/>
+    <field name="Partial reload pipeline bind" start="20:0" size="32" type="hex"/>
-    <field name="Depth clear pipeline unk" start="22:0" size="4" default="4" type="hex"/>
+    <field name="Partial reload pipeline unk" start="22:0" size="4" default="4" type="hex"/>
-    <field name="Depth clear pipeline" start="22:4" size="28" type="address" modifier="shr(4)"/>
+    <field name="Partial reload pipeline" start="22:4" size="28" type="address" modifier="shr(4)"/>
-    <field name="Depth store pipeline bind" start="28:0" size="32" type="hex"/>
+    <field name="Partial store pipeline bind" start="28:0" size="32" type="hex"/>
-    <field name="Depth store pipeline unk" start="30:0" size="4" default="4" type="hex"/>
+    <field name="Partial store pipeline unk" start="30:0" size="4" default="4" type="hex"/>
-    <field name="Depth store pipeline" start="30:4" size="28" type="address" modifier="shr(4)"/>
+    <field name="Partial store pipeline" start="30:4" size="28" type="address" modifier="shr(4)"/>
   </struct>
 
   <struct name="IOGPU Misc" size="288">

src/asahi/lib/decode.c

@@ -493,15 +493,15 @@ agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose)
             agxdecode_pipeline, verbose);
    }
 
-   assert((clearzs.depth_clear_pipeline_unk & 0xF) == 0x4);
+   assert((clearzs.partial_reload_pipeline_unk & 0xF) == 0x4);
-   if (clearzs.depth_clear_pipeline) {
+   if (clearzs.partial_reload_pipeline) {
-      agxdecode_stateful(clearzs.depth_clear_pipeline,
+      agxdecode_stateful(clearzs.partial_reload_pipeline,
-            "Depth clear pipeline", agxdecode_pipeline, verbose);
+            "Partial reload pipeline", agxdecode_pipeline, verbose);
    }
 
-   if (clearzs.depth_store_pipeline) {
+   if (clearzs.partial_store_pipeline) {
-      agxdecode_stateful(clearzs.depth_store_pipeline,
+      agxdecode_stateful(clearzs.partial_store_pipeline,
-            "Depth store pipeline", agxdecode_pipeline, verbose);
+            "Partial store pipeline", agxdecode_pipeline, verbose);
    }
 
    agxdecode_map_read_write();

src/gallium/drivers/asahi/agx_pipe.c

@@ -434,32 +434,34 @@ agx_flush(struct pipe_context *pctx,
    memcpy(ctx->batch->encoder_current, stop, sizeof(stop));
 
    /* Emit the commandbuffer */
-   uint64_t pipeline_clear = 0;
+   uint64_t pipeline_clear = 0, pipeline_reload = 0;
    bool clear_pipeline_textures = false;
 
    struct agx_device *dev = agx_device(pctx->screen);
 
-   if ((ctx->batch->clear & PIPE_CLEAR_COLOR0) || !ctx->batch->cbufs[0]) {
+   uint16_t clear_colour[4] = {
-      uint16_t clear_colour[4] = {
+      _mesa_float_to_half(ctx->batch->clear_color[0]),
-         _mesa_float_to_half(ctx->batch->clear_color[0]),
+      _mesa_float_to_half(ctx->batch->clear_color[1]),
-         _mesa_float_to_half(ctx->batch->clear_color[1]),
+      _mesa_float_to_half(ctx->batch->clear_color[2]),
-         _mesa_float_to_half(ctx->batch->clear_color[2]),
+      _mesa_float_to_half(ctx->batch->clear_color[3])
-         _mesa_float_to_half(ctx->batch->clear_color[3])
+   };
-      };
 
+   pipeline_clear = agx_build_clear_pipeline(ctx,
+         dev->internal.clear,
+         agx_pool_upload(&ctx->batch->pool, clear_colour, sizeof(clear_colour)));
 
-      pipeline_clear = agx_build_clear_pipeline(ctx,
+   if (ctx->batch->cbufs[0]) {
-                               dev->internal.clear,
-                               agx_pool_upload(&ctx->batch->pool, clear_colour, sizeof(clear_colour)));
-   } else {
       enum pipe_format fmt = ctx->batch->cbufs[0]->format;
       enum agx_format internal = agx_pixel_format[fmt].internal;
       uint32_t shader = dev->reload.format[internal];
 
-      pipeline_clear = agx_build_reload_pipeline(ctx, shader,
+      pipeline_reload = agx_build_reload_pipeline(ctx, shader,
                                ctx->batch->cbufs[0]);
+   }
 
+   if (ctx->batch->cbufs[0] && !(ctx->batch->clear & PIPE_CLEAR_COLOR0)) {
       clear_pipeline_textures = true;
+      pipeline_clear = pipeline_reload;
    }
 
    uint64_t pipeline_store = 0;
@@ -472,10 +474,6 @@ agx_flush(struct pipe_context *pctx,
    }
 
    /* Pipelines must 64 aligned */
-   struct agx_ptr pipeline_null =
-      agx_pool_alloc_aligned(&ctx->batch->pipeline_pool, 64, 64);
-   memset(pipeline_null.cpu, 0, 64);
-
    for (unsigned i = 0; i < ctx->batch->nr_cbufs; ++i) {
       struct agx_resource *rt = agx_resource(ctx->batch->cbufs[i]->texture);
       BITSET_SET(rt->data_valid, 0);
@@ -554,8 +552,8 @@ agx_flush(struct pipe_context *pctx,
                encoder_id,
                ctx->batch->scissor.bo->ptr.gpu,
                ctx->batch->depth_bias.bo->ptr.gpu,
-               pipeline_null.gpu,
                pipeline_clear,
+               pipeline_reload,
                pipeline_store,
                clear_pipeline_textures,
                ctx->batch->clear_depth,

src/gallium/drivers/asahi/magic.c

@@ -163,8 +163,8 @@ demo_cmdbuf(uint64_t *buf, size_t size,
             uint64_t encoder_id,
             uint64_t scissor_ptr,
             uint64_t depth_bias_ptr,
-            uint32_t pipeline_null,
             uint32_t pipeline_clear,
+            uint32_t pipeline_load,
             uint32_t pipeline_store,
             bool clear_pipeline_textures,
             double clear_depth,
@@ -185,6 +185,8 @@ demo_cmdbuf(uint64_t *buf, size_t size,
    agx_pack(map + 160, IOGPU_INTERNAL_PIPELINES, cfg) {
       cfg.clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
       cfg.clear_pipeline = pipeline_clear;
+
+      /* store pipeline used when entire frame completes */
       cfg.store_pipeline_bind = 0x12;
       cfg.store_pipeline = pipeline_store;
       cfg.scissor_array = scissor_ptr;
@@ -230,11 +232,11 @@ demo_cmdbuf(uint64_t *buf, size_t size,
       cfg.depth_clear_value = fui(clear_depth);
       cfg.stencil_clear_value = clear_stencil;
 
-      cfg.depth_clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
+      cfg.partial_reload_pipeline_bind = 0xffff8212;
-      cfg.depth_clear_pipeline = pipeline_null;
+      cfg.partial_reload_pipeline = pipeline_load;
 
-      cfg.depth_store_pipeline_bind = 0x12;
+      cfg.partial_store_pipeline_bind = 0x12;
-      cfg.depth_store_pipeline = pipeline_store;
+      cfg.partial_store_pipeline = pipeline_store;
    }
 
    agx_pack(map + 356, IOGPU_MISC, cfg) {

src/gallium/drivers/asahi/magic.h

@@ -32,8 +32,8 @@ demo_cmdbuf(uint64_t *buf, size_t size,
             uint64_t encoder_id,
             uint64_t scissor_ptr,
             uint64_t depth_bias_ptr,
-            uint32_t pipeline_null,
             uint32_t pipeline_clear,
+            uint32_t pipeline_load,
             uint32_t pipeline_store,
             bool clear_pipeline_textures,
             double clear_depth,