zink: unify pipeline layout creation and move to descriptor_program_init
the descriptor layouts are the last component needed to create the pipeline layout, so it makes sense to streamline setup by having the pipeline layout created from a single place for both types of pipelines Reviewed-by: Dave Airlie <airlied@redhat.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>
This commit is contained in:
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a98e11ce21
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6dcad430dd
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@ -698,23 +698,23 @@ zink_descriptor_pool_reference(struct zink_screen *screen,
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}
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}
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bool
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bool
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zink_descriptor_program_init(struct zink_context *ctx,
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zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg)
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struct zink_shader *stages[ZINK_SHADER_COUNT],
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struct zink_program *pg)
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{
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{
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VkDescriptorSetLayoutBinding bindings[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES * 32];
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VkDescriptorSetLayoutBinding bindings[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES * 32];
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int num_bindings[ZINK_DESCRIPTOR_TYPES] = {};
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unsigned num_bindings[ZINK_DESCRIPTOR_TYPES] = {};
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if (!pg->dd)
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pg->dd = rzalloc(pg, struct zink_program_descriptor_data);
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if (!pg->dd)
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return false;
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VkDescriptorPoolSize sizes[6] = {};
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VkDescriptorPoolSize sizes[6] = {};
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int type_map[12];
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int type_map[12];
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unsigned num_types = 0;
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unsigned num_types = 0;
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memset(type_map, -1, sizeof(type_map));
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memset(type_map, -1, sizeof(type_map));
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for (int i = 0; i < ZINK_SHADER_COUNT; i++) {
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struct zink_shader **stages;
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if (pg->is_compute)
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stages = &((struct zink_compute_program*)pg)->shader;
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else
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stages = ((struct zink_gfx_program*)pg)->shaders;
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for (int i = 0; i < (pg->is_compute ? 1 : ZINK_SHADER_COUNT); i++) {
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struct zink_shader *shader = stages[i];
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struct zink_shader *shader = stages[i];
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if (!shader)
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if (!shader)
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continue;
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continue;
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@ -742,17 +742,22 @@ zink_descriptor_program_init(struct zink_context *ctx,
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for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) {
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for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) {
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total_descs += num_bindings[i];
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total_descs += num_bindings[i];
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}
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}
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pg->has_descriptors = !!total_descs;
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if (!total_descs) {
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if (!total_descs)
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pg->layout = zink_pipeline_layout_create(zink_screen(ctx->base.screen), pg);
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return true;
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return !!pg->layout;
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}
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if (!pg->dd)
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pg->dd = rzalloc(pg, struct zink_program_descriptor_data);
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if (!pg->dd)
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return false;
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for (int i = 0; i < num_types; i++)
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for (int i = 0; i < num_types; i++)
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sizes[i].descriptorCount *= ZINK_DEFAULT_MAX_DESCS;
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sizes[i].descriptorCount *= ZINK_DEFAULT_MAX_DESCS;
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bool found_descriptors = false;
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bool found_descriptors = false;
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struct zink_descriptor_layout_key *layout_key[ZINK_DESCRIPTOR_TYPES] = {};
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for (unsigned i = ZINK_DESCRIPTOR_TYPES - 1; i < ZINK_DESCRIPTOR_TYPES; i--) {
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for (unsigned i = ZINK_DESCRIPTOR_TYPES - 1; i < ZINK_DESCRIPTOR_TYPES; i--) {
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struct zink_descriptor_pool *pool;
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struct zink_descriptor_layout_key *layout_key = NULL;
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if (!num_bindings[i]) {
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if (!num_bindings[i]) {
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if (!found_descriptors)
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if (!found_descriptors)
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continue;
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continue;
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@ -764,14 +769,15 @@ zink_descriptor_program_init(struct zink_context *ctx,
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null_binding.stageFlags = VK_SHADER_STAGE_VERTEX_BIT | VK_SHADER_STAGE_FRAGMENT_BIT |
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null_binding.stageFlags = VK_SHADER_STAGE_VERTEX_BIT | VK_SHADER_STAGE_FRAGMENT_BIT |
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VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT |
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VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT |
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VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT | VK_SHADER_STAGE_COMPUTE_BIT;
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VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT | VK_SHADER_STAGE_COMPUTE_BIT;
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VkDescriptorPoolSize null_size = {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER, ZINK_DEFAULT_MAX_DESCS};
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pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 0, &layout_key[i]);
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pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 0, &layout_key);
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pool = descriptor_pool_get(ctx, i, layout_key, &null_size, 1);
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if (!pool)
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pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 1, &layout_key);
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if (!pg->dsl[i])
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if (!pg->dsl[i])
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return false;
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return false;
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VkDescriptorPoolSize null_size = {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER, ZINK_DEFAULT_MAX_DESCS};
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struct zink_descriptor_pool *pool = descriptor_pool_get(ctx, i, layout_key[i], &null_size, 1);
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if (!pool)
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return false;
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zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
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zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
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pg->num_dsl++;
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continue;
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continue;
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}
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}
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found_descriptors = true;
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found_descriptors = true;
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@ -816,15 +822,18 @@ zink_descriptor_program_init(struct zink_context *ctx,
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}
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}
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break;
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break;
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}
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}
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pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, bindings[i], num_bindings[i], &layout_key);
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pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, bindings[i], num_bindings[i], &layout_key[i]);
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if (!pg->dsl[i])
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if (!pg->dsl[i])
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return false;
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return false;
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pool = descriptor_pool_get(ctx, i, layout_key, type_sizes, num_type_sizes);
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struct zink_descriptor_pool *pool = descriptor_pool_get(ctx, i, layout_key[i], type_sizes, num_type_sizes);
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if (!pool)
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if (!pool)
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return false;
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return false;
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zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
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zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
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pg->num_dsl++;
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}
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}
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return true;
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pg->layout = zink_pipeline_layout_create(zink_screen(ctx->base.screen), pg);
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return !!pg->layout;
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}
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}
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void
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void
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@ -150,9 +150,8 @@ zink_descriptor_layouts_deinit(struct zink_context *ctx);
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bool
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bool
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zink_descriptor_util_alloc_sets(struct zink_screen *screen, VkDescriptorSetLayout dsl, VkDescriptorPool pool, VkDescriptorSet *sets, unsigned num_sets);
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zink_descriptor_util_alloc_sets(struct zink_screen *screen, VkDescriptorSetLayout dsl, VkDescriptorPool pool, VkDescriptorSet *sets, unsigned num_sets);
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bool
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bool
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zink_descriptor_program_init(struct zink_context *ctx,
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zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg);
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struct zink_shader *stages[ZINK_SHADER_COUNT],
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struct zink_program *pg);
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VkDescriptorSetLayout
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VkDescriptorSetLayout
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zink_descriptor_util_layout_get(struct zink_context *ctx, enum zink_descriptor_type type,
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zink_descriptor_util_layout_get(struct zink_context *ctx, enum zink_descriptor_type type,
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VkDescriptorSetLayoutBinding *bindings, unsigned num_bindings,
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VkDescriptorSetLayoutBinding *bindings, unsigned num_bindings,
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@ -496,26 +496,17 @@ zink_update_gfx_program(struct zink_context *ctx, struct zink_gfx_program *prog)
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update_shader_modules(ctx, ctx->gfx_stages, prog, true);
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update_shader_modules(ctx, ctx->gfx_stages, prog, true);
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}
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}
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static VkPipelineLayout
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VkPipelineLayout
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pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg, bool is_compute)
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zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg)
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{
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{
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VkPipelineLayoutCreateInfo plci = {};
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VkPipelineLayoutCreateInfo plci = {};
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plci.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO;
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plci.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO;
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VkDescriptorSetLayout layouts[ZINK_DESCRIPTOR_TYPES];
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plci.pSetLayouts = pg->dsl;
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unsigned num_layouts = 0;
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plci.setLayoutCount = pg->num_dsl;
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for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) {
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if (pg->dsl[i]) {
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layouts[num_layouts] = pg->dsl[i];
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num_layouts++;
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}
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}
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plci.pSetLayouts = layouts;
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plci.setLayoutCount = num_layouts;
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VkPushConstantRange pcr[2] = {};
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VkPushConstantRange pcr[2] = {};
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if (is_compute) {
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if (pg->is_compute) {
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if (((struct zink_compute_program*)pg)->shader->nir->info.stage == MESA_SHADER_KERNEL) {
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if (((struct zink_compute_program*)pg)->shader->nir->info.stage == MESA_SHADER_KERNEL) {
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pcr[0].stageFlags = VK_SHADER_STAGE_COMPUTE_BIT;
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pcr[0].stageFlags = VK_SHADER_STAGE_COMPUTE_BIT;
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pcr[0].offset = 0;
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pcr[0].offset = 0;
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}
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}
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p_atomic_dec(&prog->base.reference.count);
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p_atomic_dec(&prog->base.reference.count);
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if (!zink_descriptor_program_init(ctx, stages, (struct zink_program*)prog))
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if (!zink_descriptor_program_init(ctx, &prog->base))
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goto fail;
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prog->base.layout = pipeline_layout_create(screen, &prog->base, false);
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if (!prog->base.layout)
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goto fail;
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goto fail;
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return prog;
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return prog;
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@ -671,13 +658,7 @@ zink_create_compute_program(struct zink_context *ctx, struct zink_shader *shader
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_mesa_set_add(shader->programs, comp);
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_mesa_set_add(shader->programs, comp);
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comp->shader = shader;
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comp->shader = shader;
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struct zink_shader *stages[ZINK_SHADER_COUNT] = {};
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if (!zink_descriptor_program_init(ctx, &comp->base))
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stages[0] = shader;
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if (!zink_descriptor_program_init(ctx, stages, (struct zink_program*)comp))
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goto fail;
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comp->base.layout = pipeline_layout_create(screen, &comp->base, true);
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if (!comp->base.layout)
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goto fail;
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goto fail;
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return comp;
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return comp;
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@ -81,6 +81,7 @@ struct zink_program {
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VkPipelineLayout layout;
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VkPipelineLayout layout;
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VkDescriptorSetLayout dsl[ZINK_DESCRIPTOR_TYPES];
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VkDescriptorSetLayout dsl[ZINK_DESCRIPTOR_TYPES];
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unsigned num_dsl;
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};
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};
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struct zink_gfx_program {
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struct zink_gfx_program {
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@ -206,6 +207,9 @@ zink_compute_program_reference(struct zink_screen *screen,
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return ret;
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return ret;
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}
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}
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VkPipelineLayout
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zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg);
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void
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void
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zink_program_update_compute_pipeline_state(struct zink_context *ctx, struct zink_compute_program *comp, const uint block[3]);
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zink_program_update_compute_pipeline_state(struct zink_context *ctx, struct zink_compute_program *comp, const uint block[3]);
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