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zink: unify pipeline layout creation and move to descriptor_program_init 

the descriptor layouts are the last component needed to create the pipeline
layout, so it makes sense to streamline setup by having the pipeline layout
created from a single place for both types of pipelines

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10849>
This commit is contained in:
Mike Blumenkrantz 2021-04-01 15:08:47 -04:00
parent a98e11ce21
commit 6dcad430dd
4 changed files with 44 additions and 51 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

53
src/gallium/drivers/zink/zink_descriptors.c
View File

@ -698,23 +698,23 @@ zink_descriptor_pool_reference(struct zink_screen *screen,
}
bool
zink_descriptor_program_init(struct zink_context *ctx,
struct zink_shader *stages[ZINK_SHADER_COUNT],
struct zink_program *pg)
zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg)
{
VkDescriptorSetLayoutBinding bindings[ZINK_DESCRIPTOR_TYPES][PIPE_SHADER_TYPES * 32];
int num_bindings[ZINK_DESCRIPTOR_TYPES] = {};
unsigned num_bindings[ZINK_DESCRIPTOR_TYPES] = {};
if (!pg->dd)
pg->dd = rzalloc(pg, struct zink_program_descriptor_data);
if (!pg->dd)
return false;
VkDescriptorPoolSize sizes[6] = {};
int type_map[12];
unsigned num_types = 0;
memset(type_map, -1, sizeof(type_map));
for (int i = 0; i < ZINK_SHADER_COUNT; i++) {
struct zink_shader **stages;
if (pg->is_compute)
stages = &((struct zink_compute_program*)pg)->shader;
else
stages = ((struct zink_gfx_program*)pg)->shaders;
for (int i = 0; i < (pg->is_compute ? 1 : ZINK_SHADER_COUNT); i++) {
struct zink_shader *shader = stages[i];
if (!shader)
continue;
@ -742,17 +742,22 @@ zink_descriptor_program_init(struct zink_context *ctx,
for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) {
total_descs += num_bindings[i];
}
pg->has_descriptors = !!total_descs;
if (!total_descs)
return true;
if (!total_descs) {
pg->layout = zink_pipeline_layout_create(zink_screen(ctx->base.screen), pg);
return !!pg->layout;
}
if (!pg->dd)
pg->dd = rzalloc(pg, struct zink_program_descriptor_data);
if (!pg->dd)
return false;
for (int i = 0; i < num_types; i++)
sizes[i].descriptorCount *= ZINK_DEFAULT_MAX_DESCS;
bool found_descriptors = false;
struct zink_descriptor_layout_key *layout_key[ZINK_DESCRIPTOR_TYPES] = {};
for (unsigned i = ZINK_DESCRIPTOR_TYPES - 1; i < ZINK_DESCRIPTOR_TYPES; i--) {
struct zink_descriptor_pool *pool;
struct zink_descriptor_layout_key *layout_key = NULL;
if (!num_bindings[i]) {
if (!found_descriptors)
continue;
@ -764,14 +769,15 @@ zink_descriptor_program_init(struct zink_context *ctx,
null_binding.stageFlags = VK_SHADER_STAGE_VERTEX_BIT | VK_SHADER_STAGE_FRAGMENT_BIT |
VK_SHADER_STAGE_GEOMETRY_BIT | VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT |
VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT | VK_SHADER_STAGE_COMPUTE_BIT;
VkDescriptorPoolSize null_size = {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER, ZINK_DEFAULT_MAX_DESCS};
pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 0, &layout_key);
pool = descriptor_pool_get(ctx, i, layout_key, &null_size, 1);
if (!pool)
pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 1, &layout_key);
pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, &null_binding, 0, &layout_key[i]);
if (!pg->dsl[i])
return false;
VkDescriptorPoolSize null_size = {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER, ZINK_DEFAULT_MAX_DESCS};
struct zink_descriptor_pool *pool = descriptor_pool_get(ctx, i, layout_key[i], &null_size, 1);
if (!pool)
return false;
zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
pg->num_dsl++;
continue;
}
found_descriptors = true;
@ -816,15 +822,18 @@ zink_descriptor_program_init(struct zink_context *ctx,
}
break;
}
pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, bindings[i], num_bindings[i], &layout_key);
pg->dsl[i] = zink_descriptor_util_layout_get(ctx, i, bindings[i], num_bindings[i], &layout_key[i]);
if (!pg->dsl[i])
return false;
pool = descriptor_pool_get(ctx, i, layout_key, type_sizes, num_type_sizes);
struct zink_descriptor_pool *pool = descriptor_pool_get(ctx, i, layout_key[i], type_sizes, num_type_sizes);
if (!pool)
return false;
zink_descriptor_pool_reference(zink_screen(ctx->base.screen), &pg->dd->pool[i], pool);
pg->num_dsl++;
}
return true;
pg->layout = zink_pipeline_layout_create(zink_screen(ctx->base.screen), pg);
return !!pg->layout;
}
void

5
src/gallium/drivers/zink/zink_descriptors.h
View File

@ -150,9 +150,8 @@ zink_descriptor_layouts_deinit(struct zink_context *ctx);
bool
zink_descriptor_util_alloc_sets(struct zink_screen *screen, VkDescriptorSetLayout dsl, VkDescriptorPool pool, VkDescriptorSet *sets, unsigned num_sets);
bool
zink_descriptor_program_init(struct zink_context *ctx,
struct zink_shader *stages[ZINK_SHADER_COUNT],
struct zink_program *pg);
zink_descriptor_program_init(struct zink_context *ctx, struct zink_program *pg);
VkDescriptorSetLayout
zink_descriptor_util_layout_get(struct zink_context *ctx, enum zink_descriptor_type type,
VkDescriptorSetLayoutBinding *bindings, unsigned num_bindings,

33
src/gallium/drivers/zink/zink_program.c
View File

@ -496,26 +496,17 @@ zink_update_gfx_program(struct zink_context *ctx, struct zink_gfx_program *prog)
update_shader_modules(ctx, ctx->gfx_stages, prog, true);
}
static VkPipelineLayout
pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg, bool is_compute)
VkPipelineLayout
zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg)
{
VkPipelineLayoutCreateInfo plci = {};
plci.sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO;
VkDescriptorSetLayout layouts[ZINK_DESCRIPTOR_TYPES];
unsigned num_layouts = 0;
for (unsigned i = 0; i < ZINK_DESCRIPTOR_TYPES; i++) {
if (pg->dsl[i]) {
layouts[num_layouts] = pg->dsl[i];
num_layouts++;
}
}
plci.pSetLayouts = layouts;
plci.setLayoutCount = num_layouts;
plci.pSetLayouts = pg->dsl;
plci.setLayoutCount = pg->num_dsl;
VkPushConstantRange pcr[2] = {};
if (is_compute) {
if (pg->is_compute) {
if (((struct zink_compute_program*)pg)->shader->nir->info.stage == MESA_SHADER_KERNEL) {
pcr[0].stageFlags = VK_SHADER_STAGE_COMPUTE_BIT;
pcr[0].offset = 0;
@ -573,11 +564,7 @@ zink_create_gfx_program(struct zink_context *ctx,
}
p_atomic_dec(&prog->base.reference.count);
if (!zink_descriptor_program_init(ctx, stages, (struct zink_program*)prog))
goto fail;
prog->base.layout = pipeline_layout_create(screen, &prog->base, false);
if (!prog->base.layout)
if (!zink_descriptor_program_init(ctx, &prog->base))
goto fail;
return prog;
@ -671,13 +658,7 @@ zink_create_compute_program(struct zink_context *ctx, struct zink_shader *shader
_mesa_set_add(shader->programs, comp);
comp->shader = shader;
struct zink_shader *stages[ZINK_SHADER_COUNT] = {};
stages[0] = shader;
if (!zink_descriptor_program_init(ctx, stages, (struct zink_program*)comp))
goto fail;
comp->base.layout = pipeline_layout_create(screen, &comp->base, true);
if (!comp->base.layout)
if (!zink_descriptor_program_init(ctx, &comp->base))
goto fail;
return comp;

4
src/gallium/drivers/zink/zink_program.h
View File

@ -81,6 +81,7 @@ struct zink_program {
VkPipelineLayout layout;
VkDescriptorSetLayout dsl[ZINK_DESCRIPTOR_TYPES];
unsigned num_dsl;
};
struct zink_gfx_program {
@ -206,6 +207,9 @@ zink_compute_program_reference(struct zink_screen *screen,
return ret;
}
VkPipelineLayout
zink_pipeline_layout_create(struct zink_screen *screen, struct zink_program *pg);
void
zink_program_update_compute_pipeline_state(struct zink_context *ctx, struct zink_compute_program *comp, const uint block[3]);