svga: Flush when switching between HW to SW TNL, after updating need_swtnl.
Also, only flush when going from HW TNL to SW TNL, given it is impossible for the buffers resulting from SWTNL to be ever referred by HW TNL path.
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c250363022
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@ -372,9 +372,6 @@ struct svga_context
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/** List of buffers with queued transfers */
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struct list_head dirty_buffers;
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/** Was the previous draw done with the SW path? */
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boolean prev_draw_swtnl;
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};
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/* A flag for each state_tracker state object:
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@ -141,18 +141,11 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
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unsigned reduced_prim = u_reduced_prim( info->mode );
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unsigned count = info->count;
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enum pipe_error ret = 0;
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boolean needed_swtnl;
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if (!u_trim_pipe_prim( info->mode, &count ))
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return;
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if (svga->state.sw.need_swtnl != svga->prev_draw_swtnl) {
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/* We're switching between SW and HW drawing. Do a flush to avoid
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* mixing HW and SW rendering with the same vertex buffer.
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*/
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pipe->flush(pipe, NULL);
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svga->prev_draw_swtnl = svga->state.sw.need_swtnl;
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}
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/*
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* Mark currently bound target surfaces as dirty
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* doesn't really matter if it is done before drawing.
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@ -167,6 +160,8 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
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svga->dirty |= SVGA_NEW_REDUCED_PRIMITIVE;
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}
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needed_swtnl = svga->state.sw.need_swtnl;
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svga_update_state_retry( svga, SVGA_STATE_NEED_SWTNL );
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#ifdef DEBUG
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@ -176,6 +171,18 @@ svga_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
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#endif
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if (svga->state.sw.need_swtnl) {
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if (!needed_swtnl) {
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/*
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* We're switching from HW to SW TNL. SW TNL will require mapping all
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* currently bound vertex buffers, some of which may already be
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* referenced in the current command buffer as result of previous HW
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* TNL. So flush now, to prevent the context to flush while a referred
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* vertex buffer is mapped.
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*/
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svga_context_flush(svga, NULL);
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}
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ret = svga_swtnl_draw_vbo( svga, info );
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}
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else {
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