r600: fixup sparse color exports.
If we have gaps in the shader mask we have to have 0x1 in them according to a comment in radeonsi, and this is required to fix the test at least on cayman. We also need to record the highest one written to write to the ps exports reg. This fixes: KHR-GL45.enhanced_layouts.fragment_data_location_api Reviewed-by: Roland Scheidegger <sroland@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -3369,7 +3369,7 @@ void evergreen_update_ps_state(struct pipe_context *ctx, struct r600_pipe_shader
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exports_ps |= 1;
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}
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num_cout = rshader->nr_ps_color_exports;
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num_cout = rshader->ps_export_highest + 1;
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exports_ps |= S_02884C_EXPORT_COLORS(num_cout);
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if (!exports_ps) {
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@ -3876,6 +3876,16 @@ static int r600_shader_from_tgsi(struct r600_context *rctx,
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output[j].type = V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_PIXEL;
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shader->nr_ps_color_exports++;
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shader->ps_color_export_mask |= (0xf << (shader->output[i].sid * 4));
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/* If the i-th target format is set, all previous target formats must
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* be non-zero to avoid hangs. - from radeonsi, seems to apply to eg as well.
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*/
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if (shader->output[i].sid > 0)
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for (unsigned x = 0; x < shader->output[i].sid; x++)
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shader->ps_color_export_mask |= (1 << (x*4));
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if (shader->output[i].sid > shader->ps_export_highest)
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shader->ps_export_highest = shader->output[i].sid;
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if (shader->fs_write_all && (rscreen->b.chip_class >= EVERGREEN)) {
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for (k = 1; k < max_color_exports; k++) {
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j++;
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@ -85,6 +85,7 @@ struct r600_shader {
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/* Real number of ps color exports compiled in the bytecode */
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unsigned nr_ps_color_exports;
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unsigned ps_color_export_mask;
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unsigned ps_export_highest;
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/* bit n is set if the shader writes gl_ClipDistance[n] */
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unsigned cc_dist_mask;
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unsigned clip_dist_write;
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