diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index f5a274d1a53..26e7dccc79d 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -473,8 +473,10 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
          }
       }
 
+      uint32_t *param = brw_stage_prog_data_add_params(prog_data,
+                                                       map->image_count *
+                                                       BRW_IMAGE_PARAM_SIZE);
       struct anv_push_constants *null_data = NULL;
-      uint32_t *param = prog_data->param + (shader->num_uniforms / 4);
       const struct brw_image_param *image_param = null_data->images;
       for (uint32_t i = 0; i < map->image_count; i++) {
          setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET,
@@ -493,6 +495,7 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
          param += BRW_IMAGE_PARAM_SIZE;
          image_param ++;
       }
+      assert(param == prog_data->param + prog_data->nr_params);
 
       shader->num_uniforms += map->image_count * BRW_IMAGE_PARAM_SIZE * 4;
    }
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index bac2a1eeea6..97bc840e617 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -405,12 +405,7 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
       prog_data->nr_params += MAX_PUSH_CONSTANTS_SIZE / sizeof(float);
    }
 
-   if (nir->info.num_images > 0) {
-      prog_data->nr_params += nir->info.num_images * BRW_IMAGE_PARAM_SIZE;
-      pipeline->needs_data_cache = true;
-   }
-
-   if (nir->info.num_ssbos > 0)
+   if (nir->info.num_ssbos > 0 || nir->info.num_images > 0)
       pipeline->needs_data_cache = true;
 
    if (prog_data->nr_params > 0) {