radv: handle primitive id input into fragment shader with no geom shader
Fixes: dEQP-VK.pipeline.framebuffer_attachment.no_attachments dEQP-VK.pipeline.framebuffer_attachment.no_attachments_ms Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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2a87ddbdcb
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6a68170c83
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@ -5124,6 +5124,7 @@ si_llvm_init_export_args(struct nir_to_llvm_context *ctx,
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static void
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handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
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bool export_prim_id,
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struct ac_vs_output_info *outinfo)
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{
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uint32_t param_count = 0;
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@ -5265,6 +5266,23 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx,
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ac_build_export(&ctx->ac, &pos_args[i]);
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}
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if (export_prim_id) {
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LLVMValueRef values[4];
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target = V_008DFC_SQ_EXP_PARAM + param_count;
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outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = param_count;
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param_count++;
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values[0] = ctx->vs_prim_id;
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ctx->shader_info->vs.vgpr_comp_cnt = MAX2(2,
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ctx->shader_info->vs.vgpr_comp_cnt);
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for (unsigned j = 1; j < 4; j++)
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values[j] = ctx->f32zero;
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si_llvm_init_export_args(ctx, values, target, &args);
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ac_build_export(&ctx->ac, &args);
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outinfo->export_prim_id = true;
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}
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outinfo->pos_exports = num_pos_exports;
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outinfo->param_exports = param_count;
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}
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@ -5700,7 +5718,8 @@ handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
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else if (ctx->options->key.vs.as_es)
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handle_es_outputs_post(ctx, &ctx->shader_info->vs.es_info);
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else
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handle_vs_outputs_post(ctx, &ctx->shader_info->vs.outinfo);
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handle_vs_outputs_post(ctx, ctx->options->key.vs.export_prim_id,
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&ctx->shader_info->vs.outinfo);
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break;
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case MESA_SHADER_FRAGMENT:
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handle_fs_outputs_post(ctx);
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@ -5715,7 +5734,8 @@ handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
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if (ctx->options->key.tes.as_es)
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handle_es_outputs_post(ctx, &ctx->shader_info->tes.es_info);
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else
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handle_vs_outputs_post(ctx, &ctx->shader_info->tes.outinfo);
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handle_vs_outputs_post(ctx, ctx->options->key.tes.export_prim_id,
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&ctx->shader_info->tes.outinfo);
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break;
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default:
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break;
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@ -6191,7 +6211,7 @@ ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
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}
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idx += slot_inc;
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}
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handle_vs_outputs_post(ctx, &ctx->shader_info->vs.outinfo);
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handle_vs_outputs_post(ctx, false, &ctx->shader_info->vs.outinfo);
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}
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void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
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@ -41,10 +41,12 @@ struct ac_vs_variant_key {
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uint32_t instance_rate_inputs;
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uint32_t as_es:1;
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uint32_t as_ls:1;
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uint32_t export_prim_id:1;
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};
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struct ac_tes_variant_key {
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uint32_t as_es:1;
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uint32_t export_prim_id:1;
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};
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struct ac_tcs_variant_key {
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@ -128,6 +130,7 @@ struct ac_vs_output_info {
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bool writes_pointsize;
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bool writes_layer;
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bool writes_viewport_index;
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bool export_prim_id;
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uint32_t export_mask;
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unsigned pos_exports;
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};
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@ -669,7 +669,7 @@ radv_emit_vertex_shader(struct radv_cmd_buffer *cmd_buffer,
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else
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radv_emit_hw_vs(cmd_buffer, pipeline, vs, &vs->info.vs.outinfo);
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radeon_set_context_reg(cmd_buffer->cs, R_028A84_VGT_PRIMITIVEID_EN, 0);
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radeon_set_context_reg(cmd_buffer->cs, R_028A84_VGT_PRIMITIVEID_EN, pipeline->graphics.vgt_primitiveid_en);
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}
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@ -605,11 +605,14 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
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}
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static union ac_shader_variant_key
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radv_compute_tes_key(bool as_es)
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radv_compute_tes_key(bool as_es, bool export_prim_id)
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{
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union ac_shader_variant_key key;
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memset(&key, 0, sizeof(key));
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key.tes.as_es = as_es;
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/* export prim id only happens when no geom shader */
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if (!as_es)
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key.tes.export_prim_id = export_prim_id;
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return key;
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}
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@ -640,10 +643,12 @@ radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
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nir_shader *tes_nir, *tcs_nir;
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void *tes_code = NULL, *tcs_code = NULL;
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unsigned tes_code_size = 0, tcs_code_size = 0;
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union ac_shader_variant_key tes_key = radv_compute_tes_key(radv_pipeline_has_gs(pipeline));
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union ac_shader_variant_key tes_key;
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union ac_shader_variant_key tcs_key;
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bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
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tes_key = radv_compute_tes_key(radv_pipeline_has_gs(pipeline),
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pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input);
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if (tes_module->nir)
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_mesa_sha1_compute(tes_module->nir->info.name,
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strlen(tes_module->nir->info.name),
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@ -1606,7 +1611,7 @@ radv_pipeline_init_dynamic_state(struct radv_pipeline *pipeline,
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}
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static union ac_shader_variant_key
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radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo, bool as_es, bool as_ls)
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radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo, bool as_es, bool as_ls, bool export_prim_id)
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{
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union ac_shader_variant_key key;
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const VkPipelineVertexInputStateCreateInfo *input_state =
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@ -1616,6 +1621,7 @@ radv_compute_vs_key(const VkGraphicsPipelineCreateInfo *pCreateInfo, bool as_es,
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key.vs.instance_rate_inputs = 0;
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key.vs.as_es = as_es;
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key.vs.as_ls = as_ls;
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key.vs.export_prim_id = export_prim_id;
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for (unsigned i = 0; i < input_state->vertexAttributeDescriptionCount; ++i) {
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unsigned binding;
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@ -1857,6 +1863,24 @@ static uint32_t si_vgt_gs_mode(struct radv_shader_variant *gs)
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S_028A40_GS_WRITE_OPTIMIZE(1);
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}
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static void calculate_vgt_gs_mode(struct radv_pipeline *pipeline)
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{
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struct radv_shader_variant *vs;
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vs = radv_pipeline_has_gs(pipeline) ? pipeline->gs_copy_shader : (radv_pipeline_has_tess(pipeline) ? pipeline->shaders[MESA_SHADER_TESS_EVAL] : pipeline->shaders[MESA_SHADER_VERTEX]);
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struct ac_vs_output_info *outinfo = &vs->info.vs.outinfo;
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pipeline->graphics.vgt_primitiveid_en = false;
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pipeline->graphics.vgt_gs_mode = 0;
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if (radv_pipeline_has_gs(pipeline)) {
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pipeline->graphics.vgt_gs_mode = si_vgt_gs_mode(pipeline->shaders[MESA_SHADER_GEOMETRY]);
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} else if (outinfo->export_prim_id) {
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pipeline->graphics.vgt_gs_mode = S_028A40_MODE(V_028A40_GS_SCENARIO_A);
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pipeline->graphics.vgt_primitiveid_en = true;
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}
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}
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static void calculate_pa_cl_vs_out_cntl(struct radv_pipeline *pipeline)
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{
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struct radv_shader_variant *vs;
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@ -2018,11 +2042,14 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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if (modules[MESA_SHADER_VERTEX]) {
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bool as_es = false;
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bool as_ls = false;
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bool export_prim_id = false;
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if (modules[MESA_SHADER_TESS_CTRL])
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as_ls = true;
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else if (modules[MESA_SHADER_GEOMETRY])
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as_es = true;
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union ac_shader_variant_key key = radv_compute_vs_key(pCreateInfo, as_es, as_ls);
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else if (pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input)
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export_prim_id = true;
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union ac_shader_variant_key key = radv_compute_vs_key(pCreateInfo, as_es, as_ls, export_prim_id);
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pipeline->shaders[MESA_SHADER_VERTEX] =
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radv_pipeline_compile(pipeline, cache, modules[MESA_SHADER_VERTEX],
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@ -2035,7 +2062,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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}
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if (modules[MESA_SHADER_GEOMETRY]) {
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union ac_shader_variant_key key = radv_compute_vs_key(pCreateInfo, false, false);
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union ac_shader_variant_key key = radv_compute_vs_key(pCreateInfo, false, false, false);
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pipeline->shaders[MESA_SHADER_GEOMETRY] =
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radv_pipeline_compile(pipeline, cache, modules[MESA_SHADER_GEOMETRY],
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@ -2045,10 +2072,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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pipeline->layout, &key);
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pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_GEOMETRY);
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pipeline->graphics.vgt_gs_mode = si_vgt_gs_mode(pipeline->shaders[MESA_SHADER_GEOMETRY]);
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} else
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pipeline->graphics.vgt_gs_mode = 0;
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}
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if (modules[MESA_SHADER_TESS_EVAL]) {
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assert(modules[MESA_SHADER_TESS_CTRL]);
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@ -2130,6 +2154,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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ps->info.fs.writes_z ? V_028710_SPI_SHADER_32_R :
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V_028710_SPI_SHADER_ZERO;
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calculate_vgt_gs_mode(pipeline);
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calculate_pa_cl_vs_out_cntl(pipeline);
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calculate_ps_inputs(pipeline);
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@ -1071,6 +1071,7 @@ struct radv_pipeline {
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unsigned prim;
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unsigned gs_out;
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uint32_t vgt_gs_mode;
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bool vgt_primitiveid_en;
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bool prim_restart_enable;
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unsigned esgs_ring_size;
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unsigned gsvs_ring_size;
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@ -700,6 +700,9 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
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multi_instances_smaller_than_primgroup = indirect_draw || (instanced_draw &&
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num_prims < primgroup_size);
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if (cmd_buffer->state.pipeline->shaders[MESA_SHADER_FRAGMENT]->info.fs.prim_id_input)
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ia_switch_on_eoi = true;
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if (radv_pipeline_has_tess(cmd_buffer->state.pipeline)) {
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/* SWITCH_ON_EOI must be set if PrimID is used. */
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if (cmd_buffer->state.pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.uses_prim_id ||
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