ac,radv: remove the vec3 restriction with LLVM 9+
This changes requires LLVM r356755. 32706 shaders in 16744 tests Totals: SGPRS: 1448848 -> 1455984 (0.49 %) VGPRS: 1016684 -> 1016220 (-0.05 %) Spilled SGPRs: 25871 -> 25815 (-0.22 %) Spilled VGPRs: 122 -> 122 (0.00 %) Scratch size: 11964 -> 11956 (-0.07 %) dwords per thread Code Size: 55324500 -> 55301152 (-0.04 %) bytes Max Waves: 235660 -> 235586 (-0.03 %) Totals from affected shaders: SGPRS: 293704 -> 300840 (2.43 %) VGPRS: 246716 -> 246252 (-0.19 %) Spilled SGPRs: 159 -> 103 (-35.22 %) Scratch size: 188 -> 180 (-4.26 %) dwords per thread Code Size: 8653664 -> 8630316 (-0.27 %) bytes Max Waves: 60811 -> 60737 (-0.12 %) Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@ -84,6 +84,7 @@ ac_llvm_context_init(struct ac_llvm_context *ctx,
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ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
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ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
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ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
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ctx->v3f32 = LLVMVectorType(ctx->f32, 3);
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ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
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ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
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@ -1166,7 +1167,7 @@ ac_build_llvm8_buffer_store_common(struct ac_llvm_context *ctx,
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args[idx++] = voffset ? voffset : ctx->i32_0;
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args[idx++] = soffset ? soffset : ctx->i32_0;
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args[idx++] = LLVMConstInt(ctx->i32, (glc ? 1 : 0) + (slc ? 2 : 0), 0);
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unsigned func = num_channels == 3 ? 4 : num_channels;
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unsigned func = HAVE_LLVM < 0x900 && num_channels == 3 ? 4 : num_channels;
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const char *indexing_kind = structurized ? "struct" : "raw";
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char name[256], type_name[8];
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@ -1224,9 +1225,9 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
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bool writeonly_memory,
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bool swizzle_enable_hint)
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{
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/* Split 3 channel stores, becase LLVM doesn't support 3-channel
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/* Split 3 channel stores, because only LLVM 9+ support 3-channel
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* intrinsics. */
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if (num_channels == 3) {
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if (num_channels == 3 && HAVE_LLVM < 0x900) {
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LLVMValueRef v[3], v01;
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for (int i = 0; i < 3; i++) {
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@ -1353,7 +1354,7 @@ ac_build_llvm8_buffer_load_common(struct ac_llvm_context *ctx,
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args[idx++] = voffset ? voffset : ctx->i32_0;
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args[idx++] = soffset ? soffset : ctx->i32_0;
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args[idx++] = LLVMConstInt(ctx->i32, (glc ? 1 : 0) + (slc ? 2 : 0), 0);
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unsigned func = num_channels == 3 ? 4 : num_channels;
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unsigned func = HAVE_LLVM < 0x900 && num_channels == 3 ? 4 : num_channels;
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const char *indexing_kind = structurized ? "struct" : "raw";
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char name[256], type_name[8];
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@ -1419,7 +1420,7 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
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if (num_channels == 1)
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return result[0];
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if (num_channels == 3)
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if (num_channels == 3 && HAVE_LLVM < 0x900)
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result[num_channels++] = LLVMGetUndef(ctx->f32);
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return ac_build_gather_values(ctx, result, num_channels);
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}
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@ -1511,7 +1512,7 @@ ac_build_llvm8_tbuffer_load(struct ac_llvm_context *ctx,
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args[idx++] = soffset ? soffset : ctx->i32_0;
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args[idx++] = LLVMConstInt(ctx->i32, dfmt | (nfmt << 4), 0);
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args[idx++] = LLVMConstInt(ctx->i32, (glc ? 1 : 0) + (slc ? 2 : 0), 0);
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unsigned func = num_channels == 3 ? 4 : num_channels;
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unsigned func = HAVE_LLVM < 0x900 && num_channels == 3 ? 4 : num_channels;
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const char *indexing_kind = structurized ? "struct" : "raw";
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char name[256], type_name[8];
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@ -2010,7 +2011,7 @@ ac_build_llvm8_tbuffer_store(struct ac_llvm_context *ctx,
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args[idx++] = soffset ? soffset : ctx->i32_0;
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args[idx++] = LLVMConstInt(ctx->i32, dfmt | (nfmt << 4), 0);
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args[idx++] = LLVMConstInt(ctx->i32, (glc ? 1 : 0) + (slc ? 2 : 0), 0);
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unsigned func = num_channels == 3 ? 4 : num_channels;
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unsigned func = HAVE_LLVM < 0x900 && num_channels == 3 ? 4 : num_channels;
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const char *indexing_kind = structurized ? "struct" : "raw";
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char name[256], type_name[8];
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@ -71,6 +71,7 @@ struct ac_llvm_context {
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LLVMTypeRef v3i32;
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LLVMTypeRef v4i32;
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LLVMTypeRef v2f32;
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LLVMTypeRef v3f32;
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LLVMTypeRef v4f32;
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LLVMTypeRef v8i32;
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@ -1574,9 +1574,9 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
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u_bit_scan_consecutive_range(&writemask, &start, &count);
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/* Due to an LLVM limitation, split 3-element writes
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* into a 2-element and a 1-element write. */
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if (count == 3) {
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/* Due to an LLVM limitation with LLVM < 9, split 3-element
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* writes into a 2-element and a 1-element write. */
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if (count == 3 && (elem_size_bytes != 4 || HAVE_LLVM < 0x900)) {
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writemask |= 1 << (start + 2);
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count = 2;
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}
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@ -1618,6 +1618,9 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
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case 16: /* v4f32 */
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data_type = ctx->ac.v4f32;
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break;
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case 12: /* v3f32 */
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data_type = ctx->ac.v3f32;
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break;
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case 8: /* v2f32 */
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data_type = ctx->ac.v2f32;
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break;
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@ -2768,7 +2768,9 @@ radv_emit_stream_output(struct radv_shader_context *ctx,
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/* fall through */
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case 4: /* as v4i32 */
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vdata = ac_build_gather_values(&ctx->ac, out,
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util_next_power_of_two(num_comps));
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HAVE_LLVM < 0x900 ?
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util_next_power_of_two(num_comps) :
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num_comps);
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break;
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}
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